JPS6051176B2 - PCM recording and playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an encoded audio signal (hereinafter referred to as a PCM signal).

The present invention relates to a PCM recording and reproducing apparatus that reproduces a magnetic tape on which . Conventionally, there has been a device of this type as shown in FIG.

1 is an analog signal input terminal, 2 is an analog-to-digital converter, and 61 is for distributing data converted into a PCM signal by the analog-to-digital converter 2 to multiple tracks, and detecting errors for each certain number of PCM signals on each track. 5 is a modulation circuit for recording a PCM signal on a magnetic tape; 6 is a recording head; 7 is a magnetic tape; 8 is a playback head; 9 is a PCM signal output reproduced by the playback head 8; 10 is an error detection circuit for the reproduced PCM signal; 12 is an edit detection circuit that detects an edit point based on the detection result of the error detection circuit 10; 62 is the same form as when recording a multi-track PCM signal; PCM in series with
26 is a signal processing circuit that connects the PCM signal near the edit point without any level jump using the signal from the edit detection circuit 12, 27 is a memory circuit, and the memory read/write timing is determined by the memory control circuit. Controlled by 28.

29 and 30 are clock generation circuits that control the PCM recording and playback device, 31 is a crystal, and 32 is a clock generation circuit 29, 3
33 is a servo control circuit that controls tape running based on the clock selected by the selection circuit 32; 34 is an output terminal to the servo system; 15; 1 is a digital-to-analog conversion circuit, and 16 is an analog signal output terminal.

Next, the operation will be explained.

Here, for simplicity, we set the number of tracks to 4, and P in one frame.
Assume that the number of frames of the CM signal is 4.

An analog signal inputted from an input terminal 1 is converted into a PCM signal by an analog-to-digital converter 2. The PCM signal flow at 1 in FIG. 1 becomes a data flow as shown in FIG. 9a. Here, Bl, b2... are PCMs arranged in time.
Show signal. This PCM signal is distributed to tracks by a track distribution and error detection code addition circuit 61, an error code is added thereto, and a synchronization mark a is also added thereto. The format of the output at j in FIG. 4 is as shown in FIG. 9b. Here, Dl, d2, d3, and d4 are error detection codes. The output of the track distribution and error detection addition circuit 61 is modulated by the modulation circuit 5 so as to be recorded on the magnetic tape, and is recorded on the magnetic tape 7 by the recording head 6. Next, I will explain the playback side.

A signal from the magnetic tape 7 is read out by a reproducing head 8, converted into a PCM signal by a demodulation circuit 9, an error is detected by an error detection circuit 10, and converted into a serial PCM signal by a parallel-to-serial conversion circuit 62.

Hereinafter, the operation of performing normal playback without editing will be described first.

The output PCM signal of the parallel-serial conversion circuit 62 is corrected for error data in the signal processing circuit 26, delayed in the memory circuit 27, and converted into an analog signal by the digital-to-analog converter 15, which is sent out from the output terminal 16.

Next, the case of reproducing an edited magnetic tape will be explained.

When the edit detection circuit 12 detects an edit point, the memory control circuit 28 stops the write clock of the memory circuit 27 and stops writing the error data at the edit location to the memory circuit 27 . On the other hand, reading from the memory circuit 27 is always performed. When the error part at the editing point is finished, the memory control circuit 2
8 operates the write clock of the memory circuit 27 and starts writing into the memory circuit 27 the PCM signal processed by the signal processing circuit 26 so that the data before and after editing are smoothly connected. This prevents erroneous data at the edit point from being written to memory.

When signal processing is performed at the editing point as described above, the amount of PCM signals stored in the memory circuit decreases, so it is necessary to replenish the memory circuit with PCM signals.

The operation of replenishing the memory circuit 27 with PCM signals will be explained below.

The memory control circuit 28 constantly detects the storage capacity of the memory circuit 27, and when the storage capacity of the memory circuit becomes less than a certain value due to editing point processing, the second clock generation circuit 30 detects the storage capacity of the memory circuit 27.
Works to select the clock.

On the other hand, the read clock of the memory circuit and the clock of the digital-to-analog converter always use the clock of the first clock generating circuit 29, and the clock of the second clock generating circuit 3
Since the clock of 0 is a little faster than the clock of the first clock generation circuit, the overall speed of operations other than reading from the memory circuit, such as tape running and writing signals to the memory circuit, becomes faster, thereby replenishing the memory storage capacity. When the memory storage capacity becomes larger than a certain value, the memory control circuit 28 sends a control signal to the selection circuit 32 to select the clock of the first clock generation circuit. Next, the operation of the signal processing circuit 26 will be explained in detail. In Fig. 2, 51 is an input terminal for the PCM signal, and 52 and 54 are first terminals for temporarily storing the PCM signal.
, a second memory 18 58 is an address circuit that controls writing to the memories 52 and 54, 53 and 55 are multipliers, 59 is a weight generation circuit that generates coefficients for the multipliers 53 and 55, 56 is an adder, and 57 is an output terminal, and 60 is an input terminal for an edit detection signal.

Normally, when editing detection is not performed, the signal processing circuit 26
The input signal passing through the first memory 52 is multiplied by ×1 in the first multiplication circuit 53, the input signal of the second memory 54 is multiplied by ×0 in the second multiplication circuit 55, and added in the adder 54. do.

Therefore, the same signal as the input is sent to the output terminal 57.
Next, processing during editing will be explained.

When the editing detection signal is input from the terminal 60, the first memory 5
The address circuit 58 operates so that the write/read operation of No. 2 is stopped.

On the other hand, data is constantly being written to the second memory 54.

When the edit detection signal disappears, the address circuit 58 operates to read and write data from the first memory 52 again.

At this time, the data stored in the second memory 54 is the edited PCM.
It's a signal. The output PCM signal of the first memory 52 is sequentially reduced from ×1 times to ×0 times by the first multiplier 53 and faded out. On the other hand, the output PCM of the second memory 54
The signal is sequentially increased from ×0 times to ×1 times by the second multiplier 55 and faded in. This control is performed by the weight generation circuit 22. The outputs of each multiplier circuit are added by an adder circuit 19 and outputted from an output terminal 57.

Since the conventional PCM recording and reproducing apparatus is constructed as described above, it has the disadvantage that the construction is complicated, such as changing the tape running speed and requiring two types of clock generation circuits.

Another possible editing method is to record the PCM signal twice on a magnetic tape by delaying one side of the same signal, avoiding errors at the editing point and smoothly connecting the data before and after editing. The disadvantage is that the recording density is high.

This invention was made to eliminate the above-mentioned drawbacks of the conventional technology, and by distributing the PCM signal to tracks and recording each track with a different delay circuit, it is possible to change the tape running speed and prevent double writing. An object of the present invention is to provide a PCM recording and reproducing device capable of carrying out editing processing by holding pre-edited data and edited data twice near an editing point for a certain period of time without performing editing processing.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 3 is a block diagram of a PCM recording/playback device according to an embodiment of the present invention, in which 1 is an analog signal input terminal, 2 is an analog-to-digital converter, 3 is a block code addition circuit, 4 is a delay circuit, 5 is a modulation circuit for storing a PCM signal on a magnetic tape, 6 is a multi-channel recording head, 7 is a magnetic tape, 8 is a multi-channel playback head, and 9 is a demodulator for demodulating the output reproduced by the playback head 8 into a PCM signal. circuit, 10 is a CRC check circuit, 11
is a vertical code decoding circuit, 12 is a first edit detection circuit, 13 is a second edit detection circuit, 1J4 is an edit processing circuit,
15 is a digital/analog converter, and 16 is an analog output terminal.

4a shows the input data 1 of the block code adding circuit 3 in FIG. 3, and FIG. 4b shows the output j of the block code adding circuit 3.
, a is a synchronization mark, Bl, ■... is 17
Sample PCM signal, d are error detection codes for track information (CRC is used in this example), A7, a8
is the check point of the vertical error detection code. Next, the error correction code used in this embodiment will be explained. here,
Consider an example using an 8-track magnetic tape.

A block is constructed by combining a linear 8,6 code (hereinafter referred to as code C) on GF24 as a vertical code, and a linear 240,224 code (hereinafter referred to as d) on GF2 as a horizontal code. shall be.

Here, the N,k code means the code of code n1 information symbol k. GF2 is a Galois field with two elements 0 and 1.
F24 is a Galois field with 24 elements. A CRC code with 16 check bits, known as a burst error detection code, is used as the code d. The generator polynomial is given by the following equation. For the code C, a Reed-Solomon code on GF24 is used.

The parity check information of code C, A7 and a8, is given by the following equation. Here, αi (1=1 to 6) is an element of GF23.

The block code consisting of the code C1 code D has the following capabilities. When there is no error track, both code C1 and code d are detected as having no error.

(B) When there is a one-track error, it is possible to detect which track the error is in using code C and correct it.

At code d, a track with an error is detected. (C) When there is an error in two tracks, the error in both tracks is corrected using the error track information with code d and the error information with code c.

(D) When there are errors in three or more tracks, the PCM signal of the relevant track is corrected using the error track information indicated by code d.

Here, code c has no correction ability. Next, the operation of the present invention will be explained with reference to the embodiment shown in FIG.

The signal input from analog input terminal 1 is a. The analog/digital converter 2 converts the signal into a PCM signal, and the block code is input to the additional circuit 3. This block code adding circuit 3 creates a block code having a code c in the vertical direction and a code d in the horizontal direction. A synchronizing signal a is also added to each track. The output of this -block code addition circuit 3 is as shown in FIG. 4b. The delay circuit 4 is a circuit for delaying 'frames. The first 7th track has no delay, the 3rd 5th track has an e frame delay, and the 2nd 4th track has a delay of 2
The sixth and eighth tracks are delayed by e frames, and the sixth and eighth tracks are delayed by 3' frames and input to the modulation circuit 5, respectively. In the modulation circuit 5, P
The CM signal is modulated into a form that is easy to record and reproduce on the magnetic tape, and is recorded on the magnetic tape 7 by the recording head 6. FIG. 5 shows the recording format of magnetic tape.

Here, the shaded frames constitute a block code. This is because each track was recorded with a different delay.

The magnetic tape 7 recorded as shown in FIG.
An RC check circuit 10 checks whether there is an error in the frame of each track.

The first edit detection circuit 12 outputs a first edit detection signal when the CRC check circuit 10 detects that the frames of each track are simultaneously erroneous for all tracks. The PCM signal that has passed through the CRC check circuit 10 is
The seventh track is delayed by 3e frames, the second and fourth tracks are delayed by 2e frames, and the third and fifth tracks are delayed by e frames. The sixth and eighth tracks are input to the decoding circuit 11 without delay. This 8-track input thus becomes the original block code unit. The decoding circuit 11 corrects or corrects the erroneous PCM data using the code c, and outputs the PCM signal to the editing processing circuit 14. At this time, if a mismatch occurs between the detection result of the CRC check and the error information based on the code c, the second edit detection circuit 13 outputs a second edit detection signal. Here, the function of the second edit detection circuit 13 will be explained in detail.

The second editing detection signal is output in the following cases.

(4) When looking at the block unit, the detection result of code d shows that there is no error on all tracks, but when it is detected that there is an error in the block with code c.

(B) Although the detection result of code d indicates that only the k-th track has an error in block units, code c
When the error track indicated by is other than the k-th track. Cases (A) and (B) occur when there is an oversight in the CRC check circuit, or when the content of a frame in a block configured during recording is different from the content of a frame in a block configured during playback. .

The latter case occurs when there is an edit point as shown in Figure 6, and the block consisting of eight frames with diagonal lines is a mixture of frames based on information before the edit point and frames based on information after the edit point. This is because a block is made up of completely unrelated frames. Therefore, the second editing detection signal is output when an error is missed in the CRC check and when there is an edited portion. Depending on the editing location, when outputting the second edit detection signal, there is always a frame error for all tracks immediately before, so the first edit detection circuit outputs the first edit detection signal only for a certain period of time. be.

Therefore, when the second editing detection signal is output during a certain period T immediately after outputting the first editing detection signal, it is determined that the real editing point has arrived, and editing processing is performed by the editing processing circuit 14. The processed signal is input to the digital-to-analog converter 15, where it becomes an analog signal and is output to the terminal 16. When it is determined that a regular editing point has arrived based on the detection results of the first and second editing detection circuits, the input PCM signal train of the editing processing circuit has a delay circuit 4, so that a The PCM signal p after the editing point and the PCM signal g after the editing point appear alternately.

Here, the operation of the editing processing circuit will be explained in detail with reference to the drawings.

In FIG. 8, 35 is an input terminal, 17 and 24 are interpolation circuits, 18 and 25 are multiplication circuits, 19 is an addition circuit, 20 is an input terminal for editing detection signals, 21 is a correction instruction circuit, and 22 is a weight generation circuit. , 23 are outputs.

When the editing detection signal is not inputted, the normal editing processing circuit passes through the first correction circuits 17 and 24, multiplies it by x1 in the first multiplication circuit 1, adds it to the output multiplied by XO in the addition circuit 25, and adds it to the output terminal 23. Send to.

When an editing processing command signal generated in response to the first and second editing detection signals is inputted from the terminal 20, the PCM signal from the input terminal 35 is inputted to the first interpolation circuit 17 and sent from the correction instruction circuit 21. , PCM signal g before the editing point PCM signal p
The output of the first interpolation circuit 17 is replaced with the corrected PCM signal r generated by the above, and generates a PCM signal sequence as shown in FIG. 7f. Here, rs indicates the interpolated PCM signal. On the other hand, the PCM signal input to the second interpolation circuit 24 is an interpolation signal generated by the correction instruction circuit 21, and replaces the PCM signal p with the corrected PCM signal s created by the PCM signal q after the editing point. Therefore, the output of the second interpolation circuit 24 is as shown in FIG.
Create a PCM signal sequence like this.

Therefore, the signal f has only the information before the editing point, and the information g has only the information after the editing point. The PCM signal sequence f is the first
The weight generation circuit 22 multiplies the PCM signal sequence g by ×1 to ×0 by the second multiplier circuit, and by ×0 to ×1 by the second multiplier circuit.
generate the weight. The outputs of these two multiplier circuits are added together by an adder circuit 19 and output from the editing processing circuit 14. As described above, the signals before and after the editing point are smoothly joined by fade-in and fade-out. In the above example, the first
The editing detection circuit in the above outputs the first editing detection signal when the frames of all tracks are incorrect at the same time, but it may be configured to output the first editing detection signal when the frames of all tracks are incorrect at the same time. According to this method, it is effective even when an error is detected incorrectly, and more accurate edit point detection can be performed. Furthermore, in the above embodiment, if there is even one mismatch between the detection result of the CRC check and the error information based on the code c, the second editing detection signal is output. Since the above-mentioned discrepancy usually occurs over multiple blocks, the second editing detection signal may be output only when the discrepancy occurs multiple times in succession, thereby preventing erroneous editing processing operations. I can do that.

As described above, according to the present invention, a PCM signal is distributed to tracks, a block code is formed, and a block code is recorded with a delay applied to each track, and during playback, an edit point is detected based on the distribution of errors at the edit point. A first edit detection circuit and a second edit detection circuit that detects an edit point using the vertical and horizontal detection capabilities of the block code are provided, and when an edit point detection signal is obtained from both circuits, Since it is determined that the edit point has been detected, the edit point can be detected reliably, and if a magnetic tape that has been manually cut and edited is reused (recorded), the second edit detection circuit will detect the edit point. Since no signal is output, no editing processing is performed.

In addition, in the case of tape reuse (recording), it is equivalent to having a large scratch perpendicular to the tape running direction, but in the present invention, a different delay is applied to each track of the block code, so this scratch can be avoided. This has the effect that only two track errors occur in one block, correction is possible, and the reproduced analog signal can be reproduced without any problem. Also, if the CRC check is overlooked, the first edit detection circuit does not detect edits, so the output of the second edit detection circuit is not an edit point, but a C
This corresponds to detecting a missed RC, and using this output has the effect of appropriately correcting errors in the PCM signal. Also, since each track is delayed by a different number of frames, the P
It is possible to create a CM signal and a PCM signal after the editing point using correction, and it is possible to perform a crossfade that gradually attenuates the data before editing and gradually increases the data after editing, preventing level jumps in the reproduced audio signal. It became possible.

[Brief explanation of drawings]

Figure 1 is a configuration diagram showing a conventional PCM recording and playback device;
4 is a detailed block diagram showing the signal processing circuit of FIG. 1, FIG. 3 is a diagram showing a PCM reproducing apparatus according to an embodiment of the present invention, FIG. 4
Fig. b is an explanatory diagram showing the product code, Fig. 5 is a block diagram showing the recording format of the magnetic tape, Fig. 6 is a block diagram showing recording near the edit point on the magnetic tape, and Fig. 7 is a block diagram showing the recording format of the magnetic tape. FIG. 8 is a block diagram of the editing processing circuit, and FIGS. 9A and 9B are explanatory diagrams showing the flow of PCM signals in the circuit of FIG. 1.

Claims (1)

[Claims] 1. Data converted into a PCM signal is distributed to multiple tracks, and error detection information is added to the PCM signal in the vertical direction, which is the track direction, and in the horizontal direction, which is the tape running direction, and the block is created. A block code generating means constituting a code, a recording delay means for applying a predetermined delay to the output of the block code generating means for each track, a recording and reproducing means for recording and reproducing the output signal of the recording delay means, and a reproducing means. a first edit detection means that outputs a first edit detection signal when the error detection results of the longitudinal code are simultaneously detected to be errors for a predetermined number of tracks or more; A playback delay means delays the playback signal of each track so that the sum of the delay time given to the block code is equal for all tracks, and detects the error detection result of the code in the vertical direction and the error detection result in the horizontal direction in block code units after the delay. a first edit detection means that outputs a second edit detection signal when a discrepancy with the error detection result of the code occurs at least once within a predetermined period; and after the first edit detection signal is inputted; A PCM recording and reproducing apparatus comprising: an editing processing circuit that performs editing processing only when the second editing detection signal is input within a predetermined period. 2 The second edit detection means outputs a second edit detection signal only when a mismatch between the error detection result of the vertical code and the error detection result of the horizontal code occurs multiple times in succession within a predetermined period. 2. A PCM recording and reproducing apparatus according to claim 1, wherein the PCM recording and reproducing apparatus outputs . 3 The editing processing circuit includes an editing detection circuit that receives the first and second editing detection signals and outputs an editing processing command signal, and an editing processing circuit that receives the editing processing command signal and performs editing using only the PCM signal before the editing detection point. PC that supports audio signals for a predetermined period of time
A pre-edit point signal creation circuit that creates an M signal string; and an edit point that receives the above-mentioned edit point processing command signal and creates a PCM signal string for a predetermined period of audio signal after the edit point using only the PCM signal after the edit detection point. Post signal creation circuit and P before the above editing point
a first weighter that gradually reduces the audio level corresponding to the CM signal sequence from 1x to 0x; and a PCM after the editing point.
It consists of a second weighting device that gradually increases the audio level corresponding to the signal sequence from 0 times to 1 times, and an adding circuit that adds the outputs of the first and second weighting devices. P described in claim 1 or 2 characterized by:
CM recording and playback device.