JPH01122081A - Digital recording and reproducing device - Google Patents

Abstract

PURPOSE:To improve accuracy by adding a flag to the error of block data and change it into an erasure in accordance with the decoding condition of a block number. CONSTITUTION:At the time of reproducing, a signal by a reproducing head 31 passes through a switch 32, is demodulated by a demodulator 33 and after that, its jitters, etc., are absorbed by a time-axis correcting circuit 34. In C1 and C3 decoders 35, the error in a tape longitudinal direction is corrected by the C1 decoder and after that, block numbers BA1 and BA2 are corrected by the C3 decoder. When they are uncorrectable, a correcting processing is executed and the decoder 35 instructs a decoder 37 to execute the self-advance of the block number, to add the flag to the datum to be an error to which the flag is not added among the data of the block of the uncorrectable number and to make it into the erasure. When the numbers BA1 and BA2 are corrected, the above-mentioned instruction is not executed. Next, digital data are inputted to a deinterleave circuit 36 by using the numbers BA1 and BA2. The data are rearranged by the circuit 36, the correction detection of the error is executed by the decoder 37 and that is converted into an analog signal through a D/A converting circuit 38. Thus, the accuracy can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital recording and reproducing apparatus that records and reproduces digital data on a recording medium.

[Conventional technology]

2. Description of the Related Art Conventionally, fixed head type PCM recording and reproducing apparatuses have been known that convert two-channel or multi-channel audio signals into digital signals and record the digital signals on a plurality of tracks. Such a PCM recording/playback device is required to be capable of pan-nine and punch-out (hereinafter abbreviated as PIO), which inserts and records another signal by concatenating it with an already recorded signal. There is. FIG. 5 shows the configuration of a magnetic head for performing PIO in a conventional PCM recording/playback device. In the figure, 13 is a magnetic tape;
1 is a recording head, and 12 is a reproducing head. Figure (a)
1 has a recording-reproducing-recording head configuration, and FIG. 12 has a reproducing-recording-reproducing head configuration. In order to perform PIO, a playback-recording head configuration is required, and on the other hand, in order to perform simultaneous monitoring, a recording-playback head configuration is required. configuration is possible. With pan-nine, the original signal is first played back by the playback head, then recoded and recorded as an audio signal, and in this state, just as a predetermined signal on the magnetic tape passes through the recording head, another signal is recorded. This is done by switching to the mode. Punch-out is also performed by canceling this recording mode.

FIG. 6 shows a signal form diagram of PIO. Signal B is recorded in a certain section of signal A. Section 1 of the joint between signal A and signal B
4.15 are each cross-faded. Section 16 indicates a newly recorded portion. In section 1G, the continuity of the magnetic tape pattern at the recording start portion (C) and recording end portion (D) becomes a problem.

That is, the reproducing head 12 and recording head 11 in FIG.
Even if you try to precisely measure the distance between the heads and match the timing from playback mode to recording mode, discontinuity in the tape pattern will occur due to uneven running of the tape running system, changes in the distance between the heads due to wear, etc. .

The following conventional PCM recording/playback devices have been used to solve this problem.

Here, the 2-channel digital audio signal is
7 to 14 will be explained by taking as an example a digital recording/reproducing apparatus that records on a magnetic tape using an 8-track fixed head. FIG. 7 is a data configuration diagram when one block is 8 frames. In the figure, S is a synchronization signal provided at the beginning of each frame, , are identification data, PD1 to PD are digital audio data, CtPx and CtPt are C2 parities, and c, p, to c, p are C1 parities. Therefore, the digital audio data PD1 to PD are 6
C2 parity is recorded on two tracks. Further, an example of the configuration of the identification data E, -I is shown in FIG. In the figure, the ID shown as 17-1.17-2
1. ID is the sampling frequency.

ID data for identifying the number of quantization bits, etc., 17-3
．． BAl and BA indicated by 17-4 are block numbers,
CaPs to CsPo represented by 17-5 to 17-8 are C
3 parity. A Reed-Solomon code or the like is used as this error correction code, and for example, input data V is V = [I
Dt, IDt, BA+ -BAl-CaPs-
CsPt −CsPt, CsPo], then VHt=
Generate c, p, ~CsPo so that it becomes O. Here, a is, for example, the root of the primitive polynomial X''+X4+Xs+X2+1 on the Galois field CF(2').

If 17-1 to 17-8 are each 8 bits, the block number will be 16 bits in total for BA, , BA, and will be long enough to perform PIO.

Such a block number is provided, and P
FIG. 9 shows a block diagram of a digital recording/reproducing apparatus adapted to perform IO. In the figure, 18 and 19 are L channel and R channel analog signal input terminals, 20
is A/I) (analog-digital) conversion circuit, 21
2 is a first switch, 22 is an interleave circuit that rearranges data, 23 is a C2 encoder that adds the second error correction code C2, and 24 is a C3°C1 encoder that adds the first error correction code C3 and CI. , 25 is a block number generation circuit, 26 is a synchronization signal addition circuit, 27 is a delay circuit for adjusting the recording timing of PIO, 28 is a modulator for converting digital data into a pattern to be recorded on the magnetic tape 41, 29.31 is the playback head, 30 is the recording head, 3
2 is a second switch; 33 is a demodulator that converts the signal reproduced from the magnetic tape 41 into digital data; 34 is a time axis correction circuit that removes wow and flutter, jitter, etc. generated in the magnetic tape 41 and the running mechanism; 35 is a CI,
C3 decoder, 36 is a deinterleaving circuit, 37 is C2
A decoder, 38 is a D/A (digital-to-analog) conversion circuit, and 39.40 is an output terminal for L channel and R channel analog signals. 41 is a recording medium, and a magnetic tape 41 is used here.

Next, the operation will be explained. First, normal recording (in this case, when simultaneous monitoring is performed) will be explained. The L channel and R channel analog signals inputted from the input terminals 18 and 19 are sampled at a sampling frequency of 48 KHz by the A/D conversion circuit 2G, and then converted into digital data with a quantization bit number of 16. Ru. This digital data is transmitted to the contact 111 + (!I
is applied to the di-interleave circuit 22, where the data order is rearranged. This interleaving is performed, for example, as shown in FIG. In the figure, 41 represents a magnetic tape, 42 to 49 represent eight tracks, and 5
0 represents the block number. 51.52 is the word in the frame of each track, i.e. 2 channels x 16
It represents the bit word. W in the A/D conversion circuit 20. Words are generated in the order of IW, IW, . . . , and even words W0 . W, ,W,... and odd words W, ,W
8. W, . . . are recorded in large segments (several tens of blocks) on the magnetic tape 41. Adjacent even or odd words are also recorded separated by four blocks. While the interleaving circuit 22 is rearranging the data, the 02 encoder 23 performs Reed-Solomon encoding with a code length of 16 bits and an information amount of 12 bits. For example, the 10th
H, indicated by word 51 in the diagram) +H2+H4pH6+
Hg tH16tH11H31H5tHy+H, #H
The code is composed of ,,. 03-CO are C2 parity words. In this case, each word W0゜Wl, W,
Since .

The output from the interleaving circuit 22 is applied to a C3, CI encoder 24, where encoding within one block is performed. That is, the block number generator 25 generates 16-bit block numbers BA, , BA, which are encoded as 03 in the tape width direction as shown in FIG. Subsequently, each frame is encoded with 01 in the longitudinal direction of the tape. Next, a synchronization signal S is added to the error-correction encoded data frame by frame in a synchronization signal addition circuit 26, and then passed through a delay circuit 27 and modulated by a modulator 28 to the recording head. 30 to the magnetic tape 41.

Next, during reproduction, the signal reproduced by the reproduction head 31 is passed through the contact point al t 04 of the second switch 32 to the demodulator 3.
After the signal is demodulated in step 3, jitter and the like are absorbed in the time axis correction circuit 34. In the CI and C3 decoders 35, errors in the longitudinal direction of the tape are first corrected by the C1 decoder.

After detection, block number BA1. BA is corrected. This corrected block number BA1. B.A.

Digital data is input to the deinterleave circuit 36 based on the . A block diagram of this deinterleaving circuit 36 is shown in FIG. In the figure, 6 is a data input terminal, 7 is a reproduced digital data input terminal whose jitter etc. have been absorbed by the time axis correction circuit 34, 1 is a memory, 2 is a selection circuit, and 3 is a data input terminal to the D/A conversion circuit 38. A read address circuit for outputting; 4 a write/read address circuit for exchanging data with the C2 decoder 3T;
5 inputs data from input terminal 6 to CI, C3 decoder 35
A write address circuit 8 is a data output terminal for writing to the memory 1 based on the corrected block numbers BA, , BA.

By generating the write address based on the corrected block numbers BAT and BA in this manner, it is possible to construct the original block. While the data is rearranged in the deinterleap circuit 36, the C2 decoder 37 corrects and detects errors. The deinterleaved data is finally sent to the D/A conversion circuit 38, where it is converted into the original analog signal, and the sim channel and R channel signals are outputted from the output terminals 39 and 40.

Next, the operation when performing PIO will be explained.

Switches 21 and 32 initially each contact b (+ a t
is selected. While listening to the signal A reproduced by the playback head 29 from the output terminal 39.40, connect the input terminal 18°1.
In order to record the signal B input from 9, the first switch is switched to contact a. In order to perform recording by PIO, the total time of the delay time in the deinterleave circuit 36 and the delay time in the interleave circuit 22 and the delay time in the delay circuit 2T is such that the signal on the magnetic tape 41 reproduced by the reproduction head 29 is recorded. It is best to record in a manner that is equal to the time it takes for the light to pass through the head 30. In this case, the signals of all tracks 42 to 49 are rewritten. As previously mentioned,
Even if the delay time of the delay circuit 27 is precisely adjusted, the magnetic patterns at the beginning and end of section 16 in FIG. 6 will deviate due to uneven running, etc.

BA is recorded, so even if the block number jumps,
Alternatively, even if they overlap, they can form the original block. If the error in the block number exceeds the correction ability of the 03 code, the block number BA.

As a correction process for BA, by allowing the block numbers to run automatically, it is possible to configure nine blocks.

Next, the concept of generating write addresses based on the block numbers BA, , BA, and configuring the original block will be explained using FIGS. 12 and 13. In FIG. 12, reference numeral 53 conceptually indicates the state of data in each block for the block number after the output of the time axis correction circuit 34 is CI and the C3 decoder 35 performs C1 decoding.

55 indicates a block number, and 56 indicates data of tracks 1 to 8. Reference numeral 57 indicates normal data without errors, and reference numeral 58 indicates error data flagged by C1 decoding (hereinafter referred to as erasure). In FIG. 13, 54 is CI.

It conceptually shows the state of data in each block for the block number after C1 decoding and C3 decoding by the C3 decoder 35, and 59 indicates error data for which no flag is set (hereinafter referred to as error). show.

Next, the operation will be explained. When processing such as P step 0 as described above is performed, the block number 55 may jump as shown at point P in FIG. 12. At this time, the data of each block before and after the block number jumps into the first block by C1 decoding.
Suppose that the situation is as shown in Figure 3. On the other hand, since the correction ability of C3 parity is the above-mentioned Reed-Solomon code,
If there are four pieces of error data 58 in one block as shown in Figure 2, it cannot be corrected, so the block number is "4".

"6" cannot be corrected. If the correction capacity is exceeded in this way, a correction process is performed as described above, and the block numbers are made to run automatically and the block numbers are forcibly made into consecutive numbers. Therefore, the data of each track originally with block number "6" ends up in block number "5". Therefore, as shown in FIG. 13, normal data 57 of each data of block number "5" becomes an error 59 in which 7 lags are not set.

Here, FIG. 14 shows the known error correction ability when a Reed-Solomon code on CF(2') is used as C2 parity. In the figure, 60 indicates the number of errors, and 61 indicates the number of erasures. C indicates that it is correctable, A and B indicate that it is corrected, and M indicates that abnormal noise is generated due to incorrect correction.

Therefore, as shown in FIG. 14, C2 parity can correct up to two errors if there are zero erasures and only errors, and up to four erasures if there are zero errors and only erasures.

If the state shown in Figure 13 occurs, block number "5" is reached.
” block data has 4 erasures.

There are 4 errors. On the other hand, since the data of the two channels are interleaved in the interlease circuit 22 as shown in FIG. It may contain "5" errors.

Then, as mentioned above, in the case of correction processing, there is at least one error in C2 parity, so as shown in Figure 14, the number of remaining errors is up to one error, and two in the case of erasure. Corrections can be made within this range.

[Problem that the invention seeks to solve]

Conventional digital recording and reproducing devices are configured as described above, so when performing P-process 0, etc., the block number may jump or errors may occur frequently before and after the block number jumps, resulting in the block number being corrected. If this happens, the block data of the original block number may enter a different block number, and the originally correct data becomes an error. Therefore, when performing C2 error correction after data reorganization by deinterleaving, the block data of the above block number is There is a problem in that a data series including a number always has one error, and in that case, it is disadvantageous in terms of the correction ability of C2 parity.

This invention was made to solve the above problems, and by correcting block numbers, even if block data of the original block number enters a different block number, the originally correct data will not be treated as an error. It is an object of the present invention to provide a digital recording and reproducing device that can be used as an eraser and can make maximum use of the error correction ability of C2 parity.

[Means for solving problems]

When the block number is corrected as a result of decoding a correction code completed within one block, the digital recording/reproducing apparatus according to the present invention allows the block number to run automatically and correct data in the block where the error occurred. By adding a flag to the correct data and making it an eraser, we can prevent the occurrence of errors and maximize the correction ability when decoding digital data error correction. This is what I did.

[Effect]

In the digital recording/reproducing apparatus of the present invention, the error correction code completed within one block contributes to the rearrangement of digital data by accurately restoring the block number during reproduction during normal times, and when an error cannot be corrected. As a correction process, the block number is self-run, and a flag is added to the correct data in the block, and the correct data that becomes an error is changed to erasure, which makes it advantageous for IB correction of digital data after deinterleaving. becomes.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. In this embodiment, a case will be described in which two channels of digital audio signals are recorded and reproduced on a magnetic tape using an 8-track fixed head. Here, the data structure of the 17' lock is the same as in the conventional example shown in FIGS. 7 and 8, and the interleaving method is also the same as in the conventional example shown in FIG. 10. Also 1
The correction code (C3) completed within a block and the correction code (C2) for an interleaved digital data sequence are also the same as in the conventional example.

FIG. 1 is a block diagram showing a digital recording and reproducing apparatus according to an embodiment of the present invention, and FIG.
This is a block diagram showing the configuration of the decoder, and the same parts as in FIGS. 9 and 10 are given the same reference numerals.
Detailed explanation will be omitted. In Figures 1 and 9,
As will be described later, when a block number undergoes correction processing during playback, a flag is added to the data of the block whose error cannot be corrected based on a command from the C1°C3 decoder 35 to the C2 decoder 3T. A flag adding means is provided.

Next, the operation will be explained. The operation during recording is performed in the same way as the operation explained with reference to FIG. During reproduction, the signal reproduced by the reproduction head 31 passes through the second switch 32, is demodulated by the demodulator 33, and then jitter and the like are absorbed by the time axis correction circuit 34.

In the CI and C3 decoders 35, first, the C1 decoder corrects and detects errors in the tape longitudinal direction, and then the C3 decoders block numbers BA, BA! is corrected. If it cannot be corrected, it will be corrected, the block number will be self-propelled, and among the data of the block with the uncorrectable block number,
CI is used to flag and erase erroneous data that is not flagged (because normal data from another block number may be included in this block number).
, the C3 decoder 35 instructs the C2 decoder 3T. If the block numbers BA, , BA, are corrected, the above command is not executed. Note that setting the flag as an eraser will be explained in the case of the PIO operation described later.

Next, digital data is input to the deinterleave circuit 36 using the block numbers BA, , BA.

In FIG. 2, which shows a block diagram of this deinterleaving circuit 36, the corrected or corrected block number B
A1. A write address is generated in the write address circuit 5 based on BA, and the original block is configured.

While the data is rearranged in the deinterleaving circuit 36, the C2 decoder 37 corrects and detects errors in the digital data. The signal is then sent to the P/A conversion circuit 3°8, where it is converted into the original analog signal, and the sim channel and R channel signals are output from the output terminals 39 and 40.

Next, the case of PIO will be explained. switch 21.3
2 initially selects the contacts bHe&1.

The signal A reproduced by the reproduction head 29 is output to the output terminal 39゜4.
In order to record the signal B input from the input terminals 18 and 19 while listening from 0, the first switch is switched to contact a. Recording by PIO is performed by the deinterleaving circuit 36.
The total time of the delay time in the interleave circuit 22 and the delay time in the delay circuit 27 is made equal to the time it takes for the signal on the magnetic chip 41 reproduced by the reproduction head 29 to pass through the recording head 30. It is the same as in the conventional example that it is necessary to record the data in the same manner as in the conventional example. During playback, the playback data is rearranged based on the block number, similar to the playback during simultaneous monitoring.

Next, the concept of generating a write address based on the block numbers BA, , BA at the time of reproduction and configuring the original block will be explained with reference to FIGS. 3 and 4. In FIG. 3, reference numeral 53 conceptually indicates the state of data in each block with respect to the block number after the output of the time axis correction circuit 34 is CI and the 03 decoder 35 performs C1 decoding.

55 indicates a block number, and 56 indicates data of each track. 57 indicates normal data without errors, and 58 indicates erasure after C1 decoding.

In FIG. 4, 66 is C1 in this invention. After fi(,1 decoding by the C3 decoder 35, the data state of each block for the block number after C3 decoding is also performed is shown.

Next, the operation will be explained. During reproduction, the block number may jump as shown at point P in FIG. 3, as in the conventional example. At this time, it is assumed that the data of each block before and after the skipped block number becomes as shown in FIG. 3 by C1 decoding.

On the other hand, since the ability of C3 parity is the aforementioned Reed-Solomon code, if there are four pieces of error data in one block as shown in Figure 3, it cannot be corrected, and therefore block numbers r4J and r6j cannot be corrected. Can not. Therefore, as described above, if the correction capacity is exceeded, correction processing is performed and the block number is made to run automatically.

Therefore, the data of each track originally with block number "6" ends up in block number "5".

However, in the present invention, among the data in the corrected block, error data (correct data in another block) is simultaneously added with a flag and converted into erasure. There will be no errors. Further, the error correction ability by the 02 correction code is as shown in FIG. Also, the data of the two channels are interleaved by the interleaving circuit 22 as shown in FIG. 10, as in the conventional example, so H0 to H81
When reorganizing the original 2-channel data using the words of
It may include /) which is not an error. Then, in terms of 02 correction capability, it will have at least one erasure. Therefore, as is clear from Figure 4, if there is one erasure, the remaining error is 1 if there is an error.
With erasure, it is possible to correct up to 3 items, making it possible to make the most of the 02 correction ability compared to the past.

In the above embodiment, a PCM recording/playback device using magnetic tape was shown as a digital recording/playback device, but even if a recording medium other than magnetic tape is used,
If the device has two or more independent correction codes, the same effect can be obtained.

〔Effect of the invention〕

As described above, according to the present invention, when data is reorganized based on the block number, the decoding state of the block number (
error in the block data of that block number (originally correct data of another block)
Since the configuration is configured such that a flag is added to the signal and turned into an erasure, it is possible to make full use of the digital data's correction code ability, and it is possible to obtain highly accurate digital data, which has the effect of increasing the quality of the reproduced sound. Even when the error correction capacity is exceeded, a portion of the error becomes an erasure and has a flag, so that correction processing such as average value interpolation can be performed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a digital recording/reproducing device according to an embodiment of the present invention, FIG. 2 is a block diagram showing a deinterleave circuit of the same device, and FIGS. A conceptual diagram of data processing, Fig. 5 is a configuration diagram of a magnetic head for pan-nine and punch-out, and Fig. 6 is a signal format diagram of pan-nine and punch-out.
FIG. 7 is a data configuration diagram of one block according to a conventional example and an embodiment of the present invention, FIG. 8 is a configuration diagram of identification data in one block, and FIG. 9 is a block diagram showing a conventional digital recording/reproducing apparatus. FIG. 10 is a diagram showing a data interleaving method according to a conventional method and an embodiment of the present invention, FIG. 11 is a block diagram of a deinterleaving circuit of a conventional digital recording/reproducing device, and FIG. 12 and FIG. 13 are conventional data interleaving methods. Figure 14 is a conceptual diagram of data processing during playback in the same device.
FIG. 2 is a diagram showing the correction ability using the 2-correction code. 23 is a C2 encoder, 24 is a C3 and CI encoder, 25 is a block number generator, 29 is a playback head, 30 is a recording head, 35 is a CI and C3 decoder, 36 is a deinterleave circuit, and 3T is a C2 decoder . In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] A block consisting of a predetermined amount of digital data is recorded on a recording medium together with a block number, a first error correction code that is completed within the block, and a second error correction code that is completed within a plurality of blocks. In a digital recording and reproducing device that rearranges the reproduced digital data based on the block number corrected by the error correction code of the block number and automatically runs the block number when the block number cannot be corrected, the block that became uncorrectable during the above reproduction. 1. A digital recording/reproducing device comprising a flag adding means for adding a flag to data in a numbered block.