JPS6043766A - Microcomputer system - Google Patents

Abstract

PURPOSE:To perform the prescribed information processing by means of an RAM even in case a microprocessor opens a bus by providing the RAM to which a direct access is possible from the microprocessor. CONSTITUTION:The programs or data to be executed are fetched into a built-in RAM before a microprocessor MPU opens buses AB and DB for execution of a direct memory access. Then the MPU performs the prescribed data processing based on the program fetched to the RAM after the buses AB and DB are opened and while a peripheral device is performing the prescribed information processing with use of those buses. Such data processing includes the information processing such as a floating point operation, etc. which needs a comparatively long processing time with small data quantity.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a microcomputer system, and, for example, to a technique effective for a microcomputer system that transfers data between a plurality of devices via a bus.

[Background technology]

A microcomputer system is known in which peripheral devices such as a microprocessor, a memory device, and a direct memory access control device (hereinafter simply referred to as DMAC) are connected via a common bus (for example, published on June 1, 1979).
5th, ■P of r Microcomputer Handbook J published by Rikin Shoten.

72-P, 85. ). The inventor of this application has discovered that such a microcomputer system has the following drawbacks.

That is, when a DMAC or the like uses the bus to transfer predetermined data, the microprocessor stops its operation. Therefore, in the above-mentioned microcomputer system, the usage efficiency of the microprocessor is reduced.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a microcomputer system that improves the efficiency of using a microprocessor.

The above and other objects and novel features of this invention include:
It will become clear from the description of this specification and the attached drawings.

[Summary of the invention]

A brief summary of typical inventions disclosed in this application is as follows.

That is, by providing a RAM (Random Access Memory) that can be directly accessed by the microprocessor, it is possible to perform predetermined information processing using the RAM even if the microprocessor releases the bus. It is something.

〔Example〕

FIG. 1 shows a block diagram of an embodiment of a microcomputer system to which the present invention is applied.

Each semiconductor integrated circuit device ICl-IC constitutes a microprocessor MPU and peripheral devices such as the above-mentioned DMAC, etc.
3 etc. are interconnected by a common data bus DB, and are connected to the microprocessor MP through an address bus AB.
The address signal formed by U is transmitted to each of the semiconductor integrated circuit devices I01 to IC3, etc. The above DMA
C is a device whose sole and exclusive task is to transfer data between an input/output (■10) device such as a floppy disk device and a semiconductor memory device using a small microprocessor type logic. It is.

The semiconductor integrated circuit devices ICI to IC3 and the like are controlled to acquire the bus DB by a daisy chain composed of gate circuits 01 to G6 and inverters IVI to IV3.

That is, when the microprocessor MPU does not use the bus, it unmasks the signal BG and sets it to 1L'' (low level).
Received by CI. This semiconductor integrated circuit device
When c1 uses the bus, the signal BR is stopped at "L" and the signal B is sent to other semiconductor integrated circuit devices IC2 and 1C3.
Mask G'. The semiconductor integrated circuit device ICI that has acquired the bus in this manner uses the bus to perform predetermined information processing. For example, the semiconductor integrated circuit device 1cI
If it is a DMAC, it performs the above data transfer operation.

Note that when the semiconductor integrated circuit device IC1 does not use the bus or finishes its operation, the signal BR goes “H”.
Therefore, next, the semiconductor memory device IC2 is connected to the above game)
G2. Receives "L" of signal BG through G4. As a result, the semiconductor integrated circuit device IC2 acquires the right to use the bus in the same manner as described above. Below, in the same way, the bus fq
is performed according to the daisy-chain priority order.

In this way, in order to prevent peripheral devices such as semiconductor integrated circuit devices ICI to IC3 from using the bus, the usage efficiency of the microprocessor MPU will decrease due to the fact that the microprocessor MPU does not execute anything during that time. The microprocessor MPU has the following configuration.

FIG. 2 shows a block diagram of an embodiment of the microprocessor MPLJ. Although not particularly limited,
In this example, each circuit block surrounded by a broken line in the same figure is manufactured using known semiconductor integrated circuit manufacturing technology.
It is formed in an LSI on a semiconductor substrate such as single crystal silicon.

Although the microprocessor MPU is not particularly limited, n
It is a microprocessor with functions similar to the product name rHD6800J sold by Hitachi. In this embodiment, a RAM is included in order to execute specific information processing even while the microprocessor MPU is releasing the bus. This RA 1. /I is directly connected to the microprocessor MPU by an internal bus. Therefore, even if the multiplexer MPX composed of MOSFETs (insulated gate field effect transistors) etc. provided between the external bus is turned off, the microprocessor y + MPU and RAM are It is connected.

In this figure, external terminals other than the buses AB and DB are omitted because they are not directly related to the present invention.

In this embodiment, before the microprocessor MPU releases buses AB and DB for the above-mentioned DMA execution, the program or data to be executed during that time is transferred to the above-mentioned built-in RA.
Import into M. Then, by the microprocessor MPU releasing buses AB and DB as described above,
While the peripheral devices use the bus to execute predetermined information processing operations, the microprocessor MPU processes predetermined data according to a program loaded into the built-in RAM. Examples of such data processing include information processing that requires a relatively long processing time with a small amount of data, such as floating point arithmetic. This is because, unlike an external RAM, the RAM is built into the microprocessor MPU and is limited to a relatively small storage capacity of about 0.5 to IK bytes.

〔effect〕

(l) By incorporating RAM into the microprocessor and loading specific programs and data into the built-in RAM before the microprocessor releases the bus, even when the microprocessor does not have the right to use the bus. Since the processing can be executed, the effect of increasing the usage efficiency of the microprosenna can be obtained.

I2) According to (11) above, peripheral devices and the microprocessor can operate simultaneously, so by linking these operations and creating a °ζ program, it is possible to realize faster information processing. is obtained.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that this invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, the microprocessor MPU and each device that constitutes the peripheral equipment may be constituted by one substrate (board).

In this case, the buses AB and DB connect the respective boards. Further, the circuit provided between the microprocessor and the electric external paths AB and DB may be a multiplexer or an input/output cover sofa having a three-state output function. Plus, the bus! As for the specific structure of the daisy chain for three-gain control, various modifications can be made.

[Application field]

The present invention can be widely used in microcomputer systems in which a microprocessor and peripheral devices are connected via a bus.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. ff52 is a block diagram showing an example of the structure of the microprocessor sensor. MPU...Microprocessor, fli\iν4...Random access memory, ICI~IC3...Semiconductor integrated circuit device (peripheral equipment), GI~GG...Gate circuit, IVi~IV3...Inverter, AB...・Address bus, DB...Data bus agent Akio Takai Tsu

Claims (1)

[Claims] 1. A bus that is provided in common to a plurality of devices constituting a microcomputer system and used for data transfer between a pair of devices, and a microcomputer system as one device that is connected to the bus. A microcomputer system comprising a processor and a RAM that can be accessed directly without going through the bus. 2. The microcomputer system according to claim 1, wherein the microprocessor and RAM are formed in a one-chip semiconductor integrated circuit device.