JPS604245A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS604245A
JPS604245A JP58112042A JP11204283A JPS604245A JP S604245 A JPS604245 A JP S604245A JP 58112042 A JP58112042 A JP 58112042A JP 11204283 A JP11204283 A JP 11204283A JP S604245 A JPS604245 A JP S604245A
Authority
JP
Japan
Prior art keywords
wires
element mounting
excess
connection
gold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58112042A
Other languages
Japanese (ja)
Inventor
Toshio Kasuga
春日 壽夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58112042A priority Critical patent/JPS604245A/en
Publication of JPS604245A publication Critical patent/JPS604245A/en
Pending legal-status Critical Current

Links

Classifications

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    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To offer the title device of high reliability by the secured connection of metallic fine wires to lead wires by providing projections which block the effusion of excess efflux generating at the time of fixing an element to an element mounting part. CONSTITUTION:After semiconductor elements 201a and 201b are fixed to element mounting parts 202a and 202b with an adhesive material 203b such as Au-Si eutectic alloy or Ag paste, the excess efflux thereof 210b is going to effuse out, but cannot effuse because of being blocked by the projections 211a and 211b. This projection is composed of solder resist, silicone resin, polyimide resin, etc., and provided at joints 208a, 208b between the mounting parts 202a, 202b and the connection parts 209a, 209b of the lead wires to the fine wires before the elements are fixed. The presence of this projection enables the secure thermal compression bonding of the metallic fine wires 207a, 207b of Au or Al without the contamination of Au or Ag plated layers 205b at the connection parts 209a, 209b of the lead wires 206a, 206b to the fine wires, resulting in the maintenance of high quality.

Description

【発明の詳細な説明】 本発明は、素子搭載部と外部導出用リード線とが連結さ
れているリードフレームを使用した半導体装置の改良さ
れた構造に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improved structure of a semiconductor device using a lead frame in which an element mounting portion and a lead wire for leading to the outside are connected.

従来この種の半導体装置において、素子を固着する場合
に2つの方法があった。1つは素子のシリコンと素子搭
載部の金メッキと金共晶合金化させる方法、他の方法は
銀ペースト等の接着材料を素子と素子搭載部との間に介
在させて接着させる方法である。このいずれの方法にお
いても次のような欠点があった。
Conventionally, in this type of semiconductor device, there have been two methods for fixing elements. One method is to form a gold eutectic alloy between the silicon of the element and the gold plating of the element mounting part, and the other method is to interpose an adhesive material such as silver paste between the element and the element mounting part and bond them together. Both of these methods had the following drawbacks.

共晶合金化させる方法においては、通常素子塔載部を金
とシリコンの共晶点の温度(約490C)まで加熱して
おき、その上に素子をのせ、該素子を該搭載部の上に数
秒間こすり合わせることにより共晶合金を作るのである
。この時に共晶合金が出き過ぎると、その過剰の共晶合
金物が該塔載部と外部導出用リード線(以下リード線と
称する)との連結部を通して外へ流出していくことがあ
った。この素子固着時の余剰流出物が該リード線の金属
細線との接続部に達すると通常金又は銀メッキされた該
接続部の表面が該余剰流出物である金−シリコンの共晶
合金で覆われ、該接続部に金、又はアルミニウムの金属
細線を熱圧着することが出来なくなる結果となっていた
In the method of forming a eutectic alloy, the element mounting part is usually heated to the temperature of the eutectic point of gold and silicon (approximately 490 C), the element is placed on top of it, and the element is placed on the mounting part. By rubbing them together for a few seconds, a eutectic alloy is created. If too much eutectic alloy comes out at this time, the excess eutectic alloy may flow out through the connecting part between the column mounting part and the external lead wire (hereinafter referred to as lead wire). Ta. When this excess spillage from the fixation of the element reaches the connection part with the thin metal wire of the lead wire, the surface of the connection part, which is usually plated with gold or silver, is covered with the gold-silicon eutectic alloy that is the excess spillage. As a result, it became impossible to thermocompress a thin metal wire of gold or aluminum to the connection portion.

又、接着材料を用いて接着させる方法に分いては、接着
材料を素子搭載部に塗布した後その上に素子を置き、接
着材料を加熱又は紫外線により硬化処理を行ない素子を
固着していた。接着材料の主成分は樹脂であり、その中
に含まれている溶剤外が硬化するまでは、液状のままで
ある為、塔載部に塗布する量が多すぎると素子搭載に塗
布されたあと、素子搭載部とリード線の連結部を通して
外へ流出していくことがあった。特に素子搭細部、リー
ド線及び連結部上のメッキ表面が粗い場合、毛管現象に
よりその流出効果が大きかった。
In addition, in the method of bonding using an adhesive material, the adhesive material is applied to the element mounting portion, the element is placed on top of the adhesive material, and the adhesive material is cured by heating or ultraviolet rays to fix the element. The main component of the adhesive material is resin, and it remains liquid until the outside of the solvent contained in it hardens. , sometimes leaked out through the connection between the element mounting part and the lead wire. In particular, when the plating surfaces on the element mounting parts, lead wires, and connecting parts were rough, the outflow effect was large due to capillary action.

この素子固着時の余剰流出物が、通常金又は銀メッキさ
れたリード線の金属流出物との接続部に達すると該余剰
流出物である樹脂の薄膜で覆われ、該接続部に金又はア
ルミニウムの細線を熱圧着することが出来なくなる結果
となっていた。
When this excess spillage from the fixation of the element reaches the connection part of the lead wire, which is usually gold or silver plated, with the metal spillage, it is covered with a thin film of resin, which is the surplus spillage, and the connection part is coated with gold or aluminum. This resulted in the inability to thermocompress the fine wires.

以上述べた如く、素子を素子搭載部に固着する時に発生
する余剰流出物が素子搭載部とリード線との連結部を通
してリード線の金属細線との接続部にまで達し表面を覆
ってしまう為、金属細線を該接部に接続することが出来
なくなるか、接続した如くに見えても接続強度が極めて
弱く、品質低下を招く欠点を有していた。
As mentioned above, excess spillage generated when fixing the element to the element mounting part passes through the connection part between the element mounting part and the lead wire and reaches the connection part with the thin metal wire of the lead wire, covering the surface. The thin metal wire cannot be connected to the contact portion, or even if it appears to be connected, the connection strength is extremely weak, which has the disadvantage of causing quality deterioration.

本発明の目的は、これらの点を解決し高信頼性で安価な
半導体装置を提供するものである。
An object of the present invention is to solve these problems and provide a highly reliable and inexpensive semiconductor device.

本発明は半導体装置の半導体素子搭載部と外部導出用リ
ード線とが連結されている部分において該搭載部と該リ
ード線の金属細線との接続部の問で突起物が連結部を横
断していることを特徴とする。
In the present invention, in a part where a semiconductor element mounting part of a semiconductor device and a lead wire for leading out to the outside are connected, a protrusion crosses the connecting part between the mounting part and the thin metal wire of the lead wire. It is characterized by the presence of

以下図面にもとづいて本発明の説明する。The present invention will be explained below based on the drawings.

第1(a)は従来の半導体装置を示す反面図、第1図(
b),(c)は各々第1図(a)のA−A′を切断した
段面図である。半導体素子101a、101bを素子搭
載部102a、102bに金・シリコンの提供合金又は
銀ペースト等の接着剤103bで固着した後、該素子の
電極104a、104bと金5又は銀のメッキ層105
bで覆われたリード線106a、106bとを金又はア
ルミニウムの細線107a、107bで接続する。しか
しながら、該共晶合金又は銀ペースト等の接着剤103
cはその量が過剰となった場合、素子101cと素子搭
載部102cを固着する時に該搭載部12cとリード線
106cとの間の連結部108cを通して外へ流出して
行き、リード線106cの金属細線との接続部109c
の金又は銀メッキ層105cの上を覆うことがあった。
1(a) is a reverse view showing a conventional semiconductor device;
b) and (c) are respectively step views cut along the line AA' in FIG. 1(a). After the semiconductor elements 101a, 101b are fixed to the element mounting parts 102a, 102b with an adhesive 103b such as a gold/silicon alloy or silver paste, the electrodes 104a, 104b of the elements and a gold 5 or silver plating layer 105 are attached.
The lead wires 106a and 106b covered with the lead wires 106a and 106b are connected with thin gold or aluminum wires 107a and 107b. However, the adhesive 103 such as the eutectic alloy or silver paste
If the amount of c is excessive, it flows out through the connection part 108c between the mounting part 12c and the lead wire 106c when the element 101c and the element mounting part 102c are fixed, and the metal of the lead wire 106c flows out. Connection part 109c with thin wire
The gold or silver plating layer 105c may be covered.

この余剰流出物110cの上に金属細線107cを熱圧
着しても、接続不可となるか又は接続強度極めて弱く、
品質低下を招くという欠点を有していた。
Even if the thin metal wire 107c is thermocompression bonded onto this excess effluent 110c, the connection will not be possible or the connection strength will be extremely weak.
This had the disadvantage of causing quality deterioration.

第2図(a)、(b)は本発明による一実施例を示す図
である。第2図(a)は平面図、第2図(b)は(a)
図のB−B′を切断した断面図である。
FIGS. 2(a) and 2(b) are diagrams showing an embodiment according to the present invention. Figure 2 (a) is a plan view, Figure 2 (b) is (a)
It is a sectional view taken along the line BB' in the figure.

半導体素子201a、201bを素子搭載部202a,
202bに、金・シリコンの共晶合金又は銀ペースト等
の接着材203bで固着した後、この余剰流出物210
bが外へ流出しようとするが突起物211a,211b
に妨げられて流出出きなくなる。この突起物は、ソルダ
ーレジスト、シリコーン樹脂、ポリイミド樹脂等、(こ
の後の工程において変化しないものが望ましいが、とく
にこだわらなくとも良い)で構成され、素子を固着する
までに素子搭載部202a、202bとリード線の金属
細線との接続に設けられる。材料は特に上述したものに
限らず、金属セラミックスガラス等何でもよく、又その
複合品でも良いことは言うまでもないことである。
The semiconductor elements 201a and 201b are mounted on the element mounting portion 202a,
202b with an adhesive 203b such as a gold-silicon eutectic alloy or silver paste, this excess effluent 210
b tries to flow out, but the protrusions 211a and 211b
It is blocked and cannot flow out. These protrusions are made of solder resist, silicone resin, polyimide resin, etc. (preferably something that does not change in subsequent steps, but there is no need to be particular about it). Provided for connection between the lead wire and the thin metal wire. It goes without saying that the material is not limited to those mentioned above, and may be any metal, ceramic, glass, or a composite thereof.

この突起物の存庄により、リード線206a、206b
の金属細線との接続部209a、209bにおけるその
金又は銀メッキ層205bが、汚されることなく、金又
はアルミニウムの金属線207a,207bを確実に熱
圧着でき、高品質を維持できることになった。該突起物
は該連結部を完全に横断しないでもよく、連結部の一部
分にあっても又、リード線の金属細線との接続部の周囲
をかこむような形状であっても本発明の効果は全く変わ
らないことは言うまでもないことである。
Due to the presence of these protrusions, the lead wires 206a, 206b
The gold or silver plating layer 205b at the connecting portions 209a, 209b with the fine metal wires is not contaminated, and the gold or aluminum metal wires 207a, 207b can be reliably bonded by thermocompression, and high quality can be maintained. The effect of the present invention does not apply even if the protrusion does not need to completely cross the connection part, is located in a part of the connection part, or has a shape that surrounds the connection part of the lead wire with the thin metal wire. Needless to say, nothing has changed.

以上説明したように本発明によれば素子と素子搭載部と
の固着時に発生する余剰流出物の影響をうけずに金属細
線とリード線とを接続出き、安価で信頼性の高い半導体
装置を提供するものである。
As explained above, according to the present invention, it is possible to connect thin metal wires and lead wires without being affected by excess spillage that occurs when an element and an element mounting part are fixed together, thereby producing an inexpensive and highly reliable semiconductor device. This is what we provide.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(c)は各々従来の半導体装置を示した
図で第1図(a)は平面図、第1図(b)、(c)は各
々第1図(a)のA−A′を切断した断面図、第2図(
a)、(b)は各々本発明の実施例を示した図で第2図
(a)は平面図、第2図(b)は第2図(a)のB−B
′を切断した断面図である。 なお図において、101a、101b、101c、20
1a、201b・・・・・・半導体素子、102a、1
02b、102c、202a、202b・・・・・・素
子搭載部、103b、103c、203b・・・・・・
金・シリコン共晶合金又は銀ペースト等の接着材、10
4a、104b、104c、204a、204b・・・
・・・素子の電極、105b、105c、205b・・
・・・・金又は銀のメッキ層、106a、106b、1
06c、206a,206b・・・・・・リード線、1
07a、107b、107c、207a,207b・・
・・・・金属細線、108a、108b、108c、2
08a、208b・・・・・・連結部、109a、10
9b、109c、209a,209c・・・・・・金属
細線の接続部、110c、21Ob・・・・・・余剰流
出物、211a、211b・・・・・・突起物、である
FIGS. 1(a) to (c) are diagrams showing conventional semiconductor devices, respectively. FIG. 1(a) is a plan view, and FIGS. 1(b) and (c) are respectively the same as those in FIG. 1(a). Cross-sectional view taken along A-A', Figure 2 (
Figure 2 (a) is a plan view, and Figure 2 (b) is taken along line B-B in Figure 2 (a).
FIG. In the figure, 101a, 101b, 101c, 20
1a, 201b... Semiconductor element, 102a, 1
02b, 102c, 202a, 202b...Element mounting section, 103b, 103c, 203b...
Adhesive material such as gold/silicon eutectic alloy or silver paste, 10
4a, 104b, 104c, 204a, 204b...
...Element electrodes, 105b, 105c, 205b...
... Gold or silver plating layer, 106a, 106b, 1
06c, 206a, 206b...Lead wire, 1
07a, 107b, 107c, 207a, 207b...
...Thin metal wire, 108a, 108b, 108c, 2
08a, 208b...Connection part, 109a, 10
9b, 109c, 209a, 209c...connection portions of thin metal wires, 110c, 21Ob...excess effluent, 211a, 211b...protrusions.

Claims (1)

【特許請求の範囲】[Claims] 半導体素子と、該半導体素子を固着する素子塔載部と、
該素子搭載部に連結した外部導出用リードとを有する半
導体装置において、該素子搭載部と該外部導出部リード
とが連結されている部分の近傍に突起が設けられている
ことを特徴とする半導体装置。
a semiconductor element; an element mounting part for fixing the semiconductor element;
A semiconductor device having an external lead connected to the element mounting part, characterized in that a protrusion is provided near a portion where the element mounting part and the external lead are connected. Device.
JP58112042A 1983-06-22 1983-06-22 Semiconductor device Pending JPS604245A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58112042A JPS604245A (en) 1983-06-22 1983-06-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58112042A JPS604245A (en) 1983-06-22 1983-06-22 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS604245A true JPS604245A (en) 1985-01-10

Family

ID=14576556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58112042A Pending JPS604245A (en) 1983-06-22 1983-06-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS604245A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991014282A1 (en) * 1990-03-15 1991-09-19 Fujitsu Limited Semiconductor device having a plurality of chips
US5530292A (en) * 1990-03-15 1996-06-25 Fujitsu Limited Semiconductor device having a plurality of chips
JP2008066553A (en) * 2006-09-08 2008-03-21 Furukawa Electric Co Ltd:The Semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991014282A1 (en) * 1990-03-15 1991-09-19 Fujitsu Limited Semiconductor device having a plurality of chips
US5463253A (en) * 1990-03-15 1995-10-31 Fujitsu Limited Semiconductor device having a plurality of chips
US5530292A (en) * 1990-03-15 1996-06-25 Fujitsu Limited Semiconductor device having a plurality of chips
JP2008066553A (en) * 2006-09-08 2008-03-21 Furukawa Electric Co Ltd:The Semiconductor device

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