JPS6041371A - Driving pulse generating circuit for solid-state image pickup device - Google Patents

Abstract

PURPOSE:To set optionally the number of picture elements in the horizontal direction by generating horizontal clock pulses from a pulse, which is obtained by dividing the integer-fold frequency of a subcarrier, in another oscillator. CONSTITUTION:The first oscillator 20 oscillates the integer-fold frequency of the subcarrier. A periodic signal generating circuit 21 generates a pulse having a horizontal scanning frequency from the output of the oscillator 20 and outputs this pulse and supplies this output 41 to a trigger pulse generating circuit 22. The circuit 22 generates a trigger pulse 42 for synchronous oscillation of the second oscillatort 23 from the output 41. The oscillator 23 generates a horizontal clock pulse 43 on a basis of the pulse 42. A horizontal scanning clock pulse generating circuit 24 generates two-phase horizontal clock pulses 44 from the pulse 43 and supplies them to a solid-state image pickup device. Thus, the image pickup device having any number of picture elements in the horizontal direction can be driven freely.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a drive pulse generation circuit for a television camera using a solid-state image sensor.

[Background of the invention]

A television camera is a device that uses an imaging device to convert optical information into an electrical signal, adds a synchronization signal, etc., and creates a television signal that can be easily demodulated by a receiver.

For this reason, television cameras use horizontal and vertical synchronization signals, blanking signals, and color synchronization signals (for demodulating colors).
It is necessary to generate several types of pulses, such as burst flag).

The conventional synchronization signal generation circuit oscillates at a frequency four times that of the subcarrier (3.58MHz) used for color signal transmission.
By dividing this frequency with a counter and combining the outputs of the frequency divider circuit with a logic circuit, all the pulses necessary for the television camera were created.

The radio law stipulates that the subcarrier frequency is 3.579545 MHz, and four times this frequency, ie, 14.31818 MHz, is currently widely used as the primary oscillation frequency. This is because when 14.3 MHz is used, desired pulses can be generated using simple circuits such as counters and logic circuits for subcarriers and other pulses.

However, in the case of a television camera using a solid-state image sensor, problems may occur if a frequency that is an integral multiple of the subcarrier is used as the original oscillation frequency.

For example, in the case of the MO8 type solid-state image sensor shown in FIG. By switching the output switch 5m in an orderly manner, the signals can be read out as a time-series signal.

The horizontal and vertical readout switches are opened and closed by the output pulses of the horizontal and vertical shift registers 2.3, but in order to operate these two shift registers, the two-phase horizontal clock pulses 5.6 and the horizontal scanning frequency A start pulse 7 and a two-phase vertical clock pulse 8.9 and a vertical start pulse IO of the vertical scanning frequency are required.

The resolution of a solid-state image sensor is determined by the number of pixels, but the number of pixels in the vertical direction is around 500 pixels because the number of scanning lines is determined by the television system (because there may or may not be scanning lines in the blanking area) ) is fine. In the past, the vertical clock pulse, horizontal start pulse (15.73 KHz for color cameras), and vertical start pulse were determined primarily by the television system.

However, since the number of pixels in the horizontal direction is not subject to any formal restrictions, any value can be selected, and the higher the number of horizontal pixels, the higher the horizontal clock frequency.

When the horizontal scanning frequency is fH and the number of horizontal pixels is NH, the horizontal clock fc is as follows. However, d is the effective scanning time excluding the horizontal blanking time divided by l horizontal scanning time.

As mentioned before, the original oscillation frequency f of the synchronization signal generation circuit
. Since a frequency that is an integral multiple of the subcarrier f8 is used for , it can be expressed as f = m@f (2) 8 . However, m is a positive integer.

(The clock frequency fc of equation 11 is the original oscillation frequency f.

If K is a positive integer and there is the following relationship, fc can be easily created using a frequency dividing circuit.

The value is determined from equations (1), (2), and (3), and is 227.5 in the case of the NTSC system, which is the standard broadcasting system in Japan.

Therefore, only a value that satisfies equation (5) can be selected for NH, and for example, in the case of m-=4, the value is as shown in the table below.

However, the value of d is d=0, assuming that the system blanking period is 16% and the camera blanking period is 10%.
84 and 0.9.

As mentioned above, the frequency that is an integer multiple of the subcarrier is the original oscillation,
A synchronizing signal generating circuit that generates various pulses by dividing the frequency using a counter circuit cannot generate pulses that drive an image sensor having an arbitrary number of pixels.

[Purpose of the invention]

Therefore, it is an object of the present invention to provide a drive pulse generation circuit for a solid-state image sensor that can arbitrarily set the number of pixels in the horizontal direction.

[Summary of the invention]

In order to achieve this objective, the present invention uses a counter circuit and a logic circuit to obtain a pulse group necessary for a normal color television camera from a frequency that is an integer multiple of the subcarrier, and also generates a horizontal scanning pulse group in the above-mentioned pulse group. A drive pulse generation circuit is provided that includes another oscillation circuit that oscillates in synchronization with one pulse of a frequency.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 2 shows an embodiment of the circuit of the present invention, and 20 is a circuit that oscillates at a frequency that is an integral multiple of the subcarrier (3.58 MHz). 21 is a synchronization signal which includes a logic circuit which divides the oscillation frequency by a counter circuit to obtain a horizontal scanning frequency and a vertical scanning frequency, and which combines the output pulses of the frequency dividing circuit to obtain various pulses necessary for the television camera. This is a generation circuit. Although the contents of this synchronization signal generation circuit are already known in the art and will not be described here, the synchronization signal generation circuit 21 provides pulses at a horizontal scanning frequency such as horizontal synchronization pulses and burst flag pulses.

The feature of the circuit of the present invention is that a horizontal clock pulse for driving a solid-state image sensor is generated by a separate oscillator from a pulse such as a horizontal synchronization signal obtained by dividing a frequency that is an integral multiple of a subcarrier. 23 in FIG. 2 is its oscillation circuit.

The horizontal clock pulse must always start oscillating at the same phase in synchronization with the horizontal synchronizing pulse, and an example of a circuit that satisfies this condition is the Schmitt circuit shown in FIG. The circuit 22 generates a trigger pulse 42 (FIG. 5B) for causing the oscillation circuit 23 to synchronously oscillate from a horizontal scanning frequency pulse 41 obtained from the synchronization signal generation circuit 21, for example, the horizontal synchronization pulse shown in FIG. 5A. The pulse 43 (FIG. 5C) is a horizontal clock pulse generated by the oscillator circuit 23. The solid-state image sensor shown in FIG. 1 requires two-phase horizontal clock pulses, but the circuit 24 uses two-phase horizontal clock pulses 44 (FIG. 5D) from pulse 43.
This is a circuit that changes the Harusuno phase and pulse width.

FIG. 4 shows a second embodiment that satisfies the gist of the present invention.
This is an example of a circuit designed to further improve the temperature stability of the circuit shown in the figure.

Circuits 20-24 are identical to the circuit of FIG.

The circuit 2G is a frequency dividing circuit for frequency dividing the output pulse f]/m of the oscillation circuit 23, and the reference numeral 25 is a flip-flop circuit for limiting the operating time of the frequency dividing circuit 26.

The flip-flop circuit 25 is set by a horizontal synchronizing pulse generated by the synchronizing signal generating circuit 21, and is adapted to give an operation command signal 45 to the frequency dividing circuit 26 only during the set period.

When the operation command 45 is issued from the flip-flop circuit 25, the frequency dividing circuit 2-6 starts counting the output pulses of the oscillation circuit 23, and when m pulses are counted, outputs an output pulse 46 and resets the flip-flop 26. do. Therefore, the output pulse of the flip-flop 25 is as shown in FIG.
The pulse width is as shown in the clock pulse 43.
0m pieces. When the frequency of the clock pulse 43 changes due to temperature etc., the output pulse 45 of the flip-flop
The pulse width of is also changed.

Therefore, when the output pulse 45 of the flip-flop circuit 25 is integrated by the integrating circuit 27, its DC level is determined by the oscillator 2.
It is proportional to the frequency of 3.

Therefore, by inputting the output of the integrating circuit 27 into the differential amplifier 29 and comparing it with the reference voltage 28, and controlling the power supply voltage of the oscillator 23 with an output voltage proportional to the difference, it is possible to always obtain a clock pulse with a stable frequency. can.

As is clear from the above embodiments, the driving method of the present invention has the great advantage that an image sensor having any number of pixels in the horizontal direction can be freely driven.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a solid-state image sensor, FIG. 2 is a block diagram of a drive pulse generation circuit according to the present invention, FIG. 3 is a diagram showing a specific example of the generator 23, and FIG. A block diagram of a drive pulse generation circuit showing an improved embodiment, and FIG. 5 shows signal waveform diagrams in each of the above embodiment circuits. In FIG. 2, 20 is a first oscillator, 21 is a synchronization signal generation circuit, and 22 is a trigger pulse generation port /-P T11
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Claims (1)

[Claims] The first wave oscillates at a frequency that is an integral multiple of the subcarrier for color signal transmission.
a first signal generation circuit that generates a synchronizing signal of a predetermined frequency from the output of the oscillator, and a second oscillator that operates in oscillation in synchronization with one of the signals obtained from the first signal generation circuit. , and a second signal generation circuit that generates a horizontal scanning clock pulse for a solid-state image sensor from the output of the second oscillator.