JPS6041243A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6041243A
JPS6041243A JP14941283A JP14941283A JPS6041243A JP S6041243 A JPS6041243 A JP S6041243A JP 14941283 A JP14941283 A JP 14941283A JP 14941283 A JP14941283 A JP 14941283A JP S6041243 A JPS6041243 A JP S6041243A
Authority
JP
Japan
Prior art keywords
carbon
film
oxide film
layer
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14941283A
Other languages
Japanese (ja)
Other versions
JPH0152900B2 (en
Inventor
Tatsuichi Ko
高 辰一
Jiro Oshima
次郎 大島
Takashi Yasujima
安島 隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP14941283A priority Critical patent/JPS6041243A/en
Publication of JPS6041243A publication Critical patent/JPS6041243A/en
Publication of JPH0152900B2 publication Critical patent/JPH0152900B2/ja
Granted legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To manufacture a semiconductor device in simple steps by forming a thin oxidized film portion including carbon and an oxidized film having a thick oxidized film portion including no carbon continued slowly to the thin oxidized film portion. CONSTITUTION:A carbon inclusion preventive film 23 is formed on the upper surface of a semiconductor substrate 21, the film 23 is patterned, and with the film 23 as a mask carbon is selectively introduced to the upper surface portion of the substrate 21, thereby forming a carbon including layer 25. After the film 23 is removed, an oxidized film 26 in which the upper surface of the substrate 21 is oxidized is formed. The oxygen diffusing speed is decelerated depending upon the quantity of the included carbon in the layer 25, with the result that a thin oxidized film portion 26c including carbon is formed at the portion corresponding to the layer 25, a thick oxidized film portion 26o continued slowly to the portion 26c is formed on the region except the layer 25. Then, it is etched at the same speed, and the remaining oxidize film 26o having slow opening section is formed on the region which does not correspond to the layer.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、半導体装置の製造方法に関するもので特にコ
ンタクトホール部分で段切れの恐れのない絶縁膜を有す
る半導体装置の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having an insulating film that is free from breakage at contact hole portions.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来よ)用いられている半導体装置内の素子間を接続す
る配線部の形成方法の概略は次のようなものである。す
なわち、第1図に示すように、不純物の選択拡散或いは
選択注入技術を用いて、半導体基板11に所定の素子領
域12を形成すると共に半導体基板11の上面にシリコ
ン酸化膜等の絶縁膜13を形成する。そして、この絶縁
膜13に第2図に示すように窓明けを行い、素子接続部
となる部位に開口部14を形成する。次いで半導体基板
11内の素子領域12と後に形成される配線層との良好
な接続性が得られるように、上記開口部14からn(ま
たはp )イオン注入を用い高濃度のイオン注入)IJ
 15を開口部14直下に形成する。
The outline of a conventionally used method for forming a wiring portion that connects elements in a semiconductor device is as follows. That is, as shown in FIG. 1, a predetermined element region 12 is formed in a semiconductor substrate 11 using selective diffusion or selective implantation technology of impurities, and an insulating film 13 such as a silicon oxide film is formed on the upper surface of the semiconductor substrate 11. Form. Then, a window is opened in this insulating film 13 as shown in FIG. 2, and an opening 14 is formed at a portion that will become an element connection portion. Next, in order to obtain good connectivity between the element region 12 in the semiconductor substrate 11 and the wiring layer to be formed later, high-concentration ion implantation (IJ) is performed using n (or p) ion implantation from the opening 14.
15 is formed directly below the opening 14.

続いて第3図に示すように上記イオン注入層15の活性
化熱処理等を行い、同時にこの熱処理時に基板11表面
に薄い酸化膜138を形成する。
Subsequently, as shown in FIG. 3, the ion implantation layer 15 is subjected to activation heat treatment, etc., and at the same time, a thin oxide film 138 is formed on the surface of the substrate 11 during this heat treatment.

次いで、第4図に示すように上記酸化膜13sに所定形
状のコンタクトホール14cを開口する。
Next, as shown in FIG. 4, a contact hole 14c of a predetermined shape is opened in the oxide film 13s.

続いて第5図に示すように、基板の上面に金属膜16を
被着し、所定の・量ターンに)?ターニングすることに
よシ各素子領域を接続する配線層を形成する。
Subsequently, as shown in FIG. 5, a metal film 16 is deposited on the upper surface of the substrate and turned by a predetermined amount. By turning, a wiring layer connecting each element region is formed.

以上のようにして形成した装置では、絶縁膜13に開口
部14を形成するが、この開口部14の断面が急峻で大
きな段差を有するため、この段差部上に形成される金属
膜16に第5図のaで示すようないわゆる段切れと呼ば
れる配線切れを生じやすいものであった。
In the device formed as described above, the opening 14 is formed in the insulating film 13, but since the cross section of the opening 14 is steep and has a large step, the metal film 16 formed on the step has a Wiring breaks, so-called step breaks, as shown by a in FIG. 5, were likely to occur.

このような従来の装置の段切れの対策として、例えば、
第6図に示すように、半導体基板11上に絶縁膜13と
してシリコン酸化膜13oおよび低温の熱処理で軟化す
る例えばBSG (ホウ素シリケートガラス)膜131
等を11)Llに積層被着して、絶縁膜13の窓明は後
熱処理を行って絶縁膜13の段差を滑らかにする方法も
ある。
As a countermeasure against breakage in such conventional equipment, for example,
As shown in FIG. 6, a silicon oxide film 13o is formed as an insulating film 13 on a semiconductor substrate 11, and a BSG (boron silicate glass) film 131, which is softened by low-temperature heat treatment, is formed on the semiconductor substrate 11.
11) There is also a method of laminating and depositing the layers on Ll and performing a post-heat treatment to smooth out the steps of the insulating film 13.

このようなものでは、金属膜16の段切れは防止できる
ものの、工程が煩雑であるという欠点があった。
Although such a device can prevent the metal film 16 from breaking, it has the disadvantage that the process is complicated.

また、これらの方法では配線層との接続部分ではn+(
またはp+)イオン注入用の開口部14とコンタクトホ
ール14cとのマスク合わせ精度を考1iJI してコ
ンタクト部分の面積の余裕をかなり大きくする必要があ
り、素子の微細化を阻んでいた。
In addition, in these methods, n+(
(or p+) It is necessary to consider the accuracy of mask alignment between the opening 14 for ion implantation and the contact hole 14c, and to make the margin for the area of the contact portion considerably large, which hinders miniaturization of the device.

また、この他に、いわゆるLOCO8(LOCalOx
idation of 5ilicon)法によりシリ
コン基板表面に選択的に酸化膜を形成する方法もある。
In addition to this, so-called LOCO8 (LOCalOx
There is also a method in which an oxide film is selectively formed on the surface of a silicon substrate by an oxidation of 5 silicon method.

この方法は、シリコン基板表面にシリコン窒化膜を被着
し、このシリコン窒化膜をノやターニングし、さらにこ
のシリコン窒化膜を耐酸化性マスクとしてシリコン基板
表面を選択酸化してシリコン酸化膜のパターンを形成し
、不要となるシリコン窒化膜を除去するものである。こ
の方法によれば、シリコン酸化膜の開口部の断面は滑ら
かなものとなるが、シリコン窒化膜の被着工程およびそ
のパターニング工程、さらには選択酸化終了後の不要な
シリコン窒化膜・ぐターンの除去工程が煩しいという欠
点を有していた。
This method involves depositing a silicon nitride film on the surface of a silicon substrate, turning the silicon nitride film, and then selectively oxidizing the silicon substrate surface using the silicon nitride film as an oxidation-resistant mask to form a pattern of silicon oxide film. is formed, and the unnecessary silicon nitride film is removed. According to this method, the cross section of the opening in the silicon oxide film becomes smooth, but it is difficult to apply the silicon nitride film in the deposition process and its patterning process, as well as remove unnecessary silicon nitride film and grooves after selective oxidation. It has the disadvantage that the removal process is cumbersome.

〔発明の目的〕[Purpose of the invention]

この発明は上記のような点に鑑みなされたもので、その
目的とするところは段切れの恐れのない、緩やかな段面
構造の絶縁膜を有する装置を簡易に製造することのでき
る半導体装置の製造方法を提供し、生産性の向上を図ろ
うとするものである。
The present invention was made in view of the above points, and its purpose is to provide a semiconductor device that can easily manufacture a device having an insulating film with a gradual stepped structure without the fear of step breakage. The aim is to provide a manufacturing method and improve productivity.

〔発明の概要〕[Summary of the invention]

すなわちこの発明に係る半導体装置の製造方法では、半
導体基板の上面に例えばシリコン酸化膜或いはレゾスト
膜等からなる炭素導入阻止膜を形成しこの炭素導入阻止
膜を・母ターニング5− し、この炭素導入阻止膜をマスクとして半導体基板の上
面部分に選択的【炭素を導入し炭素導入層を形成する。
That is, in the method for manufacturing a semiconductor device according to the present invention, a carbon introduction prevention film made of, for example, a silicon oxide film or a resist film is formed on the upper surface of a semiconductor substrate, and this carbon introduction prevention film is subjected to main turning 5-. Using the blocking film as a mask, carbon is selectively introduced into the upper surface of the semiconductor substrate to form a carbon-introduced layer.

そして上記炭素導入阻止膜を除去した後、半導体基板の
上面を酸化させ酸化膜を形成する。ここで炭素導入層で
は導入した炭素の量に依存して酸素の拡散速度が低下す
る。
After removing the carbon introduction blocking film, the upper surface of the semiconductor substrate is oxidized to form an oxide film. Here, in the carbon-introduced layer, the oxygen diffusion rate decreases depending on the amount of introduced carbon.

すなわち炭素を多量に含んだ領域を設けることにより、
この炭素を含んだ領域およびその下部に位置する例えば
酸化膜部分やシリコン基板界面への酸素供給量をその他
の領域と比較し減少させて、その領域における酸化膜の
成長量を抑制できる。その結果炭素導入層に相当する部
位には炭素を含む薄い酸化膜部分が形成され、炭素導入
層以外の領域に上記薄い酸化膜部分と緩やかに連続した
厚い酸化膜部分が形成される。
In other words, by providing a region containing a large amount of carbon,
By reducing the amount of oxygen supplied to this carbon-containing region and the oxide film portion or silicon substrate interface located below it, compared to other regions, the amount of oxide film growth in that region can be suppressed. As a result, a thin oxide film portion containing carbon is formed in a portion corresponding to the carbon-introduced layer, and a thick oxide film portion that is loosely continuous with the thin oxide film portion is formed in a region other than the carbon-introduced layer.

その後、薄い酸化膜部分が除去され厚い酸化膜部分が残
るように薄い酸化膜部分と厚い酸化膜部分とを同一速度
でエツチングし、上記炭素導入層に相当しない領域に緩
やかな開口部断面を有する残留酸化膜を形成するように
したもので6一 ある。
After that, the thin oxide film part and the thick oxide film part are etched at the same speed so that the thin oxide film part is removed and the thick oxide film part remains, and a gentle opening cross section is formed in the region not corresponding to the carbon-introduced layer. There are 6 types that are designed to form a residual oxide film.

ここで、上記炭素導入層をシIJ jン基体の表面領域
に形成してもよいし、半導体基板上面に適宜予め形成さ
れた酸化膜に形成してもよい。
Here, the carbon-introduced layer may be formed on the surface region of the silicon substrate, or may be formed on an oxide film suitably formed in advance on the upper surface of the semiconductor substrate.

また、オーミックコンタクトを得るためのイオン注入工
程で形成する注入阻止膜を、上記炭素導入阻止膜として
使用すれば炭素の選択導入のための専用のi!ターニン
グを行う必要がない。
Furthermore, if the implantation blocking film formed in the ion implantation process for obtaining ohmic contact is used as the carbon introduction blocking film, a dedicated i! No need to turn.

〔発明の実施例〕[Embodiments of the invention]

以下図面を参照してこの発明の一実施例につき抵抗素子
の例をとり、説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below by taking an example of a resistance element with reference to the drawings.

まず、第7図に示すようにn形シリコン半導体基板21
に抵抗体となるp−拡散層22を形成する。次いで、こ
の基板21上に例えばフォトレゾスト或いはシリコン酸
化膜等の誘電体膜からなる注入阻止部材膜23を被着し
、抵抗体のコンタクト位置に開口部23cを開口する。
First, as shown in FIG. 7, an n-type silicon semiconductor substrate 21
Then, a p-diffusion layer 22 which becomes a resistor is formed. Next, an injection blocking member film 23 made of a dielectric film such as a photoresist or a silicon oxide film is deposited on the substrate 21, and an opening 23c is formed at the contact position of the resistor.

続いて、第8図に示すように、後に形成する配線層との
オーミックコンタクトを得るため、上記注入阻止部材膜
23をマスクとしたp+イオン注入を例えば加速電圧1
80 keV、ポロンの濃度2×1015c1n−2の
条件で行い畝注入層24を形成する。引き続き、例えば
加速電圧501CeV。
Subsequently, as shown in FIG. 8, in order to obtain ohmic contact with the wiring layer to be formed later, p+ ions are implanted using the implantation blocking member film 23 as a mask, for example, at an acceleration voltage of 1.
The ridge injection layer 24 is formed under the conditions of 80 keV and a poron concentration of 2 x 1015c1n-2. Then, for example, the acceleration voltage is 501 CeV.

濃度I X 10’ 5cm−2の条件でC″−注入(
炭素注入)を行い、炭素注入層25を基板21の比較的
浅い表面領域に形成する。
C″-injection (
carbon implantation) to form a carbon implantation layer 25 in a relatively shallow surface region of the substrate 21.

次いで、上記注入阻止部材膜23を除去した後、第9図
に示すようにウェハを通常の酸化炉中に設置し、基板2
1表面の酸化を行い酸化膜26を形成する。この際に、
基板21内に導入された炭素が酸化膜中に取り込まれる
と、炭素を含む酸化膜の酸素拡散速度が遅いため、炭素
注入層25上の酸化膜厚が他の領域に比らべ薄くなる。
Next, after removing the injection blocking member film 23, the wafer is placed in a normal oxidation furnace as shown in FIG.
One surface is oxidized to form an oxide film 26. At this time,
When the carbon introduced into the substrate 21 is incorporated into the oxide film, the oxide film thickness on the carbon injection layer 25 becomes thinner than on other regions because the oxygen diffusion rate in the oxide film containing carbon is slow.

この場合では、炭素注入層25上の薄い酸化膜部分26
cは約3000!a度の膜厚となり、炭素注入層25以
外の領域の厚い酸化膜部分26.は約8000にの膜厚
となる。
In this case, the thin oxide film portion 26 on the carbon injection layer 25
c is about 3000! The film thickness is a degree, and the thick oxide film portion 26. The film thickness is approximately 8,000 mm.

読込て炭素を含む酸化膜部分(薄い酸化膜部分)26c
および炭素を含まない酸化膜部分(厚い酸化膜部分)2
6oのエツチングレートが略変わらないような、例えば
ぶつ酸系薬品を用いたエツチングにより、上記酸化膜2
6を約3000Xの一定膜厚でエツチング除去する。こ
れにより第10図に示すように上記厚い酸化膜部分25
oが約5000Xの膜厚で残留酸化膜として半導体基板
2ノ上に残り、これをフィールド絶縁膜として他の素子
領域との分゛離に用いる。
Read the oxide film part containing carbon (thin oxide film part) 26c
and oxide film part that does not contain carbon (thick oxide film part) 2
The above-mentioned oxide film 2 is etched by etching using, for example, an acid-based chemical such that the etching rate of 6o does not change substantially.
6 is removed by etching at a constant film thickness of about 3000X. As a result, as shown in FIG.
o remains on the semiconductor substrate 2 as a residual oxide film with a film thickness of about 5000×, and this is used as a field insulating film to separate it from other device regions.

次に第11図に示すように、アルミニウム等の金属膜2
7をウェハ上に蒸着し、・臂夕〜ニングを行うことによ
シ、所定の各部を配線する配線層を形成する。
Next, as shown in FIG.
A wiring layer for wiring each predetermined part is formed by vapor-depositing 7 on a wafer and performing varnishing.

ここで上記方法の半導体基板の酸化工程において、炭素
注入層に注入された炭素量に応じてその部分の酸素の拡
散速度が低下するため、炭素注入層の中央部への酸素の
拡散量は少なく、炭素注入層の周辺部には周囲から多く
の酸素が回シ込むように拡散される。この結果、半導体
基板上には、炭素を含んだ薄い酸化膜部分とこの薄い酸
化膜部分に緩やかに連続した炭素を含まない厚い酸化膜
部分とを有した酸化膜が形成9− される。従って、上記酸化膜の薄い酸化膜部分を除去す
るように一定膜厚で酸化膜をエツチングすれば、厚い酸
化膜部分に由来して半導体基板上に残る残留酸化膜の開
口部断面は緩やかに傾斜したものとなる。
In the oxidation process of the semiconductor substrate in the above method, the diffusion rate of oxygen in that part decreases depending on the amount of carbon injected into the carbon injection layer, so the amount of oxygen diffusion into the center of the carbon injection layer is small. , a large amount of oxygen is diffused into the periphery of the carbon-injected layer from the surrounding area. As a result, an oxide film 9- is formed on the semiconductor substrate, having a thin oxide film portion containing carbon and a thick oxide film portion not containing carbon, which is loosely continuous to the thin oxide film portion. Therefore, if the oxide film is etched to a constant thickness so as to remove the thin oxide film portion of the oxide film, the cross section of the opening of the residual oxide film remaining on the semiconductor substrate due to the thick oxide film portion will be gently sloped. It becomes what it is.

これにより、上記残留酸化Illの開口部から残留酸化
膜上に渡って金属配線層を均一に形成することができ、
配線層の段切れの発生を低減させることができる。
Thereby, a metal wiring layer can be uniformly formed from the opening of the residual oxide Ill over the residual oxide film,
The occurrence of disconnections in the wiring layer can be reduced.

ま走、オーミックコンタクトを得るための不純物のイオ
ン注入工程に用いる注入阻止部材膜を炭素導入の阻止膜
として使用すれば、従来のようにコンタクト部にパター
ニングをくり返した沙、シリコン窒化膜のパターニング
等を行ったりする必要がなく、製造工程の大1)1な短
縮化、簡素化を図ることができる。
However, if the implantation blocking material film used in the impurity ion implantation process to obtain ohmic contacts is used as a blocking film for carbon introduction, it is possible to repeat patterning on the contact area as in the conventional method, patterning of silicon nitride film, etc. There is no need to carry out 1) major shortening and simplification of the manufacturing process.

さらに、従来のようにオーミックコンタクトのための不
純物注入工程とコンタクトホールの開口工程とのマスク
合わせずれを見こんでコンタクト部を不必要に大きくす
る必要がないため、−10= 素子の高集積化にも効果的である。
Furthermore, unlike in the past, there is no need to unnecessarily enlarge the contact area in anticipation of mask misalignment between the impurity implantation process for ohmic contact and the contact hole opening process. It is also effective.

尚、第11図では、金属膜27下のコンタクト部に炭素
注入層25が残っているように示しであるが、アルミニ
ウムの合金化処理すなわちシンタリング処理中に基板2
1表面に残った炭素は殆んどアルミニウム中に取シ込ま
れるものであシ、さらに第9図に示す基板21表面の酸
化工程において酸化膜26を充分に厚く形成すれば炭素
が殆んどこの酸化膜26中に塩9込まれるため、炭素の
影響による素子特性の変化は殆んどみられない。
In addition, in FIG. 11, the carbon injection layer 25 is shown to remain in the contact area under the metal film 27, but during the aluminum alloying process, that is, the sintering process, the substrate 2
Most of the carbon remaining on the surface of the substrate 21 is absorbed into the aluminum, and if the oxide film 26 is formed sufficiently thick in the oxidation process of the surface of the substrate 21 shown in FIG. Since the salt 9 is incorporated into the oxide film 26, almost no change in device characteristics due to the influence of carbon is observed.

また、上記実施例では炭素注入層25をシリコン基体の
表面領域に形成する場合につき示したが、シリコン基体
の上面に予め酸化膜が形成されている半導体基板を用い
、この基板上に炭素導入を阻止する所定パターンの厚い
膜を形成して炭素を選択的に上記酸化膜に導入し、以下
上記実施例と同様な工程を進めてもよい。
Furthermore, although the above embodiment shows the case where the carbon injection layer 25 is formed on the surface region of the silicon substrate, a semiconductor substrate on which an oxide film is previously formed on the upper surface of the silicon substrate is used, and carbon is introduced onto this substrate. Carbon may be selectively introduced into the oxide film by forming a thick film with a predetermined pattern to prevent carbon from entering the oxide film, and then the same steps as in the above embodiments may be performed.

さらにまた、上記実施例では、半導体基板の上面に炭素
を導入する方法として選択イオン注入法を用いる場合を
示したが、これはイオン注入に限らず他の導入方法によ
ってもよい。
Furthermore, in the above embodiments, the selective ion implantation method is used as a method of introducing carbon into the upper surface of the semiconductor substrate, but this is not limited to ion implantation, and other introduction methods may be used.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、金属配線層の段切れの
恐れのない緩やかな開口部断面を有する絶縁膜を備えた
半導体装置を簡単な工程により製造することのできる半
導体装置の製造方法を提供でき、生産性の向上を図るこ
とができる。
As described above, according to the present invention, there is provided a method for manufacturing a semiconductor device that can manufacture a semiconductor device having an insulating film having a gentle opening cross section without fear of breakage of a metal wiring layer through a simple process. It is possible to improve productivity.

【図面の簡単な説明】 第1図乃至第5図は従来の半導体装置の製造方法の一例
を説明するための断面図、第6図は従来の半導体装置の
製造方法の他の一例を説明するための断面図、第7図乃
至第11図はこの発明の一実施例に係る半導体装置の製
造方法を説明するための断面図である。 21・・・半導体基板、23・・・注入阻止部材膜、2
5・・・炭素注入層(炭素導入層)、26・・・酸化膜
、26c・・・薄い酸化膜部分、26o・・・厚い酸化
膜部分、27・・・金属膜。 区 区 区 −へ の 鵬 糎 鞍 246− @ 区 −su″ 味 賊
[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1 to 5 are cross-sectional views for explaining an example of a conventional method for manufacturing a semiconductor device, and FIG. 6 is a cross-sectional view for explaining another example of a conventional method for manufacturing a semiconductor device. FIGS. 7 to 11 are cross-sectional views for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. 21... Semiconductor substrate, 23... Injection blocking member film, 2
5... Carbon injection layer (carbon introduction layer), 26... Oxide film, 26c... Thin oxide film portion, 26o... Thick oxide film portion, 27... Metal film. ward ward ward 246- @ ward `` taste bandit

Claims (1)

【特許請求の範囲】[Claims] 半導体基板の上面に所定部分に開口部を有する炭素導入
阻止膜を選択的に形成する工程と、上記炭素導入阻止膜
をマスクとして半導体基板の上面部分に選択的に炭素を
導入し炭素導入層を形成する工程と、上記炭素導入阻止
膜を除去した後半導体基板の上面を酸化させることによ
り、上記炭素導入層部分に炭素を含む薄い酸化膜部分を
有し炭素導入層以外の領域に炭素を含まない厚い酸化膜
部分を有する酸化膜を形成する工程と、上記薄い酸化膜
部分直下の半導体基板を露出させるとともに上記炭素導
入層に相当しない領域に形成された厚い酸化膜部分の一
部を残すように上記厚い酸化膜部分と薄い酸化膜部分と
を略同−のエツチング速度でエツチングする工程とを具
備することを特徴とする半導体装置の製造方法。
A step of selectively forming a carbon introduction prevention film having openings at a predetermined portion on the upper surface of the semiconductor substrate, and a step of selectively introducing carbon into the upper surface portion of the semiconductor substrate using the carbon introduction prevention film as a mask to form a carbon introduction layer. By oxidizing the upper surface of the semiconductor substrate after removing the carbon introduction blocking film, a thin oxide film containing carbon is formed in the carbon introduction layer, and a region other than the carbon introduction layer contains carbon. a step of forming an oxide film having a thick oxide film portion, and a step of exposing the semiconductor substrate directly under the thin oxide film portion, and leaving a part of the thick oxide film formed in a region not corresponding to the carbon-introduced layer; 1. A method of manufacturing a semiconductor device, comprising: etching the thick oxide film portion and the thin oxide film portion at substantially the same etching rate.
JP14941283A 1983-08-16 1983-08-16 Manufacture of semiconductor device Granted JPS6041243A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14941283A JPS6041243A (en) 1983-08-16 1983-08-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14941283A JPS6041243A (en) 1983-08-16 1983-08-16 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS6041243A true JPS6041243A (en) 1985-03-04
JPH0152900B2 JPH0152900B2 (en) 1989-11-10

Family

ID=15474551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14941283A Granted JPS6041243A (en) 1983-08-16 1983-08-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6041243A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63170046U (en) * 1987-04-18 1988-11-04
JPH01259538A (en) * 1988-04-11 1989-10-17 Agency Of Ind Science & Technol Formation of oxide film

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63170046U (en) * 1987-04-18 1988-11-04
JPH01259538A (en) * 1988-04-11 1989-10-17 Agency Of Ind Science & Technol Formation of oxide film

Also Published As

Publication number Publication date
JPH0152900B2 (en) 1989-11-10

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