JPS6041072U - Hybrid integrated circuit device - Google Patents
Hybrid integrated circuit deviceInfo
- Publication number
- JPS6041072U JPS6041072U JP13180483U JP13180483U JPS6041072U JP S6041072 U JPS6041072 U JP S6041072U JP 13180483 U JP13180483 U JP 13180483U JP 13180483 U JP13180483 U JP 13180483U JP S6041072 U JPS6041072 U JP S6041072U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit device
- hybrid integrated
- conductor
- conductor pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の混成集積回路装置の斜視図、第２図は本
考案による混成集積回路装置の斜視図である。
１・・・混成集積回路基板、２ａ、２ｂ・・・導体パタ
ーン、３・・・ガラスパターン、６・・・抵抗パターン
。FIG. 1 is a perspective view of a conventional hybrid integrated circuit device, and FIG. 2 is a perspective view of a hybrid integrated circuit device according to the present invention. DESCRIPTION OF SYMBOLS 1... Hybrid integrated circuit board, 2a, 2b... Conductor pattern, 3... Glass pattern, 6... Resistance pattern.
Claims (1)
パターンに切目を入れ該切口内に第２の導体パターンを
通して両道体パターンを同一平面上に形成し、絶縁層を
介して第２の導体パターン上に形成した抵抗パターンで
第１の導体パターンの切目を結合し、第１と第２との導
体パターンのクロスオーバーを形成したことを特徴とす
る混成集積回路装置。。It has two conductor patterns, a first and a second, a cut is made in the first conductor pattern, a second conductor pattern is passed through the cut, and both conductor patterns are formed on the same plane, with an insulating layer interposed therebetween. 1. A hybrid integrated circuit device, characterized in that a resistor pattern formed on the second conductor pattern connects the cuts of the first conductor pattern to form a crossover between the first and second conductor patterns. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13180483U JPS6041072U (en) | 1983-08-26 | 1983-08-26 | Hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13180483U JPS6041072U (en) | 1983-08-26 | 1983-08-26 | Hybrid integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6041072U true JPS6041072U (en) | 1985-03-23 |
Family
ID=30297863
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13180483U Pending JPS6041072U (en) | 1983-08-26 | 1983-08-26 | Hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6041072U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61212091A (en) * | 1985-03-18 | 1986-09-20 | 株式会社日立製作所 | Thick film hybrid integrated circuit |
| JPH0326370U (en) * | 1989-07-26 | 1991-03-18 | ||
| JPH0379857U (en) * | 1989-12-04 | 1991-08-15 |
-
1983
- 1983-08-26 JP JP13180483U patent/JPS6041072U/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61212091A (en) * | 1985-03-18 | 1986-09-20 | 株式会社日立製作所 | Thick film hybrid integrated circuit |
| JPH0326370U (en) * | 1989-07-26 | 1991-03-18 | ||
| JPH0536530Y2 (en) * | 1989-07-26 | 1993-09-16 | ||
| JPH0379857U (en) * | 1989-12-04 | 1991-08-15 | ||
| JPH0536531Y2 (en) * | 1989-12-04 | 1993-09-16 |
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