JPS6039158U - micro program controller - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

FIG. 1 is a configuration block diagram of a conventional example of a microprogram controller, FIGS. 2 and 3 are flowcharts of interrupt processing, FIG. 4 is a configuration block diagram of an embodiment of a microprogram controller according to the present invention, and FIG. The figure is a flowchart of the microprogram when an interrupt occurs, and FIG. 6 is a flowchart of each signal when an interrupt occurs. 10... Control clock, 30... Counter, 50... = pipeline register, 60... Micro program memory, 70... Pointer, 80...
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Claims (1)

[Claim for Utility Model Registration] A counter counts clock signals generated by a control clock, executes a microroutine stored in a microprogram memory according to the output of this counter, and generates a control signal according to the execution result. In a microprogram controller that outputs data from a pipeline register and, when an interrupt signal is given, interrupts the currently executing microroutine and executes an interrupt processing routine, the counter is updated every time a clock signal of the control clock is generated. an interrupt signal monitoring unit that senses an interrupt signal regardless of the operation and reads an interrupt processing routine from the microprogram memory and executes it when an interrupt occurs, and a microroutine that was executed immediately before executing the interrupt processing routine; A microprogram controller comprising a pointer that holds an address and causes the original microroutine to be executed when the execution of the interrupt processing routine is finished.