JPS6030645U - phase synchronized receiver - Google Patents
phase synchronized receiverInfo
- Publication number
- JPS6030645U JPS6030645U JP12140683U JP12140683U JPS6030645U JP S6030645 U JPS6030645 U JP S6030645U JP 12140683 U JP12140683 U JP 12140683U JP 12140683 U JP12140683 U JP 12140683U JP S6030645 U JPS6030645 U JP S6030645U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- phase
- amplifier
- output signal
- frequency converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、従来の位相同期型受信機の構成を示すブロッ
ク図、第２図は、この考案による位相同期型受信機の構
成を示すブロック図であり、１は周波数変換器、２は増
幅器、３，３ａｔ ３ｂは位相検波器、４は基準発振
器、５．５ａ、５ｂは、ループフィルタ、６は電圧制御
発振器、７は可変減衰器である。なお、図中、同一ある
いは相当部分には、同一符号を付して示しである。FIG. 1 is a block diagram showing the configuration of a conventional phase-locked receiver, and FIG. 2 is a block diagram showing the configuration of a phase-locked receiver according to this invention. 1 is a frequency converter, 2 is an amplifier. , 3, 3at 3b is a phase detector, 4 is a reference oscillator, 5.5a, 5b are loop filters, 6 is a voltage controlled oscillator, and 7 is a variable attenuator. In the drawings, the same or corresponding parts are designated by the same reference numerals.
Claims (1)
換器と、上記周波数変換器につながり、変換された信号
の強度を可変する可変減衰器と、上記可変減衰器につな
がり、減衰された信号を増幅する増幅器と、位相同期ル
ープを構成するための基準信号を発生する基準発振器と
、上記増幅器の出力信号と、上記基準発振器の出力信号
の位相比較を行ない、位相同期ループの誤差信号を出力
する位相検波器と、上記位相検波器につながり、位相同
期ループの誤差信号を平滑し、増幅するループフィルタ
と、上記ループフィルタにつながり、ループフィルタの
出力電圧により発振周波数が変化し、上記周波数変換器
へ信号を供給する電圧制御発振器と、上記周波数変換器
の出力信号と、上記増幅器の出力信号の位相を比較し、
増幅器による位相遅延が最小になる様に制御するための
誤差信号を出力する位相検波器と、この出力信号を平滑
、増幅し、可変増幅器へ制御信号を供給するループフィ
ルタとを備え、過大受信信号による上記増幅器の位相歪
を抑制することを特徴とする位相同期型受信機。A frequency converter that converts the received signal to a frequency for performing synchronous detection, a variable attenuator that is connected to the frequency converter and that varies the intensity of the converted signal, and a variable attenuator that is connected to the variable attenuator that amplifies the attenuated signal. a reference oscillator that generates a reference signal for configuring a phase-locked loop; a phase-comparing amplifier that compares the output signal of the amplifier with the output signal of the reference oscillator and outputs an error signal of the phase-locked loop; A detector, a loop filter that is connected to the phase detector, smoothes and amplifies the error signal of the phase-locked loop, and is connected to the loop filter, and the oscillation frequency changes depending on the output voltage of the loop filter, which is then sent to the frequency converter. Comparing the phases of a voltage controlled oscillator supplying a signal, an output signal of the frequency converter, and an output signal of the amplifier;
Equipped with a phase detector that outputs an error signal for controlling the phase delay caused by the amplifier to be minimized, and a loop filter that smooths and amplifies this output signal and supplies a control signal to the variable amplifier, and detects excessive received signals. A phase synchronized receiver characterized by suppressing phase distortion of the amplifier described above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12140683U JPS6030645U (en) | 1983-08-04 | 1983-08-04 | phase synchronized receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12140683U JPS6030645U (en) | 1983-08-04 | 1983-08-04 | phase synchronized receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6030645U true JPS6030645U (en) | 1985-03-01 |
Family
ID=30277885
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12140683U Pending JPS6030645U (en) | 1983-08-04 | 1983-08-04 | phase synchronized receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6030645U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62105409U (en) * | 1985-12-24 | 1987-07-06 |
-
1983
- 1983-08-04 JP JP12140683U patent/JPS6030645U/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62105409U (en) * | 1985-12-24 | 1987-07-06 | ||
| JPH0317140Y2 (en) * | 1985-12-24 | 1991-04-11 |
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