JPS602868U - Printed board - Google Patents
Printed boardInfo
- Publication number
- JPS602868U JPS602868U JP1983094559U JP9455983U JPS602868U JP S602868 U JPS602868 U JP S602868U JP 1983094559 U JP1983094559 U JP 1983094559U JP 9455983 U JP9455983 U JP 9455983U JP S602868 U JPS602868 U JP S602868U
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- circuit board
- view
- prevention part
- chip resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はチップ型抵抗器の一例を示す平面図、第２図は
同じく縦断面図、第３図および第４図は従来例を示し、
第３図はチップ型抵抗器を備えた基板の平面図、第４図
は第３図ＩＶ−ＩＶ断面図、第５図および第６図は本考
案の第１実施例を示し、第５図はチップ型抵抗器を備え
た基板の平面図、第６図は第５図Ｖｌ−ＶＩ断面図、第
７図および第８図は第２実施例を示し、第７図はチップ
型抵抗器を備えた基板の平面図、第８図は第７図■−■
断面図、第９図および第１０図は第３実施例を示し、第
９図はチップ型抵抗器を備えた基板の平面図、第１０図
は第９図Ｘ−Ｘ断面図、第１１図は第４実施例を示すチ
ップ型抵抗器を備えた基板の平面図、第１２図および第
１３図は第５実施例を示し、第１２図はチップ型抵抗器
を備えた基板の平面図、第１３図は第１２図ｘｍ−ｘｍ
断面図、第１４図は第６実施例を示すチップ型抵抗器を
備えた基板の縦断面図、第１５図および第１６図は第７
実施例を示し、第１５図はチップ型抵抗器の平面図、第
１６図はチップ型抵抗器を備えた基板の平面図、第１７
図および第１８図は第８実施例を示し、第１７図はチッ
プ型抵抗器を備えた基板の平面図、第１８図は部分回路
図、第１９図は第９実施例を示すチップ型抵抗器を備え
た基板の平面図である。
１・・・・・・チップ型抵抗器、１１・・・・・・セラ
ミック板、１２・・・・・・内部電極、１３・・・・・
・抵抗体、１４・・・・・・ガラスコー′ト保護膜、１
５・・・・・・外部電極、２・・・・・・基板、３・・
・・・・配線パターン、３１・・・・・・端子、３２・
・・・・・ハンダ、４・・・・・・ベッド、４１・・・
・・・逆げ溝、ａ・・・・・・起動位置、ａｌ・・・・
・・助走区間、２２．２３゜２４・・・・・・透孔（焼
損防止部）、３３・・・・・・保護体（焼損防止部）、
５・・・・・・接着剤（焼損防止部）。FIG. 1 is a plan view showing an example of a chip resistor, FIG. 2 is a vertical cross-sectional view, and FIGS. 3 and 4 are conventional examples.
3 is a plan view of a board equipped with a chip resistor, FIG. 4 is a sectional view taken along line IV-IV in FIG. 3, FIGS. 5 and 6 show a first embodiment of the present invention, and FIG. 6 is a plan view of a board equipped with a chip resistor, FIG. 6 is a sectional view taken along line Vl-VI in FIG. The plan view of the equipped board, Fig. 8, is the same as Fig. 7 ■-■
9 and 10 show the third embodiment, FIG. 9 is a plan view of a board equipped with a chip resistor, and FIG. 10 is a sectional view taken along line XX in FIG. 9, and FIG. 12 and 13 show a fifth embodiment, and FIG. 12 is a plan view of a board equipped with a chip resistor, showing the fourth embodiment. Figure 13 is from Figure 12 xm-xm
14 is a longitudinal sectional view of a board equipped with a chip resistor showing the sixth embodiment, and FIGS. 15 and 16 are the seventh embodiment.
Examples are shown, FIG. 15 is a plan view of a chip resistor, FIG. 16 is a plan view of a substrate equipped with a chip resistor, and FIG. 17 is a plan view of a chip resistor.
The figure and FIG. 18 show the eighth embodiment, FIG. 17 is a plan view of a board equipped with a chip resistor, FIG. 18 is a partial circuit diagram, and FIG. 19 is a chip resistor showing a ninth embodiment. FIG. 1... Chip type resistor, 11... Ceramic plate, 12... Internal electrode, 13...
・Resistor, 14...Glass coated protective film, 1
5...External electrode, 2...Substrate, 3...
...Wiring pattern, 31...Terminal, 32.
...Solder, 4...Bed, 41...
... Reverse groove, a... Starting position, al...
... Run-up section, 22.23° 24 ... Through hole (burnout prevention part), 33 ... Protector (burnout prevention part),
5...Adhesive (burnout prevention part).
Claims (3)
形成した端子間に架設されたプリント基板において、 前記抵抗器をレーザートリミングする際のレーザービー
ムの走査線の軌跡上に焼損防止部を設けたことを特徴と
するプリント基板。(1) In a printed circuit board in which a chip resistor is installed between terminals formed in the wiring pattern of the printed circuit board, a burnout prevention part is provided on the locus of the scanning line of the laser beam when laser trimming the resistor. A printed circuit board characterized by:
囲第１項記載のプリント基板。(2) The printed circuit board according to claim 1, wherein the burnout prevention part is a through hole bored in the board.
範囲第１項記載のプリント基板。(3) The printed circuit board according to claim 1, wherein the burnout prevention part is a protector extending from the board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983094559U JPS602868U (en) | 1983-06-20 | 1983-06-20 | Printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1983094559U JPS602868U (en) | 1983-06-20 | 1983-06-20 | Printed board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS602868U true JPS602868U (en) | 1985-01-10 |
| JPH027482Y2 JPH027482Y2 (en) | 1990-02-22 |
Family
ID=30226292
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1983094559U Granted JPS602868U (en) | 1983-06-20 | 1983-06-20 | Printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS602868U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5849472U (en) * | 1981-09-29 | 1983-04-04 | 株式会社東芝 | printed wiring board |
| JPS5863704U (en) * | 1981-10-23 | 1983-04-28 | 三菱電機株式会社 | chip resistor |
| JPS58111952U (en) * | 1982-01-25 | 1983-07-30 | オムロン株式会社 | hybrid integrated circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5849472B2 (en) * | 1975-10-03 | 1983-11-04 | 帝人株式会社 | Shijiyoukiyuinhouhou |
-
1983
- 1983-06-20 JP JP1983094559U patent/JPS602868U/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5849472U (en) * | 1981-09-29 | 1983-04-04 | 株式会社東芝 | printed wiring board |
| JPS5863704U (en) * | 1981-10-23 | 1983-04-28 | 三菱電機株式会社 | chip resistor |
| JPS58111952U (en) * | 1982-01-25 | 1983-07-30 | オムロン株式会社 | hybrid integrated circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH027482Y2 (en) | 1990-02-22 |
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