JPS6028013B2 - microprogram controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microprogram control device in a data processing device, and more particularly to a branch control method for determining patterns of data and control information.

A microprogram control device in a data processing device usually processes byte-based data consisting of 8 bits, and it is necessary to distinguish multiple specific patterns from among the 256 weighted patterns expressed in 1 byte. There are many times.

Taking a keyboard/CRT display as an example, there are keys on the keyboard called data keys that display the data entered by the operator on the display screen, as well as screens and cursors (existing on the screen, There are the following function keys for controlling data keys (indicators indicating positions where data keys are pressed).

- Cursor right movement key, left movement key, up movement key, down movement key, field skip key, field reverse skip key, field clear key, screen clear key, input end key, etc.

The microprogram that controls the keyboard/CRT display identifies each byte of data entered by the operator as either a data key or the above function key, and
Control must be exercised for each.

In the case of a microprogram that controls a communication control device,
The following control codes must be determined from the data input for each byte and processing must be performed for each one.

・SYN, SOH, STX, ETB, ETX, EOT
, ENQ, ACK, NAK, DLE, etc.

In other input/output devices, it is called ESC sequence and
In some cases, control information is given by a data pattern following an SC code, and when a microprogram that controls this code detects an ESC code, it must determine the pattern that follows it and perform corresponding control. In conventional microprogram control devices, as a means of determining a plurality of specific patterns from among the patterns expressed in bytes, as shown in FIG. Whether to prepare a branch table consisting of 1 byte of information and perform multi-branching using 1-byte information, use a comparison instruction to compare data with specific patterns Q, ~Qn, and check their status to see if they are equal, as shown in Figure 1b. A common method is to use a combination of a discrimination command and a discrimination command.

In the former case, since the two instructions, the multi-branch instruction and the branch instruction based on data, are related, the process is transferred to the subsequent processing instructions, so the determination time is only two instructions long. but,
If there are 256 patterns, a branch table storing 25 branch microinstructions is required. In the latter case, since there are two instructions for each pattern for n patterns Q, ~Qn, a microprogram storage device that stores additional instructions may be sufficient, and n<
However, when the data is a pattern, only two instructions are required to be executed, but when the pattern is Qn, it is necessary to execute the S instruction, and when it is a specific pattern, an average of n instructions are executed. However, if the data is not in the pattern Q, .about.Qn, it is naturally determined that the data is not in the pattern Q, .about.Qn only after the instruction is executed, which requires a lot of determination time. In a small computer that must control multiple input/output devices, both slow and faster, as exemplified above, the capacity of the microprogram storage device is reduced, and a certain level of high speed is also required. In view of the requirements, it is preferable to use pattern discrimination means that combines the advantages of each of the means shown in FIGS. 1a and 1b. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide an improved microprogram which requires a relatively small capacity of a microprogram control device and has means for performing pattern discrimination over a relatively long distance with a small number of microsteps when discriminating patterns of data and control information.

gram control device. 01 In the present invention, in a microprogram control device having a microprogram storage device accommodating microinstructions and a microsequence register giving an address of the microprogram storage device, a data register accommodating target data for pattern discrimination; , a control memory device to which part or all of the address information is given from the data register is provided, and the control memory device includes microcommands instructing branches at addresses corresponding to the discrimination patterns Q, to Qn. , Q, to Qn, a microcommand instructing not to perform a branch is recorded at an address corresponding to a pattern other than patterns .

Further, when a specific micro-instruction (referred to as a pattern discrimination branch instruction) among the micro-instructions is detected, a micro-instruction corresponding to the contents of the data register is read from the control storage device, and the micro-sequence is executed according to the instruction. By providing a branch control circuit that controls whether to branch to a register or not, it is possible to reduce the number of steps for pattern discrimination and to reduce the number of steps for pattern discrimination, as shown in the microprogram flow shown in FIG. A microprogram control device that makes effective use of a storage device can be obtained. The flow shown in FIG. 2a will be explained in detail.

After setting the data to be tested in the data register, a pattern determination branch instruction is executed.

When the above data is a pattern that does not correspond to either Q or ~Qn, the micro command read from the control storage device does not instruct a branch, so the branch control circuit sequentially operates the micro sequence registers. Then, the process proceeds to the processing for patterns other than Q, to Qn, which is executed from the next address. The above data is Q・
When the pattern corresponds to one of the patterns .about.Qn, the microcommand read from the control storage device instructs a branch, and the branch control circuit causes the branch to address A-1. Since a multi-branch instruction is executed based on the contents of the data register at address A-1, and there are no data register contents other than Q and ~Qn, A+Q
, , A+Q2, . . . A+Qn addresses other than the addresses 256-n need not be provided with branch microinstructions as shown in FIG. 1A, and processing microinstructions can be placed therein. In the end, the conventional device shown in Figure 1a required 256
In the present invention, n branch micro-instructions may be used instead of n branch micro-instructions, resulting in less storage capacity. Furthermore, if a processing microinstruction is placed in place of this branch microinstruction, the storage capacity becomes even smaller. ■ In the present invention, in the microprogram control device described in section '1), when the branch control circuit controls the branch operation of the microsequence register, the contents of the data register are used as branch address information. By using microprogram control, it is possible to execute the pattern discrimination branch instruction in Figure 1a and the multibranch instruction using the data register at the same time using the pattern discrimination multibranch instruction as shown in the microprogram flow shown in Figure 2b. A device is obtained.

'31 Furthermore, in the present invention, [in the microprogram control device described in Section 11, the microprogram storage device and the control storage device are configured in the same storage device, thereby controlling the microprogram accommodating the microcommands. The table can be provided in the microprogram storage device, and the control table can be designed at the same level as the microprogram design, and the control information controlled by the microprogram in the microprogram storage device can be , a microprogram control device is obtained which makes it easy to change the control table. [4
1. Furthermore, in the present invention, in the microprogram control device described in section '1), by providing a microinstruction that provides address information to be added to the contents of the data register as address information of the control storage device, A microprogram control device is obtained in which a plurality of types of pattern discrimination microcommand control tables are prepared in the control storage device, and an arbitrary control table can be selected by a microprogram.

(5'Furthermore, in the present invention, the microprogram control device described in item '1) includes a logic circuit that controls bit-by-bit masking of the contents of the data register, and a microinstruction that provides the mask information. By providing a microprogram control device, it is possible to reduce the redundancy in the control memory.

Next, examples of the present invention will be shown and explained in detail.

FIG. 3 shows a block diagram of an embodiment of the present invention. The microprogram storage device MM stores microinstructions including the microinstructions shown in FIG. 4, and further stores a control table based on the microinstructions shown in FIG. 5. A microinstruction consists of one bit, and when it is "0" it means a command not to perform a branch, and when it is "1" it means a command to perform a branch. The control table for pattern discrimination in units of bytes is composed of 256 bits (32 bytes). A control table for determining whether pattern Q, ~Qn or apricot is shown in Figure 5b.
Only the microcommand at the bit position corresponding to Qn is set to "1", and microcommands of "0" are prepared for the other bit positions. The control table is located at addresses 0 to 1 on the microprogram storage device MM, as shown in FIG. 5a.
A control table for muscle fleas can be accommodated. Address information regarding the microinstruction is given by the microsequence register MSC, and the microinstruction read from the microprogram storage device MM is stored in the microinstruction register R, and is decoded by the decoder DEC to control each part. .

The data register DR is a register that stores 1 byte of data or control information for pattern discrimination, and stores the above data or control information via the bus 17. connected to.

The additional address register AR is a control table #1 to #16 on the microprogram storage device MM shown in FIG. 5a.
A microinstruction register R receives information instructing the microinstruction register R, which contains it, and is connected to the bus l4.

The memory address register MAR contains address information on the bus 14 and is responsive to specific microinstructions.

Data control information and the above control table are read from and written to the program storage device MM. The data on the bus 16 is used for the write data, and the read data is stored in the memory data register M town R. The branch control circuit 4 includes a microcommand selection circuit 41, a mask circuit 42, and a branch address calculation circuit 43.

The branch address information given on the bus 15 from the microinstruction register MIR or the like is sent to the branch address calculation circuit 43 via the mask circuit 42, and the result of the calculation with the microsequence register MSC is set in the microsequence register MSC again. A branch operation is performed. When branching is not performed, the mask circuit 42 is masked and only the carry (C) 44 is set to "1".
” is performed and the microsequence register MS
C is updated eleven times. Micro command selection circuit 4
1 selects the mask circuit M from among the 16-bit microcommand group read out to the memory data register MPR using a part (upper 4 bits) of the data register DR that has passed through the additional address register AR and the mask circuit MSK as an address.
Part of data register DR via SK (lower 4 bits)
Select the microinstruction at the bit position corresponding to . Selected microphone. Directive 40 masks (does not branch) or does not mask (branch) mask circuit 42
used to control The work register group GR is bus 1.
5, is connected to bus 16 and data control information is accommodated via bus 17;

The input/output register IR is a combination of control information in the adapter of the input/output device in byte units, and is connected to the bus 15 and stores data control information via the bus 17.

The arithmetic unit ALL performs arithmetic operations on the data control information carried on the buses 15 and 16, and outputs the results onto the bus 17. The microinstructions shown in FIG. 4 are major microinstructions related to the present invention, and the operation of each microinstruction will be explained below.

The micro-instruction with the instruction code "OPI" in FIG. 4a is a micro-instruction that sets data to be subjected to pattern discrimination in DR3.

The R field is the work register group G where the target data exists.
R or input/output register IR is specified, and the contents of the ADR field are set in the additional address register AR. The microinstruction with instruction code OPI is in the microinstruction register M.
When read out to IR, the data in the working register group GR and input/output register IR specified by the R field is set in the data register DR via the bus 15 and the arithmetic unit ALU bus 17, and is then read out in the microinstruction register MIR. A
The contents corresponding to the DR field are set in the additional address register AR. Instruction code ``OP2'' in Figure 4b
The microinstruction '' is a microinstruction corresponding to the pattern discrimination branch instruction in FIG. 2a. B-AD
The R field is output from the microinstruction register R to the bus 15 with branch address information. The bus 14 carries the contents of the additional address register AR and data register DR set by the OPI microinstruction to the mask circuit M.
All bits of SK are placed open. The microcommand group read out from the microprogram storage device MM via the memory address register MAR is stored in the memory data register MDR. Micro command selection circuit 41
When the micro-command 40 selected in is "0", the mask circuit 42 is masked and the micro-sequence register MSC is sequentially operated.When it is "1", the mask circuit 42 is opened and the micro-sequence register MSC is operated sequentially. microsequence register M according to the branch address information (B-ADR)
The SC branch operation is performed. The microinstruction with the instruction code "OP2" in FIG. 4c is a microinstruction corresponding to the pattern discrimination multi-branch instruction in FIG. 2b.

The MASK field is mask information given to the mask circuit MSK from the microinstruction register MIR.The mask circuit MSK masks the bits of the data register DR corresponding to "0" in the MASK field, and masks the bits of the data register DR corresponding to "1" in the MASK field. Control the bits to be output as is. The contents of the data register DR are output to the bus 15 as branch address information via the mask circuit MSK. Bus 14 includes an additional address register A.
R and the contents of the data register DR through the mask circuit MSK are loaded, and the microcommand 40 is similarly selected. When the microcommand 40 is "0", the microsequence register MSC operates sequentially, and when it is "1", the branch of the microsequence register MSC is operated according to the contents of the data register DR which has passed through the mask circuit MSK carried on the bus 15. An action is taken. In this way, by making the microprograms shown in FIGS. 2a and 2b executable, the microprogram can be executed relatively far in pattern discrimination of data and control information, and the utilization rate of the microprogram storage device can be increased. A program control device is obtained.

[Brief explanation of the drawing]

FIGS. 1a and 1b show microphones of pattern discrimination means performed by a subordinate microprogram control device. An example of a program is shown in flowchart. Figure 2a, . b shows a flowchart of an example of a microprogram for pattern discrimination improved according to the present invention. FIG. 3 shows a block diagram of one embodiment of the invention. MM...Micro program storage device, MSC...Micro sequence register. FIG. 4 shows the instruction format of microinstructions related to the present invention in an embodiment of the present invention. FIG. 5a shows the distribution state of the control table provided in the microprogram storage device in the embodiment of the present invention,
FIG. 5b shows an example of a microcommand table within a control table. In the figure, DR...data register,
MM・・・Micro program storage device, MSC
...Micro sequence register, 4...Branch control circuit, 40...Micro command, 41...
・Micro command selection circuit, 42...Mask circuit, 43...Branch address calculation circuit, 44...
...Carry (C), AR...Additional address register, MSK...Mask circuit, MAR...Memory address register, MIR...Micro instruction register, MDR... Memory data register, DE
C...Decoder, 14, 15, 16, 17...
...Bus, GR...Work register group, AL
U... Arithmetic unit, IR... Input/output register (m). Tsutomu 1 box number 2 figure Tsutomu 3 box appearance 4 figure 5th box

Claims (1)

[Scope of Claims] 1. A microprogram comprising a plurality of microinstructions for controlling a plurality of control targets, and a microprogram each including a plurality of microinstructions each including branch control information, unlike the microinstructions, to control the plurality of control objects. a storage device storing a plurality of determination control tables in one-to-one correspondence with the target; a microsequence register providing the address of the storage device; a data register storing data to be determined; and a specific control table having table selection information. One of the plurality of discrimination control tables is selected based on a microinstruction, and one of the microinstructions included in the selected table is read out from the storage device based on the contents of the data register. A microprogram control device comprising: an address register; and a branch control circuit that controls branch operations of the microsequence register based on microcommands read from the storage device. 2. In the microprogram control device according to claim 1, when the branch control circuit controls the branch operation of the micro sequence register, the contents of the data register are used as branch address information. Microprogram controller. 3. A microprogram control device according to claim 1, comprising a logic circuit that controls bit-by-bit masking of the contents of the data register, and a microinstruction that provides mask information.