JPS6027221A - Delay device - Google Patents

Abstract

PURPOSE:To prevent the delay time of an output pulse from change due to temperature change by providing at least one output voltage out of the 1st and 2nd reference power supplies with proper temperature reliability. CONSTITUTION:A transistor (TR) Q1 and a resistor R1 constitute a driving circuit, a voltage source V1 constitutes the 1st reference power supply having proper temperature reliability and a resistor R2 and a capacitor C1 constitutes an integrating circuit. TRs Q2, Q3 and registors R3, R4 constitue a voltage comparator and a voltage source V2 constitutes the 2nd reference power supply having proper temperature reliability. A TR Q4 and a resistor R7 constitute an output circuit. Even if the resistance value of the resistor R2 constituting the integrating circuit and the capacity value of the capacitor C1 are sharply changed by temperature change, the delay time of the output pulse is not almost changed by the temperature change by knowing the resistance value and the temperature reliability of the capacity previously.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a delay device used in monostable multivibrators and the like.

Structure of a conventional example and its problems FIG. 1 shows an example of a conventional delay device. In FIG. 1, a transistor Q1 and a resistor R1 constitute a driving circuit, a resistor R2 and a capacitor C1 constitute an integrating circuit,
Transistors Q2 and Q5 and resistors R5 and R4 constitute a voltage comparison circuit, and resistors R5 and R6 constitute a reference voltage source. Further, transistor Q4 and resistor R7 constitute an output circuit.

The operation of the conventional example configured in this way is shown in Figures 1 and 2.
This will be explained using figures.

Consider the case where a signal as shown in Figure 2 is applied to the input terminal. FIG. 2 When the human input signal changes from a low level (hereinafter referred to as L level) to a high level (hereinafter referred to as H level) at time t1, transistor Q1 turns on, and points B in FIG. 1, that is, transistor Q2 The potential at the base of , becomes L level as shown in FIG. 2B.

Here, since the 0 point in FIG. 1, that is, the base potential of the transistor Q5, is the reference voltage V, (V is the voltage obtained by dividing the power supply type FfVcc by the resistors R5 and R6), the base potential of the transistor Q5 is the base potential of the transistor Q2. The transistor Q2 is turned off, the transistor Q5 is turned on, and the point D in FIG. 1, that is, the base potential of the transistor Q4 becomes L level as shown in the second diagram. Since the transistor Q4 is of the PHP type, it is turned on, and the potential of the output terminal E becomes H level as indicated by E in FIG.

Next, when the input signal changes from the H level to the L level at time t2, the transistor Q1 is turned off, so that charging of the capacitor C1 from the DC voltage source VCC via the resistor R2 is started. At this time, the potential at point B is lower than the potential at point 0, so the potentials at points D and E remain the same.The potential at point B, as shown in B in Figure 2, is 0 at time t3. When the potential vG becomes, the transistor Q
2, the transistor Q5 is turned off. Therefore, the potential at point D becomes H level, and transistor Q
4 is turned off, and the potential of the output terminal E becomes L level.

As described above, the example of the delay device shown in FIG. 1 operates to delay only the falling edge of the input pulse applied to the input terminal and output it to the output terminal E, thereby delaying the output The time td is td=C+ −R2In (Vc
c/(Vcc-Vc)) (1).

However, in general, the resistance and capacitance values of resistors and capacitors change depending on changes in ambient temperature, so (
In equation 1), td, C+, and R2 are each the ambient temperature T.
It is expressed as the functions td(T'), C+(T), R2(T), and td(T)-C+(T)-R2(T)An(Vcc/(
Vcc Vc)) (2) Therefore, if the time constant (1+(T)・R2(T) becomes larger than the standard value due to a change in the ambient temperature T, for example, the potential at point B in Figure 1 will be as shown by the dashed line in Figure 2). The time t5' to reach the potential VC at the 0 point is t5'
is later than the standard time t5. That is, the delay time t
(1' has the disadvantage that it becomes larger than the standard value tdo as shown in FIG. 2 E'.

OBJECTS OF THE INVENTION The present invention eliminates the drawbacks of the conventional example described above, and even when the resistance value or capacitance value changes due to changes in ambient temperature, the delay time td of the output pulse with respect to the input This provides a delay device that hardly changes.

Structure of the Invention The present invention provides a reference power supply used to charge an integrating circuit and a voltage comparison circuit when the temperature dependence of the resistance value of the resistor and the capacitance value of the capacitor used in the integrating circuit is known in advance. The object of the present invention is to be achieved by providing appropriate temperature dependence to one or both of the reference voltage sources that are one of the inputs.

DESCRIPTION OF THE EMBODIMENTS An embodiment of a delay device according to the present invention is shown in FIG. Third
In the figure, transistor Q1 and resistor R1 constitute a drive circuit, voltage source v1 constitutes a first reference power supply with appropriate temperature dependence, resistor R2 and capacitor C1
constitutes an integrating circuit, transistors Q2 and Q5 and resistors R5 and R4 constitute a voltage comparison circuit, and voltage source v2 constitutes a second reference power supply having appropriate temperature dependence.

Transistor Q4 and resistor R7 still constitute the output circuit.

The operation of this embodiment configured in this way will be explained using FIG. 3 and FIG. 4. In Figure 4, F or F is
This shows the voltage waveform at point F shown in FIG. 3 or one point.

Consider a case where a signal as shown in FIG. 4F is applied to input terminal F. When the input signal in FIG. 4F changes from L level to H level at time 1++, transistor Q1 turns on, and the base potential of transistor Q2 goes to L level at point 0 in FIG. 3, as shown in FIG. 4G. .

Here, the base potential of the transistor Q5 is the reference voltage v2
Therefore, the base potential of transistor Q5 becomes higher than the base potential of transistor Q2, and transistor Q
2 is off, transistor Q5 is on, and the point H in FIG. 3, that is, the base potential of transistor Q4, is
It becomes L level as shown by H in FIG. Transistor Q4
Since it is php2JM, it is in the on state, and the potential of the output terminal becomes H level as shown in FIG.

Next, when the input signal changes from H level to L level at time t+2, transistor Q1 turns off, so
From the first reference power supply ■1 to the capacitor C via the resistor R2
Charging starts at 1. At this time, since the potential at point G is lower than the reference voltage v2, the potentials at point H and point 1 remain unchanged.

Then, the potential at point G changes over time t, as shown at G in FIG.
When the reference voltage becomes 2 at 15, the transistor Q2
is on, and transistor Q3 is off. Therefore, the potential at point H becomes H level, and transistor Q4
is turned off, and the potential of the output terminal becomes L level.

As described above, the present embodiment shown in FIG. 3 operates so that only the falling edge of the input pulse applied to the input terminal F is delayed and outputted to the output terminal, and the output delay at the ambient temperature T is The pulse delay time td(T) is as follows.

From equation (4), the condition for the delay time td(T) to remain unchanged even when the ambient temperature T changes is as follows, where tdo is the standard delay time. (5) It becomes.

Therefore, the time constant G when the ambient temperature T becomes T'
+('r')・R2(T') becomes larger than the standard time constant and the potential at point G in FIG. 3 becomes as shown by the dashed line in FIG. The temperature dependence of the first reference power supply (for example, the power supply VCC is divided by two resistors) is assumed to be the temperature dependence of the second reference power supply, and the second reference power supply is changed so as to almost satisfy equation (5). If G in the figure is indicated by V2/, the time t1 when the potential at point G in FIG. As shown in Fig. 4, tdo is almost equal to the standard value tdo.

In addition, when the temperature dependence of the second reference power source is zero and the first reference power source is made to have temperature dependence, or when the first reference power source and the second reference power source have temperature dependence in 100 directions, Even in the case of
The variation of the output pulse delay time t(1) with respect to temperature changes is almost zero.

As described in detail, according to the present invention, even when the resistance value of the resistor and the capacitance value of the capacitor constituting the integrating circuit change greatly due to temperature changes, the resistance value and the capacitance value can be maintained. By knowing the temperature dependence in advance, there is an advantage that it is possible to realize a delay device in which the delay time of the output pulse hardly changes with respect to temperature changes.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of an example of a conventional delay device, and Figure 2 is a circuit diagram of an example of a conventional delay device.
Figure 3 is a circuit diagram showing an embodiment of the delay device of the present invention; Figure 4 is a diagram showing the voltage waveform at point OF or 1 in Figure 3. It is. 0 Ql, Qz, Q3. Q4...Transistor, R
+, R2, Rs. Ra, Rs, R6, R7...Resistance, C1...
...Capacitor, vl, v2...) i (quasi power supply.

Claims (1)

[Claims] a first reference power source; an integrating circuit connected to the first reference power source; a drive circuit that receives a signal applied to an input terminal and drives the integrating circuit; a second reference power source; A voltage comparison circuit having an output of the circuit and the second reference power source as inputs, the voltage comparison circuit being configured to detect that the output voltage of at least one of the first reference power source and the second reference power source changes with changes in ambient temperature. Features a delay device.