JPS6027188B2 - Substrate for mounting semiconductor elements - Google Patents

Substrate for mounting semiconductor elements

Info

Publication number
JPS6027188B2
JPS6027188B2 JP20315981A JP20315981A JPS6027188B2 JP S6027188 B2 JPS6027188 B2 JP S6027188B2 JP 20315981 A JP20315981 A JP 20315981A JP 20315981 A JP20315981 A JP 20315981A JP S6027188 B2 JPS6027188 B2 JP S6027188B2
Authority
JP
Japan
Prior art keywords
substrate
mounting
coating layer
semiconductor element
thermal conductivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP20315981A
Other languages
Japanese (ja)
Other versions
JPS58103156A (en
Inventor
昭 松村
伸夫 小笠
昭 大塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP20315981A priority Critical patent/JPS6027188B2/en
Publication of JPS58103156A publication Critical patent/JPS58103156A/en
Publication of JPS6027188B2 publication Critical patent/JPS6027188B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To obtain the substrate for mounting of the semiconductor element having superior heat radiation by a method wherein a film consisting of an organic matter having the electrically insulating property and moreover having comparatively favorable thermal conductivity is coated as a thin layer on the surface of a tape of metal, alloy or composite thereof having favorable thermal conductivity. CONSTITUTION:The metal substrate 1 for mounting of the Si semiconductor element 6 and coated with the SiC thin film 4 is manufactured according to the plasma CVD method, and copper of 1.0mm. thickness and containing Zr is used for the metal substrate 1. The plasma CVD method is performed using a capacitive coupling type glow discharge device and mixed gas of 1X10<-2> Torr of SiH4 and CH4, and by heating the substrate at 500 deg.C. Accordingly the substrate 3 for mounting of the semiconductor coated with the SiC thin film 4 of 3mum thickness having favorable adhesion, having the dielectric strength characteristic of 3MV/ cm or more, having the coefficient of thermal expansion approximated to the Si element to be mounted and having superior heat radiation is obtained.

Description

【発明の詳細な説明】 本発明は、半導体素子に発生する熱を効率よく放散しう
る半導体素子搭載用基板に関するものであり、半導体パ
ッケージやマルチチップボードなどの回路基板の構成部
材として広く適用できる。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a substrate for mounting semiconductor elements that can efficiently dissipate heat generated in semiconductor elements, and can be widely applied as a component of circuit boards such as semiconductor packages and multi-chip boards. .

近年、半導体素子の高速化、高密度化、大型化により、
半導体素子からの発熱量の増大が問題となっており、半
導体素子搭載用基板に対して高放熱特性の要求が高まっ
てきている。このため、そのような基板として、高い電
気絶縁性と高い放熱性とを併せ持つものが必要とされて
いる。このような基板として、スクリーン印刷、ろう付
け、溶射、陽極酸化等によって電気絶縁性の無機質被覆
層を熱伝導性のよい金属基板の表面に形成したものが考
えられている。
In recent years, with the increase in speed, density, and size of semiconductor devices,
An increase in the amount of heat generated from semiconductor elements has become a problem, and there is an increasing demand for high heat dissipation characteristics for substrates for mounting semiconductor elements. Therefore, such a substrate is required to have both high electrical insulation and high heat dissipation properties. As such a substrate, one in which an electrically insulating inorganic coating layer is formed on the surface of a highly thermally conductive metal substrate by screen printing, brazing, thermal spraying, anodic oxidation, or the like is considered.

しかし、いずれの方法によって形成された無機質被覆層
にあっても、その被覆層は多孔質であり目的とする熱伝
導性が充分でない。また多孔質であるため、大気中の水
分、水中の導電性イオン等がその被覆層を拡散し、電気
絶縁性の経時的劣化が生じる。このため、その被覆層に
はある程度の厚さが必要とされる。この点から、被覆層
を薄くすることによって熱伝導性の改善を図るというこ
とには、自ら制限がある。本発明は、このような問題を
繊密な無機質被覆層を形成することによって解決し、電
気絶縁性及び熱伝導性が共に優れた半導体素子搭載用基
板を提供することを目的とする。この目的のため、無機
質被覆層はPVD法又はCVD法によって形成される。
However, no matter which method the inorganic coating layer is formed, the coating layer is porous and does not have sufficient thermal conductivity as desired. Furthermore, since it is porous, moisture in the atmosphere, conductive ions in water, etc. diffuse through the coating layer, causing deterioration of electrical insulation over time. For this reason, the coating layer needs to have a certain degree of thickness. From this point of view, there is a limit to the ability to improve thermal conductivity by making the coating layer thinner. An object of the present invention is to solve such problems by forming a dense inorganic coating layer, and to provide a substrate for mounting a semiconductor element that has excellent electrical insulation and thermal conductivity. For this purpose, the inorganic coating layer is formed by PVD or CVD.

すなわち本発明は、熱伝導性のよい金属基板の表面に、
電気絶縁性の無機物質からなる薄い被覆層をPVD法又
はCVD法によって形成した半導体素子搭載用基板を特
徴とする。PVD法及びCVD法は化合物を含む被覆物
質をイオンや分子という物質の最小単位で基板に衝突さ
せて被覆層を設ける方法である為、粒子径の4・さし、
粒子が析出する。
That is, in the present invention, on the surface of a metal substrate with good thermal conductivity,
The present invention is characterized by a semiconductor element mounting substrate in which a thin coating layer made of an electrically insulating inorganic substance is formed by a PVD method or a CVD method. Since the PVD method and the CVD method are methods of forming a coating layer by colliding a coating material containing a compound with the substrate in the smallest units of substances such as ions and molecules, the particle diameter of 4 mm,
Particles precipitate.

この為、繊密な被覆層が得られる。したがって、電気絶
縁性を劣下させることなく、被覆層を薄くし熱伝導性を
改善することが可能となる。さらに、PVD法やCVD
法では被覆物質をイオンや分子という形で基板に衝突さ
せるに際し、核生成速度に対する核成長速度を変えるこ
とにより「繊密さをより一層向上させることが可能であ
るので、例えば「大気中の水分、水中の導電性イオン〜
あるいは後工程で被覆層上に形成されるメタラィジング
層中の金属微粒子や金属イオン、特に「銀のようにェレ
クトロマィグレーションの生じやすい金属イオンや、ナ
トリウム、塩素等のイオン半径の4・さし、イオンまで
が問題となる様な場合でもこれらが被覆層中を拡散しな
い被覆層をも設けることが可能である。
Therefore, a dense coating layer can be obtained. Therefore, it is possible to make the coating layer thinner and improve thermal conductivity without deteriorating electrical insulation. Furthermore, PVD method and CVD method
In this method, when the coating material is collided with the substrate in the form of ions or molecules, it is possible to further improve the density by changing the nucleus growth rate relative to the nucleation rate. , conductive ions in water ~
Alternatively, metal fine particles and metal ions in the metallizing layer formed on the coating layer in a subsequent process, especially metal ions that are prone to electromigration such as silver, and particles with an ionic radius of 4 mm such as sodium and chlorine. However, even in cases where even ions become a problem, it is possible to provide a coating layer in which these do not diffuse into the coating layer.

またPVD法やCVD法によって得られた被覆層は、表
面粗さが小さく、基板との密着性も優れている。
Further, the coating layer obtained by the PVD method or the CVD method has low surface roughness and excellent adhesion to the substrate.

このため、その基板に半導体素子を搭載した場合、素子
と基板との間に空隙が生じず素子からの放熱性を高くす
ることができ、その電気絶縁性は繰り返しの加熱に対し
ても充分安定している。更に、被覆層力ミPVD法又は
CVD法によって形成されるので、金属基板及び被覆層
の無機物質は、その材料を各種の条件に対応させて自由
に選択組合せすることができる。
Therefore, when a semiconductor element is mounted on the substrate, no air gap is created between the element and the substrate, allowing for high heat dissipation from the element, and its electrical insulation is sufficiently stable even against repeated heating. are doing. Furthermore, since the coating layer is formed by a PVD method or a CVD method, the metal substrate and the inorganic material of the coating layer can be freely selected and combined in accordance with various conditions.

このことは特に、Ga船半導体素子を用いた高周波デバ
イスに本発明の基板を適用するとき効果的である。すな
わち、高周波用デバイスにおいては半導体素子搭載用基
板の誘電特性が問題になるが、議電率の低いBN、ダイ
ヤモンド等の無機物質を、基板の広い面積にわたって、
均一に、且つ薄く被覆することが容易に行える。本発明
において、金属基板として熱伝導率が0.次al/肌・
sec・℃以上の金属板を用いることが好ましい。
This is particularly effective when the substrate of the present invention is applied to a high frequency device using a Ga carrier semiconductor element. In other words, in high-frequency devices, the dielectric properties of the substrate for mounting semiconductor elements are a problem, but inorganic materials such as BN and diamond, which have a low electrolysis rate, can be used over a wide area of the substrate.
It is easy to coat uniformly and thinly. In the present invention, the metal substrate has a thermal conductivity of 0. Next al/skin/
It is preferable to use a metal plate having a temperature of sec.° C. or higher.

これにより、前記のPVD法やCVD法の特徴と相まっ
て従来広く用いられているAI203や2Mg01Sj
02等の暁結セラミックからなる半導体素子搭載用基板
では対応できなかった高速・高出力の半導体装置にも対
応することが可能となつた。尚、金属板に代えて、用途
に応じて熱伝導性と機械的性質を任意に変えることが出
きる複合金属板を用いることにより、本発明の用途をさ
らに広げることが出きる。
As a result, in combination with the characteristics of the PVD method and CVD method mentioned above, AI203 and 2Mg01Sj, which have been widely used in the past,
It has become possible to support high-speed, high-output semiconductor devices, which were not compatible with semiconductor element mounting substrates made of Akatsuki ceramics such as 02. Note that the applications of the present invention can be further expanded by using a composite metal plate whose thermal conductivity and mechanical properties can be arbitrarily changed depending on the application in place of the metal plate.

具体的な金属板・複合金属板としては、Ni、Cu、N
各種高熱伝導型Cu合金、銅クラッドステンレス鋼クラ
ッド鋼、銅クラッドコバールクラッド鋼又はMo若しく
はWを主体とする暁結体等が挙げられる。また被覆層に
用いられる無機物質としては、BN、AI203 AI
N、SICしS鮒Nへ Y203 2Mg0、Si02
、ダイヤモンド等がある。
Specific metal plates and composite metal plates include Ni, Cu, and N.
Examples include various high thermal conductivity Cu alloys, copper clad stainless steel clad steel, copper clad Kovar clad steel, and Akatsuki crystals mainly composed of Mo or W. Inorganic materials used for the coating layer include BN, AI203 AI
N, SIC to S carp N Y203 2Mg0, Si02
, diamond, etc.

これらの無機物質を、鰭気絶縁性及び熱伝導性を考慮し
て1〜10山の厚さに施す。このようにして得られた半
導体素子搭載用基板を用いて組み立てた半導体装置を第
1図に示す。
These inorganic substances are applied to a thickness of 1 to 10 mounds in consideration of fin air insulation and thermal conductivity. A semiconductor device assembled using the thus obtained semiconductor element mounting substrate is shown in FIG.

1‘ま金属板であり、その表面に被覆された被覆層2と
で半導体素子搭載用基板3を形成する。
1' is a metal plate, and the surface thereof is coated with a coating layer 2 to form a substrate 3 for mounting a semiconductor element.

4はメタルラィジング層、5はAuメッキ層で、これを
介して半導体素子6が搭載される。
4 is a metal rising layer, 5 is an Au plating layer, and a semiconductor element 6 is mounted through these layers.

以下実施例について説明する。Examples will be described below.

Si半導体素子を搭載するためのAI20戦費膜を被覆
した半導体素子塔敷用基板をプラズマ‐CVD法で作製
した。
A substrate for mounting a semiconductor element coated with an AI20 film for mounting a Si semiconductor element was fabricated using a plasma-CVD method.

金属基板には、厚さ1側のCuW合金を用いた。プラズ
マ‐CVD法は、AIチップに塩化水素を通し、AIC
13を発生させ、同時に、日2、CC2ガスを900o
oに加熱した反応炉内に全ガス圧1.0Tomに制御し
ながら流し、反応炉内に設けた高周波電極に高周波(1
3.58MHZ)300Wを印加し、AIC13、日2
、C02ガスをプラズマ化し、気相反応により、成膜速
度500〜1000オングストローム/minでAI2
03を被覆した。得られた膜厚5山mのAI20斑漢を
X線回折、走査型電子顕微鏡で観察したところ、粒径1
仏m以下の微細多結晶構造を持つQ−AI203である
ことがわかった。
A CuW alloy with a thickness of 1 was used for the metal substrate. In the plasma-CVD method, hydrogen chloride is passed through the AI chip, and the AIC
13, and at the same time, day 2, CC2 gas at 900o.
The total gas pressure was controlled to be 1.0 Tom in a reactor heated to
3.58MHZ) 300W applied, AIC13, day 2
, CO2 gas is turned into plasma, and AI2 is formed at a film formation rate of 500 to 1000 angstroms/min by gas phase reaction.
03 was coated. When the obtained AI20 porridge with a film thickness of 5 m was observed using X-ray diffraction and a scanning electron microscope, the particle size was 1.
It was found that it was Q-AI203 with a fine polycrystalline structure of less than F. m.

また、得られたAI20網漢を被覆したCuW合金板上
にAgペーストを塗布し、900午0で焼成したのち、
AgとCuW間の絶縁耐圧を測定したところ、500V
以上あり、AI20細漠‘ま電気絶縁性が良好であるこ
とがわかつた。以上の如くして得られた半導体素子搭載
用基板は、熱伝導性良好で、耐熱性も良好であり、また
電気絶縁性に関しても、被覆層の析出粒子を制御するこ
とにより、Agの如く、エレクトロマイグレーションの
生じやすいペーストを絶縁被覆層上の電極とした場合で
も、高い絶縁性を得ることができた。
In addition, Ag paste was applied on the CuW alloy plate coated with the obtained AI20 mesh plate, and after firing at 900 pm,
When the dielectric strength voltage between Ag and CuW was measured, it was 500V.
Therefore, it was found that the electrical insulation properties of AI20 were good. The semiconductor element mounting substrate obtained as described above has good thermal conductivity and good heat resistance, and also has good electrical insulation properties, such as Ag, by controlling the precipitated particles of the coating layer. Even when a paste that is prone to electromigration was used as an electrode on an insulating coating layer, high insulation properties could be obtained.

以上に説明した如く、本発明によれば、繊密度の高い被
覆層が得られるので、その厚さを薄くすることにより電
気絶縁性を劣下させることなく熱伝導性の改良が行われ
る。
As explained above, according to the present invention, a coating layer with high densities can be obtained, so that by reducing the thickness of the coating layer, thermal conductivity can be improved without deteriorating electrical insulation properties.

このようにして得られた半導体素子搭載用基板は、集積
回路の高速化、高密度化、大型化に充分対応できるもの
である。
The substrate for mounting a semiconductor element thus obtained is capable of sufficiently responding to higher speed, higher density, and larger integrated circuits.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の半導体素子搭載用基板用いた半導体装
置の側面断面図である。 1:金属板、2:被覆層、3:半導体素子搭載用基板、
4:メタルライジング層、5:Auメッキ層、6:半導
体素子。 力i図
FIG. 1 is a side sectional view of a semiconductor device using a semiconductor element mounting substrate of the present invention. 1: Metal plate, 2: Covering layer, 3: Semiconductor element mounting substrate,
4: Metal rising layer, 5: Au plating layer, 6: Semiconductor element. force i diagram

Claims (1)

【特許請求の範囲】[Claims] 1 熱伝導性のよい金属基板の表面に、電気絶縁性の無
機物質からなる薄い被覆層をPVD法又はCVD法によ
つて形成したことを特徴とする半導体素子塔載用基板。
1. A substrate for mounting a semiconductor device, characterized in that a thin coating layer made of an electrically insulating inorganic substance is formed on the surface of a metal substrate with good thermal conductivity by a PVD method or a CVD method.
JP20315981A 1981-12-15 1981-12-15 Substrate for mounting semiconductor elements Expired JPS6027188B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20315981A JPS6027188B2 (en) 1981-12-15 1981-12-15 Substrate for mounting semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20315981A JPS6027188B2 (en) 1981-12-15 1981-12-15 Substrate for mounting semiconductor elements

Related Child Applications (3)

Application Number Title Priority Date Filing Date
JP10728986A Division JPS6224648A (en) 1986-05-10 1986-05-10 Substrate for mounting semiconductor element
JP10729086A Division JPS61292345A (en) 1986-05-10 1986-05-10 Substrate for mounting semiconductor element
JP10728886A Division JPS6224647A (en) 1986-05-10 1986-05-10 Substrate for mounting semiconductor element

Publications (2)

Publication Number Publication Date
JPS58103156A JPS58103156A (en) 1983-06-20
JPS6027188B2 true JPS6027188B2 (en) 1985-06-27

Family

ID=16469407

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20315981A Expired JPS6027188B2 (en) 1981-12-15 1981-12-15 Substrate for mounting semiconductor elements

Country Status (1)

Country Link
JP (1) JPS6027188B2 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0760869B2 (en) * 1985-11-06 1995-06-28 鐘淵化学工業株式会社 High thermal conductivity insulating substrate
JPH0740599B2 (en) * 1985-12-26 1995-05-01 鐘淵化学工業株式会社 High thermal conductive insulating substrate and manufacturing method thereof
JPS62297299A (en) * 1986-06-16 1987-12-24 Kobe Steel Ltd Diamond radiator
JPS6489448A (en) * 1987-06-23 1989-04-03 Texas Instruments Inc High-performance heat sink and mounting member of semiconductor products, and manufacture thereof
JPH0624221B2 (en) * 1991-10-03 1994-03-30 鐘淵化学工業株式会社 High thermal conductive insulating substrate and manufacturing method thereof
US8946894B2 (en) * 2013-02-18 2015-02-03 Triquint Semiconductor, Inc. Package for high-power semiconductor devices

Also Published As

Publication number Publication date
JPS58103156A (en) 1983-06-20

Similar Documents

Publication Publication Date Title
JPS5815241A (en) Substrate for semiconductor device
JP2856782B2 (en) Method of forming copper thin film by low temperature CVD
WO2001086707A1 (en) LOW RELATIVE PERMITTIVITY SIOx FILM, PRODUCTION METHOD, SEMICONDUCTOR DEVICE COMPRISING THE FILM
JPS6027188B2 (en) Substrate for mounting semiconductor elements
JPS6224647A (en) Substrate for mounting semiconductor element
JPH03211860A (en) Semiconductor package
EP0113088B1 (en) Substrate for mounting semiconductor element
JPS6224648A (en) Substrate for mounting semiconductor element
JPS60128625A (en) Base board for mounting of semiconductor element
JPH0624221B2 (en) High thermal conductive insulating substrate and manufacturing method thereof
KR100913309B1 (en) Metal electric circuit
JPS61292345A (en) Substrate for mounting semiconductor element
JP2984116B2 (en) Semiconductor element mounting substrate
CN110668392A (en) Enhanced heat dissipation Cu-Cu2O-core-shell nanowire array self-protection electrode and preparation method thereof
JPH0223639A (en) Diamond multilayer circuit substrate
JP2007095716A (en) Complex, semiconductor manufacturing device susceptor provided therewith and power module
JPH10321776A (en) Radiator member for semiconductor element
JPS59184586A (en) Circuit board for placing semiconductor element
JPH04245463A (en) Diamond heat sink
JPH07112104B2 (en) Method for manufacturing superconducting wiring diamond circuit board
JPH029457B2 (en)
JPS60245153A (en) High electrically insulating substrate for semiconductor device
JP2021197411A (en) Plate and radiation material
JPS61102744A (en) Substrate for semiconductor substrate and manufacture thereof
JPS6130042A (en) Semiconductor element loading substrate