JPS60261369A - Stop controller of inverter - Google Patents

Abstract

PURPOSE:To prevent an inverter from failing in commutation by providing a stop controller having a memory for controlling an output in a gate controller, and reducing the output current as a DC voltage drops at the stopping time. CONSTITUTION:A pulse width control inverter converts a DC from a DC power source 1 through a breaker 2, a DC filter 3, an inverter 4, an AC filter 5, and an output breaker 6 to an AC, and supplies it to a load 7. This inverter 4 amplifies by an amplifier 12 a deviation between the output voltage and the output of a voltage reference setter 11, and is controlled through a phase shifter 14 and the like. In this case, a memory 61 for holding the output level of the amplifier 12 simultaneously when the breaker 2 is turned OFF is provided between the amplifier 12 and the shifter 14. Thus, when the inverter is stopped, the shifter 14 maintains the output pulse width constant by the output level of the amplifier 12 held at OFF time, thereby obtaining the turning OFF time constantly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a stop control device for a pulse width controlled inverter device using a thyristor as a switching element.

[Technical background of the invention and its problems]

FIG. 4 is a block diagram showing an example of a conventional pulse width control inverter device. In the same figure, 1 is the direct θ', t
A power supply, 2 an input breaker, and 3 a DC filter consisting of a reactor and a capacitor.

4 is an inverter that converts the output of the DC filter 3 into an AC output waveform, 5 is an AC filter that converts the AC output waveform of the inverter 4 into a sine wave (2 conversions), 6 is an output breaker, and 7 is a load. 15 constitutes a gate control circuit; 1.11 is a voltage standard setter that provides a standard for output wind pressure; 1;
2 is a magnetic pressure error amplifier circuit that amplifies the deviation between the output voltage and the voltage reference setter 11; 13 is an oscillator that serves as a reference for the output frequency of the inverter 4; and 14 is an output of the magnetic pressure error amplifier circuit 12 (one of which is 4 is a phase shifter that delays the firing phase of the switching elements constituting the phase shifter 14, and 15 is a ring counter that distributes the output pulses of the phase shifter 14.

FIG. 5 is a circuit diagram showing a specific circuit example of the inverter 4 in the device C2 shown in FIG. 4, and FIG. 6 is a time chart illustrating its operation. Figure 5 (= where 21 to 3 are main thyristors, 31 to 34 are freewheeling diodes, 21A-2
4A is a commutating auxiliary thyristor, 26 is a commutating axle, 28 is a commutating capacitor.

The commutation operation of the circuit as shown in FIG.
4) is turned on with a relationship of a predetermined phase difference θ as shown in Fig. 6. That is, the output voltage of the inverter is controlled (secondly, the phase difference θ between the thyristors 21 and 22 (23 and 24) may be controlled).

The phase shifter 14 in FIG. 4 controls the output of the voltage error amplification circuit 12 (in other words, the phase difference in the firing timing of the main thyristor constituting the inverter 4, that is, the output pulse width of the inverter 4). In the end, the output voltage of the inverter 4 is controlled by the output of the voltage error amplification circuit 12 (2).

Now, I will explain the following (dynamic difference when stopping the device as shown in Fig. 4).Normally, the procedure for stopping is as follows:
In order to avoid the effect on
A method is used in which the inverter is stopped after discharging the capacitor. FIG. 7 (= shows the operation waveform diagram of each part when stopped.

When the input breaker 2 is turned off at time t1, the voltage of the DC filter 3 decreases, and the voltage error amplification circuit 12 keeps the output voltage of the device constant (in order to keep the output pulse width θ of the inverter 4 constant).
On the other hand, even though the device is in a no-load state, the inverter 4 output (-) is connected to the current filter 5, so as shown in Figure 7, the inverter output current is equal to the output voltage. (The voltage of the DC filter 3 starts to decrease from the point at which it becomes impossible to control the output voltage at a constant level.) On the other hand, the voltage of the inverter 4 starts to decrease. The voltage E of the commutation capacitors 27 and 28 decreases as the magnetic pressure of the DC filter 3 decreases.The commutation capacity of the inverter 40 is
Since the voltage Ecl is proportional to the voltage Ecl, the transfer ability also decreases, causing commutation failure and causing deterioration or damage to the thyristor.

FIG. 8 is an operating waveform diagram for explaining the commutation ability of the inverter 4, in which L, commutation (M, # when in operation, commutation capacitor n, 28, commutation reactors 5, 26, commutation auxiliary This is an oscillating current flowing through a commutation circuit consisting of thyristors 21A-24A, and IL is the load mA flowing through the main thyristors 21-24.
1 If the inductance of the commutation reactors 5 and 26 is L, and the loss of the commutation circuit is ignored, Ix = EcJ L/C
There is a relationship. Also, the circuit turn-off time TC=
π-JLCcos-' (L, /Ix),
If Tc is longer than the turn-off time of the main thyristors 21 to 24 themselves, commutation can be performed.

In other words, when the DC load (voltage of the DC filter 5) decreases as described above, EC also decreases and Ix decreases, but the output current of the inverter 6 (corresponding to IL) decreases due to the operation of the control circuit. Since Tc becomes constant, Tc decreases and commutation becomes impossible, leading to commutation failure.

As a means of solving the above-mentioned problems, it is possible to narrow down the output pulse width of the inverter 4 during stoppage (Alternatively, it is also possible to reduce the output current of the inverter 4 to avoid commutation failure, but The essential solution is to rapidly reduce the output pulse width (-) otherwise the AC filter 5 (secondary motion will occur, excessive oscillating current will flow through the inverter 4, and there is a possibility of commutation failure). I can't say that.

[Purpose of the invention]

The purpose of the present invention is to solve the above-mentioned point (which is considered as a knee) in a pulse width controlled inverter device having a DC filter consisting of a capacitor and a reactor at the DC input, in which the inverter is stopped after cutting off the DC 1a source. To provide a stop control device for an inverter device that prevents commutation failure due to a reduction in the commutation ability of an inverter and does not cause deterioration or damage to a thyristor when stopping the inverter.

[Summary of the invention]

In order to achieve this purpose (-), the gate control circuit of the inverter device (2) at the same time as cutting off the DC power supply (
When stopping the device by providing a stop control device consisting of a memory circuit that holds the output of the tonicity error amplifier circuit that controls the two-output Ryuo (2M, IAL), the output current of the inverter is reduced as the IAL F'a pressure decreases. In this way, there is something to prevent commutation failure.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to FIG. 1 (-) with the same reference numerals as those in FIG. 4 indicate the same functions as those in FIG. A memory circuit 61 is provided between the circuit breaker 14 and the input breaker 2 to hold the output level of the two-voltage error amplifier circuit 12 at the same time as the input breaker 2 is turned off. be done.

Next, the operation of the stop control device constructed as above will be explained. FIG. 2 is an operational waveform diagram of each part for explaining the operation of the embodiment of FIG. 1. For example, when the input breaker is turned off at time t1, the memory circuit 61 holds the output level of the voltage error amplification circuit 12 when it is off, and this (
The two-p phase shifter 14 operates so as to keep the output pulse width θ of the inverter 4 constant. Therefore, the output voltage of the inverter 4 changes as the voltage of the DC filter 3 decreases (
- decreases, and the output current of the inverter 4 decreases. Thereafter, the voltage of the DC filter 3 decreases and the inverter 4 stops at time t2.

Therefore, during time tl - t2, as the pressure on the DC filter 3 decreases (2. The voltage Ec of the commutating capacitor n, 28 and the oscillating magnetic current Ix flowing through the commutating circuit decrease, the output current of the inverter 4 decreases. The turn-off time of the circuit of inverter 4 Tc = πJ LCc
os-' (IL/IX) is maintained constant without decreasing, and transposition failure due to insufficient commutation capacity (secondary transposition failure) does not occur.

In this way, when stopping the impark device, when the input breaker 2 is turned off, the voltage error amplifier circuit 1
By maintaining the output level of 2, the turn-off time Tc of the circuit of the inverter 4 can be kept constant (2), and commutation failure can be prevented to prevent deterioration or damage of the circuit.

FIG. 3 shows another embodiment of the present invention, and shows an example of application to a digital control circuit. In FIG. 3, 81 is an AD converter that converts the output of the voltage error amplification circuit 12 into a digital quantity, 82 is a latch circuit that simultaneously turns off the input breaker (the digital output of the two AD converter blades is 6 times 6 times), is the output of the latch circuit 82 (
= A digital phase shifter that generates a signal that determines the output pulse width of the inverter 4 accordingly. Other than operating digitally, it operates in the same manner as the embodiment shown in FIG. 6, and the same effects can be obtained.

In addition, the embodiments of FIGS. 1 and 3 (input S and output 1 in the second section may be rectifier outputs.

〔Effect of the invention〕

As explained above (2) According to the present invention, when stopping the inverter device (2) DC input (2) pulse width control inverter circuit having a DC filter consisting of a capacitor and a reactor (2) without arising,
It is possible to provide a high quality impark device that does not cause any deterioration or damage to the risk.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a stop control device for an inverter device according to the present invention, FIG. 2 is an operation waveform diagram explaining the operation of each part of the embodiment of FIG. 1, and FIG. 4 is a block diagram showing an example of a conventional pulse width control inverter device, and FIG. 5 is a circuit diagram showing a specific example of an inverter in the inverter device shown in FIG. , FIG. 6 is a time chart explaining the operation of the inverter circuit in FIG. 5, FIG. 7 is an operation waveform diagram explaining the operation of each part of the inverter device in FIG. 1 is an operation waveform diagram explaining the flow capacity. 1... Direct comparison, 2... Input breaker, 3...
・DC filter, 4... Inverter, 5... AC filter, 6... Output breaker, 7... Load,
11... Voltage reference setter, 12... Voltage error amplifier circuit, 13... Oscillator, 14... Phase shifter, 1
5...Ring kakunta, 2''~Sae...Soil silisk, 31-34...Freewheeling diode, 21A-2
4A-...Commutation auxiliary sirisk, δ, 26...Commutation reactor, 27. A... Commutation capacitor, 61.
...Memory circuit, 81...AD converter, 82...
Latch circuit, wings...digital phase shifter. (7317) Agent Masu Buri Nori Chika Ken 16 (and 1 other person) Figure 1 1 - J Figure 2 A〉Half 4 11111 Book 112, -1111 Work〃IIl ;Circle-----↓-1--1----Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8

Claims (1)

[Claims] (1) DC wind source, the DC wind source (=DC filter connected and consisting of a capacitor and reactor, an inverter that converts the output of the DC filter into AC output (=an error amplifier circuit and phase shifter that controls the output voltage of the inverter) An inverter device equipped with a gate control circuit consisting of an inverter (2).At the same time as the DC power supply is cut off, a memory circuit for holding the output level of the ml error amplification circuit is connected between the error amplification circuit and the phase shifter. (A stop control device for an inverter device, characterized by comprising two components.