JPS60256998A - ダイナミツク型半導体記憶装置 - Google Patents

ダイナミツク型半導体記憶装置

Info

Publication number
JPS60256998A
JPS60256998A JP59113742A JP11374284A JPS60256998A JP S60256998 A JPS60256998 A JP S60256998A JP 59113742 A JP59113742 A JP 59113742A JP 11374284 A JP11374284 A JP 11374284A JP S60256998 A JPS60256998 A JP S60256998A
Authority
JP
Japan
Prior art keywords
bit line
sense amplifier
memory cell
storage capacitor
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59113742A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0370877B2 (ko
Inventor
Toshio Mitsumoto
敏雄 三本
Keiji Oota
佳似 太田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP59113742A priority Critical patent/JPS60256998A/ja
Priority to US06/738,870 priority patent/US4715015A/en
Publication of JPS60256998A publication Critical patent/JPS60256998A/ja
Publication of JPH0370877B2 publication Critical patent/JPH0370877B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
JP59113742A 1984-06-01 1984-06-01 ダイナミツク型半導体記憶装置 Granted JPS60256998A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP59113742A JPS60256998A (ja) 1984-06-01 1984-06-01 ダイナミツク型半導体記憶装置
US06/738,870 US4715015A (en) 1984-06-01 1985-05-29 Dynamic semiconductor memory with improved sense signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59113742A JPS60256998A (ja) 1984-06-01 1984-06-01 ダイナミツク型半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS60256998A true JPS60256998A (ja) 1985-12-18
JPH0370877B2 JPH0370877B2 (ko) 1991-11-11

Family

ID=14619973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59113742A Granted JPS60256998A (ja) 1984-06-01 1984-06-01 ダイナミツク型半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS60256998A (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63896A (ja) * 1986-06-20 1988-01-05 Fujitsu Ltd 半導体記憶装置の動作方法
JPH06223572A (ja) * 1992-10-30 1994-08-12 Internatl Business Mach Corp <Ibm> Ｄｒａｍ構造

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63896A (ja) * 1986-06-20 1988-01-05 Fujitsu Ltd 半導体記憶装置の動作方法
JPH06223572A (ja) * 1992-10-30 1994-08-12 Internatl Business Mach Corp <Ibm> Ｄｒａｍ構造

Also Published As

Publication number Publication date
JPH0370877B2 (ko) 1991-11-11

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees