JPS60254629A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form reproducibly grooves with precise depth and shape on a semiconductor surface, by forming a single crystal semiconductor layer over the surface of the semiconductor substrate, and then by removing the insulating film pattern. CONSTITUTION:After a silicon dioxide film is formed over a silicon substrate 1, it is patterned to form a plural of mask patterns 6 at redetermined intervals. A single crystal silicon layer 7 is formed over the exposed surface of the silicon substrate 1. The mask patterns 6 are removed to form grooves which are defined by the silicon substrate 1 and the single crystal silicon layer 7. A silicon dioxide film 8 with a thickness sufficient to bury the separation grooves 3 resulting from thermal oxidation is grown inside the grooves 3 and over the surface of the single crystal silicon layer 7. The silicon dioxide film 8 over the single crystal silicon layer 7 is selectively removed so that element isolation regions 5 consisting of the grooves 3 in which the silicon dioxide film 8 is being buried can be completed.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of forming a groove structure using a semiconductor for use in an element isolation region or a capacitor.

(b) Background of the Technology The degree of integration of semiconductor integrated circuit devices has been remarkable, and until recently, high integration has been achieved mainly by reducing the size of individual elements.

However, there is a limit to high integration using this method, and in order to overcome this limit, a method was developed that formed grooves on the semiconductor surface.
(C) Prior art and problems Grooves on the surface of a semiconductor are generally formed by the method shown in FIG. 1.

That is, as shown in FIG. 1(a), a mask pattern 2 made of resist or the like is placed on a semiconductor substrate, for example, a silicon substrate 1.
is formed, and then the mask is formed as shown in FIG. 1 (bl).
Through the openings of pattern 2, the surface of the substrate exposed in the openings is etched using, for example, reactive ion etching means having anisotropy in the direction perpendicular to the substrate surface, and a predetermined pattern is etched on the substrate surface. A separation groove 3 having a depth is formed.

However, in this method, as shown in FIG. 1(b), defects are generated on the inner surface of the groove 3 due to ion bombardment damage and metal contamination during reactive ion etching, and current leakage occurs due to the defects. In the case of groove 3, which is significantly deeper than the groove width as shown in the figure, the shape tends to widen in the middle, and it is difficult to control the depth with good reproducibility. However, there were problems that were undesirable for mass production.

(d) Purpose of the Invention The present invention eliminates the above-mentioned problems of the conventional method, so that when used for device isolation, the device characteristics do not deteriorate, and when used for a capacitor, the capacitance value can be obtained with good reproducibility. Another object of the present invention is to provide a method for forming a trench made of semiconductor.

(PI) Structure of the Invention The object of the present invention is to form an insulating film pattern on a semiconductor substrate, form a single crystal semiconductor layer on the exposed surface of the semiconductor substrate by selective epitaxial growth, and then remove the insulating film pattern. This is achieved by the method for manufacturing a semiconductor device according to the present invention, which includes the step of forming a groove-like structure made of a semiconductor layer on the surface of the semiconductor substrate by removing the semiconductor layer.

That is, in the present invention, an insulating film mask pattern having a width corresponding to a groove and substantially vertical side surfaces with no unevenness is formed on a semiconductor substrate, and a single crystal is selectively grown on the exposed substrate surface by selective epitaxial growth. grow a semiconductor layer,
The mask pattern is removed to form a separation trench having substantially vertical side surfaces without irregularities that match the mask pattern.

In this way, the depth of the groove is determined by the thickness of the selective epitaxial growth layer, so it can be determined with good reproducibility and accuracy.The groove shape is determined by the etching shape of the insulating film mask, but when the insulating film is patterned Since the removed portion of the insulating film during etching usually has a wide area corresponding to the active device area, etching is performed uniformly, allowing accurate shape control, and selecting a substrate with no damage or metal contamination. Since the impurity type and concentration of the epitaxial growth layer can be determined independently, for example, by using a high concentration p-type for the substrate and a low concentration p-type for the epitaxial layer, 0M
This can provide multiple effects such as preventing O3 launch-up and countermeasures against alpha rays.

(f) Embodiments of the Invention The present invention will be described below with cross-sectional views of the process of one embodiment shown in FIGS. A detailed explanation will be given with reference to a cross-sectional view.

FIG. 3 shows an embodiment in which the trench is completely filled with a thermal oxide film when the trench structure is used for isolation between elements.

Refer to FIG. 2(a) First, a silicon dioxide (SiO□) film having a thickness of, for example, 1 to 5 μm is formed on a silicon substrate 1 having a desired conductivity type by thermal oxidation or CVD.・Perform patterning by ion etching to form a layer of, for example, 0.5 to 1 μm on the silicon substrate.
A plurality of SiO□ mask patterns 6 having a width of approximately m and substantially vertical side surfaces with no unevenness are formed at predetermined intervals.

Refer to FIG. 2(b) Next, a chlorine-based reaction gas, i.e., silicon tetrachloride (SiC14)
, trichlorosilane (SiHCls), dichlorosilane (SiHzCh), monochlorosilane (SiHs)
A single crystal silicon layer 7 having a desired conductivity type and having a thickness of, for example, 1 to 5 μm is grown on the exposed surface of the silicon substrate by a normal selective epitaxial growth technique using Cl) or the like.
form. In this case, there is no problem even if the single crystal silicon layer 7 is thicker than the Si0g mask pattern 6.

Refer to FIG. 2 1c) Next, the SiO □ mask pattern 6 is removed by a normal wet etching method using a hydrofluoric acid solution to form a groove 3 formed by the silicon substrate 1 and the single crystal silicon layer 7. . The side of this petition 3 is the 5ift mask.
It is formed on a substantially vertical surface with no unevenness in alignment with the pattern 6.

FIG. 2 (see dl) Then, by a normal thermal oxidation method carried out in wet oxygen, for example, the inner surface of the separation groove 3 and the upper surface of the single crystal silicon layer 7 exposed in the port are thickened to fill the separation groove 3. A thermally oxidized 5iOz film 8 approximately corresponding to . Note that, as described above, since no unevenness is formed on the side surface of the groove 3, no cavity is formed inside the thermally oxidized SiO□ film 8.

Furthermore, since the trench width only increases by about half the trench width when forming the thermally oxidized SiO□ film 8, the width of the isolation region can be significantly reduced compared to the conventional selective oxidation method.

Figure 2 (see el) Next, the conventional surface polishing method (mechanical surface polishing means,
The thermally oxidized SiO□ film 8 on the single-crystal silicon layer 7 is selectively removed using a surface polishing method using plasma, etc., and the element isolation region 5 consisting of the groove 3 in which the thermally oxidized SiO□ film 8 is embedded is completed. .

FIG. 3 shows a modification of the element isolation region in which the inside of the trench is filled with a polycrystalline silicon layer.

FIG. 3 (see al) In this case, after forming a separation trench 3 made up of a silicon substrate 1 and a single crystal silicon layer 7 in the same manner as in the previous embodiment, the inner surface of the trench 3 and Thermal oxidation SiO□ is applied to the upper surface of the single crystal silicon layer 7 to a thickness of, for example, about 500 mm.
A film 8 is formed on the inner surface of the groove 3 and on the top of the single crystal silicon layer 7 to a thickness of, for example, 1,000 to 20 nm by CVD.
A silicon nitride film 9 of about 0.000 mm is formed, and then CVD
For example, 1 μm is sufficient to fill the groove 3 on the main surface by the method.
A polycrystalline silicon layer 10 having a certain thickness is formed.

Note that, as in the previous embodiment, since the side surfaces of the groove 3 are formed flat, no cavity is formed in the polycrystalline silicon layer 10 within the groove 3.

Refer to FIG. 3 (bl) Next, the polycrystalline silicon layer 10 on the upper surface is removed by a conventional surface polishing method as described above until the silicon nitride film 9 is exposed.

Referring to FIG. 3(C), the upper surface of the polycrystalline silicon layer 10 buried in the groove 3 is selectively coated with a thickness of, for example, 20 mm by a conventional thermal oxidation method.
A SiOg insulating film 11 of about 0.00 to 8000 is formed.

Referring to FIG. 3(d), the silicon nitride film 9 on the upper surface is removed by phosphoric acid treatment or the like, and then the thermally oxidized SiO□ film 8 under the silicon nitride film 9 is removed using a hydrofluoric acid solution.

In this way, an inter-element isolation region 5 is formed, which consists of a groove 3 in which a polycrystalline silicon layer 10 is embedded in the surface of the single crystal silicon layer 7 through a thermally oxidized SiO□ film 8 and a silicon nitride film 9, and has a 5in2 insulating film 11 on top. is formed.

The silicon nitride film mainly serves as a stopper during surface polishing of the polycrystalline silicon layer 10, and serves as a silicon nitride film formed on the polycrystalline silicon layer 10 buried in the separation trench 3.
It plays a role in preventing the formation of a bird's beak in the O□ insulating film 11 and the expansion of the isolation region width.

(g) Detailed Description of the Invention According to the present invention, it is possible to form grooves with accurate depth and shape on the semiconductor surface with good reproducibility, and it is also possible to prevent spatter damage and metallurgy when forming the grooves. Contamination is prevented. Furthermore, since the impurity type and concentration of the upper and lower parts of the substrate can be selected independently, it is possible to easily prevent latch-up and α-ray damage in semiconductor ICs.

Therefore, the present invention is extremely effective in improving the manufacturing yield and degree of integration of semiconductor integrated circuit devices and the like.

Note that the method of the present invention is also applied to the formation of a concave capacitor in a Guinamisoku RAM.

2 (al to (e) are process cross-sectional views showing one embodiment of the method of the present invention. Figure 3 (al to (d) are process cross-sectional views showing another embodiment of the method of the present invention. FIG.

In the figure, 1 is a silicon substrate, 3 is a trench, 5 is an isolation region, 6 is a silicon dioxide mask pattern, 7 is a single crystal silicon layer, and 8 is a thermally oxidized silicon dioxide film.

Claims (1)

[Claims] After forming an insulating film pattern on a semiconductor substrate and forming a single crystal semiconductor layer on the exposed surface of the semiconductor substrate by selective epitaxial growth, the insulating film pattern is removed to form a semiconductor layer on the surface of the semiconductor substrate. 1. A method for manufacturing a semiconductor device, comprising the step of forming a groove-like structure.