JPS60247970A - Bi-directional semiconductor device - Google Patents

Abstract

PURPOSE:To improve ignition characteristics by forming one or more of regions, in which electrons are injected initially to each mode of a TRIAC, and arranging the regions where nearest to the main current conduction regions of each mode. CONSTITUTION:A first intermediate layer 5 adjacent to each of a first surface layer 2, a second surface layer 16 and a third surface layer 4 in a semiconductor base body having five layer structure is formed. A first main electrode 1, a third electrode 15 and a gate electrode 3 are shaped brought into contact with the first intermediate layer 5. The base body is provided with a fourth surface layer 8, a second intermediate layer 7 and a second main electrode, and the fourth surface layer 8 is formed in structure in which at least one part thereof is overlapped on each of the first, second and third surface layers 2, 16, 4 on viewing from a plane. The second surface layer 16 is disposed while surrounding the third surface layer 4, and opening sections 17, 18 are shaped to each of the second and third surface layers so that regions in which carriers are injected initially are brought near to main current conduction regions.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to an alternating current switching semiconductor device (hereinafter abbreviated as TRIAC) having a five-layer structure with alternating conductivity types among bidirectional semiconductor devices. In particular, it relates to a gate structure with improved ignition characteristics.

[Technical background of the invention and its problems] A triac is a semiconductor switching element that can control alternating current in both directions by a positive or negative gate signal.

FIG. 4 is a plan view of a conventional triac, and FIG. 3 is a sectional view taken along a line segment XX in the same figure. Its cross section is n'
It consists of a five-layer structure of -p-n-p-n. 1 is the first main electrode T, (abbreviated as T, hereinafter the same), 2 is the n emitter NE+ connected to T1, 9 is the second main electrode T2.8 is the n emitter Nε2.3 connected to T2 gate electrode G,
4 is an n emitter NEC1 connected to G. 5,
6.7 are respectively p base P8, n base Na and p
It is an emitter PE. The firing mode of this triac is the bias direction between T and -T2 (positive and negative directions), and T,
There are four types of combinations of bias directions (two directions) between -G. In other words, the working Φ mode (when applying a positive bias to T2 with respect to T, and at the same time applying a positive bias to G with respect to T), the working θ mode (when applying a positive bias to T2 with respect to T,
G negative), ■Φ mode (T2 negative, G positive for T), Id
There are four modes: le mode (T2 negative and G negative for T). ■mode is when the thyristor part of the four-layer structure of PEN5PNE+ is turned on, with the electrode ff1T2 as the anode and the lower electrode as the cathode;
This is the case when the thyristor portion of the four-layer structure of N5PENE2 is turned on.

FIGS. 5(a) and 5(b) are plan views for explaining the region where initial electron injection occurs in each mode, but the description of Nε2 is omitted to make the drawings difficult to read. In the case of FIG. 5(a), when a positive voltage is applied to the gate G with respect to T1, the gate current flows from (a) to (b) in the direction of the arrow in the figure. This gate current path is 2N
5. In other words, the p base Ps is biased toward the n emitter side in contact with the 1-1 electrode, and is sandwiched between NEG of Nε1 and 4.
There is a potential drop in the area.

As a result, the region shown in the figure is first forward biased, and there is a portion C where electrons are initially injected. This initial implantation region contributes to ■Φ mode and ■Φ mode. In other words, in the engineering mode, PEN8
The thyristor structure section NE is turned on, and a main current carrying region (2) indicated by 10 is formed (the region indicated by diagonal lines).
■In the case of Φ mode, P8NBP is created by the injection of electrons.
The thyristor structure of ENE2 is turned on, and a main current carrying region (2) indicated by 11 is formed. (2) In the case of Φ mode, the initial injection region and the main current carrying region (2) are close to each other, and the turn-on process is similar to that of a normal thyristor, so turn-on is easily performed.

(2) In the case of the Φ mode, since this region is separated from the main current carrying region (2), it takes time for the ignition region to move, and the process is complicated, resulting in poor ignition characteristics.

If we consider the case where a rectangular ) is applied to the gate electrode 3 shown in FIG. 5(b), a current flows to the gate 1 in the direction of the arrow shown in the figure (0) to ku). The potential distribution generated by this current generates the first electron injection region in the region shown in (3) in the same figure. This initial injection region ■ is the I<E) mode and ■
Contributes in O mode. Since this region (2) is close to the main current carrying region (2) for the (2) mode, the thyristor structure of P8NBPENE2 can be turned on relatively easily. In addition, in the case of the ■○ mode, the initial injection region is quite far away from the main current carrying region 1, but since the N-Ps junction is reverse biased and the ignition process is simpler in the ■ mode than in the ■ mode, it has little effect. I haven't received it.

TRIAC is used as an AC switching element.
However, in that case, the ignition mode used is a combination of two of the three ignition modes except for the above-mentioned ignition modes. The reason why the ■■ mode is not used is that, as mentioned above, the ignition characteristics are poor and the gate current required for ignition is much higher than in the other three modes. - To explain how the ignition occurs, electrons are injected from NET to PB, which is forward biased by the gate current flowing from the gate electrode G to the main electrode T1 (
(in the region of FIG. 5(a)).

In FIG. 3, these electrons are accumulated in the n base N[] of 6 and as a result of lowering the potential of N8, balls are injected into NB from the 2nd day. This hole passes through NB and the p emitter P of 7
, to the T2 electrode of 9. At this time, a potential drop occurs within PE, which promotes the injection of electrons from NE2, and finally the main current carrying region (2) is formed. In this process, the ■Φ mode reaches ignition, but the pattern arrangement of the n emitter NEG and P8 in the gate 0 part and the NE
The partial shape of T and NE2 determines the quality of this ignition characteristic. It is considered that the pattern arrangement of the NEGs in the back groups 1 to 1 limits the current path to the groups 1 so that electron injection from the NET occurs efficiently, which contributes to improving the characteristics of the ■Φ mode. In the conventional Goo 1-pattern, there is only one gate current path from the gate G to the 1-1 electrode, and the main current conduction is ignited and eventually conducts with the place where the initial electron injection occurs depending on the part. The area may be separated. ■■ mode is exactly in this state, which is considered to be one of the reasons why the ignition characteristics deteriorate.

As described above, the drawback and problem of the conventional one-helix fire is that the initial electron injection occurs and the four regions are located at very inappropriate positions depending on the ignition mode.

[Purpose of the invention] The present invention improves the Φ mode, which has four ignition modes, 1 to 2, and the Φ mode, whose ignition characteristics were conventionally very bad compared to the other three modes. The purpose is to make it freely available for use.

[Summary of the Invention 1 The present invention sets the region where initial electron injection occurs at one or more locations for each mode of the 1. This is an attempt to solve the problem by placing the

That is, the present invention provides (a) n-p conductivity types that are alternately different;
- a semiconductor substrate having a five-layer structure of n-p-n; (b) an n-type NEG (first surface layer) on one surface side of the substrate;
, NET (second surface layer) and NEG (third surface layer), and (c) a first intermediate layer adjacent to each of NE5, NE3 and NEG, a part of which is exposed on the surface. "C.
A first main electrode provided in contact with a p-type base layer Ps that separates the three n-emitters from each other, and each of the exposed surfaces of the PB adjacent to (d)NET, NE3, and NC6. King 1, third electrode T-3J3, gate electrode G, and (e) n-type NE2 on the other surface side of the substrate.
(f) PE of a p-type second intermediate layer adjacent to NE2 and a part of which is exposed on the surface; and (g) N[2 provided in contact with the exposed surface of PE. The second main power station 8i-cho,
and NE2 is NET, Nap when viewed from the plane.
and a triac having a structure that overlaps each layer of NEG at least in part, (a) Nzx is arranged surrounding NEG, and (b)
) This triac is characterized in that each of NE3 and NEG is provided with one or more open portions so that the region where initial electron injection occurs is as close as possible to the main current carrying region.

The region where initial electron injection occurs is the PBNEG that faces the contact area between the T3 electrode and Ps in the opening of N1-3.
Gate electrode G and P8 in the junction region or the frontage of NEG
This refers to the PDNE3 junction region facing the contact area with.
In addition, the main current carrying area is the PE sandwiched between the T1 and T2 electrodes.
A first main current carrying region forms a thyristor structure with four layers of NB Pa NE, and a second main current carrying region forms a thyristor structure with four layers of PI4NB PE NE2 sandwiched between T, T, and both electrodes. It is. In addition, the first main current carrying region is a geometric region in which six electrodes, the T1 electrode, the NET layer, the P8 layer, the Ne layer, the 11th layer, and the T2 electrode, overlap when viewed from the surface. In fact, the area where the main current finally flows does not completely match the above-mentioned geometric area due to the end effects of the electrodes and each layer.

As an embodiment of the above invention, the positions of the openings provided in NF2 and 'NEG are more specific as follows. In other words, on the surface of the semiconductor substrate, regarding the dividing line that divides into two equal parts the elongated region sandwiched between the first main current carrying region of Nrl and the second main current carrying region of PH exposed on the surface, The position of the opening is (a) when there is one opening, it is located on the equally dividing line and close to both the first and second main current energizing areas, and (b) when there is multiple opening , at least two of them are on opposite sides of the equally dividing line, one in the area close to the first main current energized area and the other one in the area close to the second main current energized area. Place it in In a preferred embodiment when considering the balance of ignition characteristics in each mode and productivity, if there is only one opening, the position of the opening is on the equal division line and is symmetrically divided into equal parts by this straight line. And 1st. In an area close to any of the second main current carrying areas, or if there are multiple openings, at least two of them are located symmetrically to the equal dividing line and between the first and second main current carrying areas. placed in an area close to either.

[Embodiment of the Invention] FIGS. 1(a) and 1(b) are plan views of an embodiment of a triac according to the present invention described in claim 3, viewed from the first principal surface side. In order to make the drawings easier to read, the NE2 layer 8 is omitted in FIG. As shown in Figure (b), N2 (fourth surface layer) 8 is a part of Nt+ (first surface layer) 2 and NF2 (second surface layer).
Surface layer) 16 and N, 6 (third surface layer) overlap with 4 when viewed from the plane. Also, N E3 is arranged surrounding N EC, NF2 has one opening 18 and NEC has two openings.
It has two openings 17. Figure 2 (a) and (
b) is a plan view for explaining the initial electron injection region of the triac of the present invention. The shaded area 10 in the same figure (a'') is the first main current energization area (operated in emode mode).
, region 11 indicates the second main current energization region (operating in ■mode). The straight line Y-Y is an equally dividing line that divides the elongated portion sandwiched between the regions 10 and 11 into three equal parts. The same figure (a
) is the gate electrode (G)3 for the first main electrode (T, )1.
When a positive voltage is applied to , the gate current flowing out from each of the two gate openings 17 is N as shown in the figure
The third electrode 1 flows through a gate current path limited by EG4 and NE316 and is in contact with the opening 18 of NE3.
It is collected in 5. This current causes a potential distribution in each part of the gate current path to drop along the gate openings 17 to 18, forward biasing each part of the NE3P8 junction in contact with this. The region that is most forward biased is the N E3 P s junction portion facing the opening 17 . Therefore, the first injection of electrons occurs in the region ◎ shown in the figure. Similar electron injection also occurs in the NE3P junction region ◎- which faces other openings arranged symmetrically with respect to the dividing line Y-Y. To ignite the Φ mode, use the injected electrons in the region ◎ close to the main current carrying region ■, and to ignite the ■Φ mode, use the injected electrons in the region ◎′ close to the main current carrying region ■. do. FIG. 2(b) shows the case where a negative voltage is applied to the gate electrode (G) 3 for the first main electrode (T, The flow is divided into two directions from the part of the third electrode 15 in contact with N EG 4
The water flows into the two openings 1] section 17, respectively. This gate current causes a potential drop in the Ps region of the gate current path surrounded by N EG 4 and NE 316 from the opening 18 toward the opening 17, and forward biases each part of the PBNEG junction in contact with this. Among them, the region where the bias is particularly strong is the PBNEG portion facing the opening 18.
Therefore, the first injection of electrons occurs from the region (3) shown in the figure. In this case, the injection region is located on the equally dividing straight line Y-Y and close to both of the two main current carrying regions.
Therefore, the ■○ mode and ■○ mode start ignition symmetrically due to the injected electrons in this region 0.

As is clear from the above example, when the gate potential is in the ■ mode, the region where the initial electron injection occurs is the PB opposite to the opening of the NFG (the outflow end of the gate current), which has a high potential.
It is an NE3 junction, and when the gate potential is in the ○ mode, it is a P day NEG junction that faces the opening of NE3 (outflow end of gate current), which has a high potential.
:12, but the reason for separating it by region 19 of Pa5 is mainly because NE close to the main current carrying region
The purpose is to increase the simplicity of manufacturing by making the effect of the area 316 and the area NE3 close to the main current carrying area the same as that of the area P, respectively. N E3 is P8
NET, but the first main electrode 1 and the third
It is connected to the electrode 15 through a region 19 of Pa, and is considered to be at approximately the same potential.

In this embodiment, the double pattern of NE3 and NEG is formed symmetrically with respect to the equally dividing dotted lines Y- and Y, but the present invention is not limited to this. If the shapes of the main current carrying areas ■ and ■ are different and the above-mentioned equally dividing line cannot be determined, for example, two openings may be provided in the NEC, one in the area and the other in the area. Place it in the closest position (functions in Goo 1 to Positive ■ mode). One opening is provided in NE3 (placed at a position close to all of the openings, area work, and ■).

In this case, two gate current paths are formed, but the balance of the ignition current is from the opening of NE3 to the opening of N50. For example, adjust the width of the current paths so that the resistances of the gate current paths leading to the openings of It is only necessary to make the spreading resistances of the P days of the two parts equal to each other (for example, make these parts have the same shape).

[Effect of the invention 1 The present invention allows the initial electron injection region of the triac to be
It is possible to intentionally change the positions of the openings of C and NE3. Conventional triacs operate in ■Φ mode and [
The initial electron injection region and the main current carrying region were far apart, which worsened the ignition characteristics, but the present invention makes it possible to place the above circular regions close to each other, improving the ignition characteristics. Previous triacs used only three t-does, but now all four t-does can be used.

In addition, by symmetrically arranging the pattern of the N region of Goo (・) and setting the current path from Goo 1 symmetrically, the asymmetry in the generation of the injection region due to the asymmetry of the gate pattern is eliminated. This reduces the mode-specific imbalance of gate current in the ignition characteristics and increases the degree of freedom in designing electrical circuits using triacs.

[Brief explanation of drawings]

FIGS. 1(a) and (b) are partial plan views of the TRIAC according to the present invention, and FIGS. 2(a) and (b) are plan views for explaining the initial electron injection region of the TRIAC according to the present invention. , 3 and 4 are a sectional view and a plan view, respectively, of a conventional triac, and FIGS. 5(a) and (
b) is a plan view for explaining the initial electron injection region of a conventional triac. 1... First main electrode (T1), 2... First surface layer (
NE, ), 3... Gate electrode (G), 4... Third surface layer (NEG), 5... First intermediate layer (P8
), 7... Second intermediate layer (P[), 8... Fourth surface layer (NE,), 9... Second main electrode (]-3),
10... First main current carrying area (I>, 11... Second main current carrying area (III), 15... Third electric current tf
i(T,), 16... second surface layer (N [3), 1
7.18... Opening, Y-Y... Equally dividing dotted line.

Claims (1)

[Claims] 1. A semiconductor substrate having a five-layer structure with alternating conductivity types, a first surface layer of the first conductivity type on the first main surface side of the substrate, and a second surface layer of the first conductivity type on the first main surface side of the substrate.
a surface layer and a third surface layer; the first, second and third surface layers;
a first intermediate layer of a second conductivity type adjacent to each of the surface layers, a portion of which is exposed on the first main surface to separate the three surface layers from each other; A first main electrode, a third N-pole, and a gate electrode provided in contact with the second and third surface layers and the exposed surface of the first intermediate layer adjacent to each surface layer, and a second main surface side of the base body. a fourth surface layer of a first conductivity type; a second intermediate layer of a second conductivity type adjacent to the fourth surface layer and partially exposed on the second main surface; a fourth surface layer and a second intermediate layer; a second main electrode provided in contact with the exposed surface, and a bidirectional semiconductor having a structure in which the fourth surface layer overlaps at least a portion of each of the first, second, and third surface layers when viewed from above. A device comprising: (a) a second surface layer comprising a third surface layer;
(b) each of the second surface layer and the third surface layer has one or more openings so as to bring the region where initial carrier injection occurs as close as possible to the main current carrying region; A bidirectional semiconductor device characterized by: 2. With respect to an equally dividing straight line that approximately bisects the area where the opening is sandwiched between the first main current carrying area of the first surface layer and the second main current carrying area of the exposed surface of the seventh intermediate layer, ( a> When there is one opening, fr located on the equal division line and close to both the first and second main current energizing regions.
4vi, (b') When there are a plurality of openings, at least two of the openings a are on opposite sides of the straight line and are located on the first side.
2. The bidirectional semiconductor device according to claim 1, wherein the bidirectional semiconductor device is disposed in a region close to either of the main current carrying region and the second main current carrying region. 3. The bidirectional semiconductor device according to claim 2, wherein the openings are arranged symmetrically with respect to the dividing line.