JPS6024045A - Semiconductor lead frame - Google Patents

Semiconductor lead frame

Info

Publication number
JPS6024045A
JPS6024045A JP13165883A JP13165883A JPS6024045A JP S6024045 A JPS6024045 A JP S6024045A JP 13165883 A JP13165883 A JP 13165883A JP 13165883 A JP13165883 A JP 13165883A JP S6024045 A JPS6024045 A JP S6024045A
Authority
JP
Japan
Prior art keywords
lead frame
alloy
copper
oxide film
adhesion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13165883A
Other languages
Japanese (ja)
Inventor
Ryozo Yamagishi
山岸 良三
Osamu Yoshioka
修 吉岡
Yoshiaki Wakashima
若島 喜昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Hitachi Ltd
Original Assignee
Hitachi Cable Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd, Hitachi Ltd filed Critical Hitachi Cable Ltd
Priority to JP13165883A priority Critical patent/JPS6024045A/en
Publication of JPS6024045A publication Critical patent/JPS6024045A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582Metallic layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the property of adhesion between an oxide film provided on the surface of a material for the titled lead frame by a method wherein the surface of the material made of copper or copper alloy is provided with a Cu-Sn series alloy plated layer containing 10-15wt% of Sn, and further an Ag plated layer is formed on the lead frame at least at the part for mounting a semiconductor pellet. CONSTITUTION:After the surface of the lead frame 1 made of Cu or Cu alloy is pre-treated by degreasing and pickling, the plated film 2 of approx. 0.2mum thickness is adhered by dipping in a plating bath of Cu-Sn alloy composed of Cu cyanide, soda stannate, and Na cyanide and containing 10-15wt% of Sn. Further, the Ag plated layers 3 of about 5mum thickness are adhered to a tab part 5 to which an Si pellet is brazed and inner leads 6 to which copper wires are bonded. In such a manner, the frame sealing property at the time of resin sealing is improved by the improvement of the adhesion property of film in the formation of the oxide film on the surface by heating in the air.

Description

【発明の詳細な説明】 本発明は半導体装置を構成するリードフレームに関する
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a lead frame constituting a semiconductor device.

半導体用リードフレーム・材としては鉄系のコバール、
42合金、銅系のCu−3n、Cu−Fe等の合金が用
いられている。銅系の材料は強度及び熱膨張率の点で鉄
系に劣るが、熱放散性及び導電率の点で鉄系よりも優れ
た特徴をもっている。近年強度及び熱膨張率を改善した
新しい銅合金が開発され、コスト低減の面からもリード
フレーム材としては銅合金の比率が高くなってきている
Iron-based Kovar is used as a lead frame/material for semiconductors.
42 alloy, copper-based Cu-3n, Cu-Fe, and other alloys are used. Copper-based materials are inferior to iron-based materials in terms of strength and coefficient of thermal expansion, but are superior to iron-based materials in terms of heat dissipation and electrical conductivity. In recent years, new copper alloys with improved strength and coefficient of thermal expansion have been developed, and the proportion of copper alloys used in lead frame materials is increasing from the perspective of cost reduction.

ところで、リードフレーム拐の特性としては物理的、機
械的性質の他、半導体組立の際のめつき性能、半田向性
あるいはプラスチック樹脂との密着性等も重要である。
Incidentally, in addition to physical and mechanical properties, important characteristics of lead frame bonding include plating performance during semiconductor assembly, solder tropism, and adhesion with plastic resin.

すなわち半導体装置を組立てるときにSi素子をリード
フレームにろう接したり、ワイヤボンディングを350
℃以上の温匿に加熱して行なうので、銅合金フレームに
酸化膜が形成され、プラスチック樹脂との密着性が低下
する問題がある。特に銅系+) )yフレームに部分的
にAgめっきする場合、Agの密着性を良くするためA
gめっきする前に薄<Cuめつきケ行なっているが、こ
のCuめつき層は酸化雰囲気(例えば大気)中で力日熱
されると厚くて脆い酸化膜を形成し、こうして形成され
た酸化膜は素材との密着性が悪く、プラスチック封止し
た俊の半導体装置の耐湿性を著しく低下させる原因とな
っている。
In other words, when assembling a semiconductor device, Si elements are soldered to lead frames, and wire bonding is
Since the process is carried out by heating to a temperature above .degree. C., there is a problem that an oxide film is formed on the copper alloy frame and the adhesion with the plastic resin is reduced. In particular, when partially plating Ag on a copper-based frame, use A to improve the adhesion of Ag.
Before G plating, a thin <Cu plating layer is applied, but when this Cu plating layer is heated in an oxidizing atmosphere (for example, the atmosphere), it forms a thick and brittle oxide film, and the oxide film formed in this way forms a thick and brittle oxide film. has poor adhesion to the material, causing a significant drop in moisture resistance of plastic-sealed semiconductor devices.

したがって本発明の目的は、前記した従来技術の欠点を
解消し、銅系合金リードフレームの樹脂封止性を大幅に
改善することができる新期な半導体用リードフレームを
提供することにある。
Therefore, an object of the present invention is to provide a new lead frame for semiconductors which can overcome the drawbacks of the prior art described above and can significantly improve the resin sealability of a copper-based alloy lead frame.

すなわち本発明の要旨とするところは、銅系リードフレ
ームの六面に、10〜50重量%のSnを含有するCu
−8n系合金めっき層を設け、さらに該リードフレーム
材の少なくとも半導体ベレットを取り付ける部分にAg
めっき層を設けたことにある。ここで、Cu−3n系合
金とは、CuとSnを主体とする合金を意味し、、Cu
とSnの他にIn、 Bi。
That is, the gist of the present invention is that Cu containing 10 to 50% by weight of Sn is formed on six sides of a copper lead frame.
- Provide an 8n alloy plating layer, and further provide Ag on at least the portion of the lead frame material where the semiconductor pellet is attached.
This is because a plating layer is provided. Here, the Cu-3n alloy means an alloy mainly composed of Cu and Sn.
In addition to Sn, In and Bi.

Sb、Zn等の金属を倣蓋添力uした合曾も包含される
ことはもちろんである。
Needless to say, it also includes composites made of metals such as Sb and Zn.

上記のCu−8n系合金においてSn含有量を10〜5
0重量%に限尾した根拠は、Snが10重量%未満では
プラスチック樹脂との密着性が悪化し、他方Snが50
箆量チを越える場合には該合金の融点が低くなり、従っ
てAgとの密着性が悪くなるからである。
In the above Cu-8n alloy, the Sn content is 10 to 5.
The reason for limiting Sn to 0% by weight is that if Sn is less than 10% by weight, the adhesion with the plastic resin will deteriorate;
This is because if the amount exceeds 1, the melting point of the alloy decreases, and therefore the adhesion to Ag deteriorates.

以下、本発明を象付の図面と共に実施例により具体的に
説明する。
Hereinafter, the present invention will be specifically described by way of examples together with illustrated drawings.

実施例 l 第1図は本発明による半導体用リードフレームの一実施
例を示す平面図である。1ず銅合金から成るリードフレ
ームの表面を脱脂、酸洗によって前処理した後、Cu−
8μ合金めつき浴(ンアン化銅、錫酸ソーダ、シアン化
ナトリウムから成る。)で0.2μのめつき膜2j−設
け、さらにSi素子がろう接されるタブ部5及びAui
がワイヤボンディングされるインナーソー14部61に
5μのAgめつき層3を設けて半導体用リードフレーム
を形成する(第2図参照ン。
Embodiment l FIG. 1 is a plan view showing an embodiment of a semiconductor lead frame according to the present invention. 1. After pre-treating the surface of the lead frame made of copper alloy by degreasing and pickling, Cu-
A plating film 2j of 0.2μ is provided in an 8μ alloy plating bath (composed of copper anhydride, sodium stannate, and sodium cyanide), and the tab portion 5 to which the Si element is soldered and the Au
A 5 μm Ag plating layer 3 is provided on the inner saw 14 portion 61 to which wire bonding is to be performed to form a semiconductor lead frame (see FIG. 2).

壕だ、比較例として第1図の鋼合金から成るリードフレ
ームの表面を脱脂、酸洗によって前処理した後、Cuス
トライク浴(ンアン化鋼、シアン化ナトリウム、ロッシ
ェル塩から成る。)で0.2μのCuめつき層4を設け
、さらにタブ部5及びインナージー1部6に5μのAg
めつき層3を設けて従来の半導体相リードフレームを形
成する(第3図参照)。
As a comparative example, the surface of the lead frame made of the steel alloy shown in Fig. 1 was pretreated by degreasing and pickling, and then treated with a Cu strike bath (composed of oxidized steel, sodium cyanide, and Rochelle salt) for 0.0%. A 2μ thick Cu plating layer 4 is provided, and a 5μ thick Ag layer is provided on the tab portion 5 and the inner girder 1 portion 6.
A plating layer 3 is provided to form a conventional semiconductor phase lead frame (see FIG. 3).

こうして形成されたリードフレームに対して、Siペレ
ットのろう接及びAu線のワイヤボンディングで受ける
加熱工程を模擬して大気、4400℃の加熱酸化を行な
った後、リードフレーム表面に形成される酸化膜の密着
性を、セロファンテープ等の粘着テープを臥化面に貼シ
付けて剥離した際に該酸化膜が粘宥テーゾ側に付着する
か否かを調べることによって評価した。その結果を第1
表に示す。表中、○印は酸化膜の付着しないもの、Δ印
は酸化膜が局部的に付着したもの、x印は酸化膜のほと
んど大部分が付着したものである。
The lead frame thus formed is subjected to thermal oxidation at 4400°C in the atmosphere, simulating the heating process that occurs in Si pellet soldering and Au wire wire bonding, and then an oxide film is formed on the lead frame surface. The adhesion was evaluated by applying an adhesive tape such as cellophane tape to the bedded surface and examining whether or not the oxide film adhered to the adhesive tape side when it was peeled off. The result is the first
Shown in the table. In the table, the ◯ mark indicates that no oxide film was attached, the Δ mark indicates that the oxide film was locally attached, and the x mark indicates that most of the oxide film was attached.

第1表 実施例 2 実施例1と同様の方法で銅合金から成るリードフレーム
の表面にCu−8μ合金の組成の異なるめっき膜を設け
た後、Agめっきを部分的に設けた半導体用リードフレ
ームを形成する。
Table 1 Example 2 Semiconductor lead frame in which a plating film of Cu-8μ alloy with a different composition was provided on the surface of a lead frame made of copper alloy in the same manner as in Example 1, and then Ag plating was partially provided. form.

こうして作成されたり−Pフレームについて実施例1と
同様の方法で酸化膜の密着性を調べた。
The adhesion of the oxide film of the -P frame thus prepared was examined in the same manner as in Example 1.

その結果を第2表に示す。表中、○、△、x印は上記し
たとお)でおる。
The results are shown in Table 2. In the table, ○, △, and x marks are as described above.

以上述べた如く、本発明による半導体用リ−rフレーム
′は、従来のCuストライクめっきのものと比較して、
大気中加熱等によシその表面に形成される酸化膜の密着
性が良好であり、シたがってプラスチック樹脂で半導体
を封止した場合、樹脂とリードフレームの封止性が完全
なものとなり、その結果半導体装置の耐温性が向上1−
1製品の信頼度が高くなる。
As mentioned above, the semiconductor RI-R frame according to the present invention has the following advantages compared to the conventional Cu strike plating one:
The oxide film formed on the surface by heating in the atmosphere has good adhesion, so when a semiconductor is sealed with plastic resin, the sealing between the resin and the lead frame is perfect. As a result, the temperature resistance of semiconductor devices is improved1-
1 The reliability of the product increases.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図tよ本発明による半導体用リードフレームの一実
施例を示す平面図、第2図は第1図中A−A線に沿う断
面図、第3図は従来の半導体用リートゝフレームの一例
を示す断面図である。 l・・・・・銅又は銅合金リードフレーム2 ・・・C
u−3n合金めっき膜 3・・・・・Agめっき層 4・・・・・・Cuめつき層 5・・・・・タブ部 6・・・インナーリード都 7・・・・・アウターリード部 犀 1図
Fig. 1 is a plan view showing an embodiment of a semiconductor lead frame according to the present invention, Fig. 2 is a sectional view taken along line A-A in Fig. 1, and Fig. 3 is a plan view of a conventional semiconductor lead frame. It is a sectional view showing an example. l...Copper or copper alloy lead frame 2...C
U-3N alloy plating film 3...Ag plating layer 4...Cu plating layer 5...Tab portion 6...Inner lead capital 7...Outer lead portion Rhinoceros 1

Claims (1)

【特許請求の範囲】[Claims] 銅又は銅合金から成る半導体用リードフレーム材の表面
に、10〜50重量%の錫を含む銅−錫系合金めっき層
を設け、さらに該リードフレーム材の少なくとも半導体
Rレットを取り伺ける部分に銀めっき層を設けたことを
特徴とする半導体用リードフレーム。
A copper-tin alloy plating layer containing 10 to 50% by weight of tin is provided on the surface of a semiconductor lead frame material made of copper or a copper alloy, and further on a portion of the lead frame material where at least the semiconductor R-let can be accessed. A semiconductor lead frame characterized by having a silver plating layer.
JP13165883A 1983-07-19 1983-07-19 Semiconductor lead frame Pending JPS6024045A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13165883A JPS6024045A (en) 1983-07-19 1983-07-19 Semiconductor lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13165883A JPS6024045A (en) 1983-07-19 1983-07-19 Semiconductor lead frame

Publications (1)

Publication Number Publication Date
JPS6024045A true JPS6024045A (en) 1985-02-06

Family

ID=15063195

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13165883A Pending JPS6024045A (en) 1983-07-19 1983-07-19 Semiconductor lead frame

Country Status (1)

Country Link
JP (1) JPS6024045A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100266726B1 (en) * 1995-09-29 2000-09-15 기타지마 요시토시 Lead frame, method for partially plating lead frame with noble meta and semiconductor device formed by using the lead frame
DE10124141A1 (en) * 2000-09-29 2002-04-11 Infineon Technologies Ag connecting device
US11011476B2 (en) 2018-03-12 2021-05-18 Stmicroelectronics International N.V. Lead frame surface finishing
US11735512B2 (en) 2018-12-31 2023-08-22 Stmicroelectronics International N.V. Leadframe with a metal oxide coating and method of forming the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100266726B1 (en) * 1995-09-29 2000-09-15 기타지마 요시토시 Lead frame, method for partially plating lead frame with noble meta and semiconductor device formed by using the lead frame
DE10124141A1 (en) * 2000-09-29 2002-04-11 Infineon Technologies Ag connecting device
DE10124141B4 (en) * 2000-09-29 2009-11-26 Infineon Technologies Ag Connecting device for an electronic circuit arrangement and circuit arrangement
US11011476B2 (en) 2018-03-12 2021-05-18 Stmicroelectronics International N.V. Lead frame surface finishing
US11756899B2 (en) 2018-03-12 2023-09-12 Stmicroelectronics S.R.L. Lead frame surface finishing
US11735512B2 (en) 2018-12-31 2023-08-22 Stmicroelectronics International N.V. Leadframe with a metal oxide coating and method of forming the same

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