JPS60213067A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS60213067A JPS60213067A JP59069343A JP6934384A JPS60213067A JP S60213067 A JPS60213067 A JP S60213067A JP 59069343 A JP59069343 A JP 59069343A JP 6934384 A JP6934384 A JP 6934384A JP S60213067 A JPS60213067 A JP S60213067A
- Authority
- JP
- Japan
- Prior art keywords
- inp
- type
- diffusion
- layer
- carrier concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 239000004065 semiconductor Substances 0.000 title claims description 4
- 238000009792 diffusion process Methods 0.000 claims abstract description 22
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims abstract description 11
- 238000005530 etching Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 5
- 150000001875 compounds Chemical class 0.000 claims 1
- 239000000758 substrate Substances 0.000 abstract description 7
- 239000012535 impurity Substances 0.000 abstract description 4
- 238000007493 shaping process Methods 0.000 abstract 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
- H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
- H01L31/105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PIN type
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、半導体装置とくに光通信部品などに適シたp
inフォトダイオードの製造方法に関するものである。[Detailed Description of the Invention] Industrial Application Field The present invention is suitable for use in semiconductor devices, especially optical communication components.
The present invention relates to a method for manufacturing an in-photodiode.
従来例の構成とその問題点
従来のInP系pinフォトダイオードの製造方法は、
まず第1図に示すようにn型InP基板1上に、低キャ
リア濃度InP層2、低キヤリア濃度InGaAg 3
をエピタキシャル成長し、マスク4で受光部5を覆い他
を選択的にメサエッチングを行う。次にマスクを除去し
、第2図に示すように、受光部6とInGaAsエツチ
ング側面6及び暗電流低減のためにバンドギャップが大
きいInP周辺部7にもp型拡散を行い、表面のpn接
合をInP上に形成した。しかしこの製造方法で1jI
nPとInGaAs中でのp型不純物の拡散速度が大き
く異なるため、拡散深さの制御が難しいという欠点があ
った。Conventional structure and its problems The conventional manufacturing method of InP-based pin photodiode is as follows:
First, as shown in FIG. 1, a low carrier concentration InP layer 2 and a low carrier concentration InGaAg layer 3 are formed on an n-type InP substrate 1.
is epitaxially grown, the light-receiving part 5 is covered with a mask 4, and the other parts are selectively mesa-etched. Next, the mask is removed and, as shown in FIG. was formed on InP. However, with this manufacturing method, 1jI
Since the diffusion speeds of p-type impurities in nP and InGaAs are greatly different, there is a drawback that it is difficult to control the diffusion depth.
発明の目的
本発明は、InP系pinフォトダイオードの製造方法
で、p型拡散の制御を容易にすることを目的としている
。OBJECTS OF THE INVENTION The present invention is a method for manufacturing an InP-based pin photodiode, and an object of the present invention is to facilitate control of p-type diffusion.
発明の構成
本発明は、InP基板上に、低キャリア濃度InP層、
低キヤリア濃度I nGaAs 、p型InGaAsの
多層エピタキシャル膜を形成し、受光部を残し選択的に
メサエッチングを行なった後に、低キヤリア濃度I n
GaAsメサエッチング側面及びその周辺のInPJi
iKp型拡散を、拡散速度の大きいInP中での拡散条
件で施し、その制御を容易にする事を可能にしている。Structure of the Invention The present invention provides a low carrier concentration InP layer on an InP substrate,
A multilayer epitaxial film of low carrier concentration I nGaAs and p-type InGaAs is formed, and after selective mesa etching is performed leaving the light receiving area, the low carrier concentration I nGaAs is formed.
InPJi on the side of GaAs mesa etching and its surroundings
The iKp type diffusion is performed under conditions of diffusion in InP, which has a high diffusion rate, making it possible to easily control it.
実施例の説明
本発明を図にもとづいて説明する。まず第3図に示すよ
うに、n型InP基板1上に低キャリア濃度InP層2
、低キヤリア濃度InGaAs層3、p型InGaAs
層8の多層エピタキシャル膜を形成する。DESCRIPTION OF EMBODIMENTS The present invention will be explained based on the drawings. First, as shown in FIG. 3, a low carrier concentration InP layer 2 is formed on an n-type InP substrate 1.
, low carrier concentration InGaAs layer 3, p-type InGaAs
A multilayer epitaxial film of layer 8 is formed.
次に第4図の様に、受光部6をマスク4で覆い他を選択
的にメサエッチングする。さらに第6図に示すように、
InP表面にpn接合を形成するだめのマスク9を形成
しp型拡散を行う。p型不純物、例えばZnはSOO℃
の拡散条件で、Inp中ではInGaAs中の2〜3倍
程度拡散速度が大きいので、InP表面でのpn接合の
拡散深さの制御の条件はInP中の拡散条件を用いる。Next, as shown in FIG. 4, the light receiving part 6 is covered with a mask 4, and the other parts are selectively mesa-etched. Furthermore, as shown in Figure 6,
A mask 9 for forming a pn junction is formed on the InP surface, and p-type diffusion is performed. P-type impurities, such as Zn, are SOO℃
Under the diffusion conditions, the diffusion rate in InP is about 2 to 3 times higher than in InGaAs, so the diffusion conditions in InP are used as the conditions for controlling the diffusion depth of the pn junction on the InP surface.
その後マスク4,9を除去し、電極10を形成すると、
第6図に示すようなpinフォトダイオードが得られる
。After that, the masks 4 and 9 are removed and the electrode 10 is formed.
A pin photodiode as shown in FIG. 6 is obtained.
なお、InGaAg層3の代わりにInGaAsP層を
用いてもよいし、基板1としては半絶縁性基板上にn型
InP層を形成したものでもよい。Note that an InGaAsP layer may be used instead of the InGaAg layer 3, and the substrate 1 may be a semi-insulating substrate with an n-type InP layer formed thereon.
発明の効果
以上のように本発明は、InP系pinフォトダイオー
ドの受光部のp型拡散をp型層のエピタキシャル成長で
置き換え、InP層への拡散条件でpn接合を受光部と
同−表面内InP上に形成したものであり、従って受光
部への拡散深さの条件に依らずInP中への拡散深さの
制御のみを考慮すればよく、拡散の制御が容易になるも
のである。また、暗電流は、InP上のpn接合が表面
に露出しているので、InGaAs上のpn接合が露出
している場合より小さくなるものである。Effects of the Invention As described above, the present invention replaces p-type diffusion in the light-receiving part of an InP-based pin photodiode with epitaxial growth of a p-type layer, and forms a p-n junction under the same conditions as the light-receiving part by epitaxial growth of a p-type layer. Therefore, it is only necessary to consider the control of the diffusion depth into InP, regardless of the conditions of the diffusion depth to the light-receiving part, and the diffusion control becomes easy. Furthermore, since the pn junction on InP is exposed on the surface, the dark current is smaller than when the pn junction on InGaAs is exposed.
第1図、第2図は、従来のpinフォトダイオードの製
造方法を示した工程断面図、第3図〜第6図は本発明の
一実施例の製造方法を示した工程断面図である。
1・・・・・・n型InP基板、2・・・・・・低キャ
リア濃度InP層、3・・・・・・低キヤリア濃度In
GaAs層、4・・・・・・マスク、6・・・・・・I
nGaAsエツチング側面、7・・・・・・InP上周
辺部、8・・・・・・p型I nにaAs O代理人の
氏名 弁理士 中 尾 敏 男 ほか1名第1図
第2図
、ダ1 and 2 are process cross-sectional views showing a conventional method for manufacturing a pin photodiode, and FIGS. 3 to 6 are process cross-sectional views showing a manufacturing method according to an embodiment of the present invention. 1...N-type InP substrate, 2...Low carrier concentration InP layer, 3...Low carrier concentration In
GaAs layer, 4...Mask, 6...I
Side surface of nGaAs etching, 7... InP upper peripheral area, 8... aAs on p-type In Name of agent: Patent attorney Toshio Nakao and one other person Figure 1 Figure 2, da
Claims (1)
1層、低キヤリア濃度InGaAs又はInGaAsP
よりなる第2層、p型InGaAsよりなる第3層のメ
サエッチングする工程と、前記メサエッチングにより残
った前記第2層のエツチング側面及びその周辺の前記第
1層にp型拡散を行う工程とを有し、InP系■−■族
化合物半導体によるpinフォトダイオードを形成する
ことを特徴とする半導体装置の製造方法。On n-type or semi-insulating InP, low carrier concentration InP first layer, low carrier concentration InGaAs or InGaAsP
a step of mesa-etching a second layer made of p-type InGaAs and a third layer made of p-type InGaAs; and a step of performing p-type diffusion into the etched side surface of the second layer remaining after the mesa etching and the first layer around it. 1. A method for manufacturing a semiconductor device, comprising forming a pin photodiode using an InP-based ■-■ group compound semiconductor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59069343A JPS60213067A (en) | 1984-04-06 | 1984-04-06 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59069343A JPS60213067A (en) | 1984-04-06 | 1984-04-06 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60213067A true JPS60213067A (en) | 1985-10-25 |
Family
ID=13399803
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59069343A Pending JPS60213067A (en) | 1984-04-06 | 1984-04-06 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60213067A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5316956A (en) * | 1992-02-07 | 1994-05-31 | Sumitomo Electric Industries, Ltd. | Method for manufacturing semiconductor light-receiving elements |
WO2010041756A1 (en) * | 2008-10-10 | 2010-04-15 | 独立行政法人産業技術総合研究所 | Light-sensing element |
-
1984
- 1984-04-06 JP JP59069343A patent/JPS60213067A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5316956A (en) * | 1992-02-07 | 1994-05-31 | Sumitomo Electric Industries, Ltd. | Method for manufacturing semiconductor light-receiving elements |
WO2010041756A1 (en) * | 2008-10-10 | 2010-04-15 | 独立行政法人産業技術総合研究所 | Light-sensing element |
US8530933B2 (en) | 2008-10-10 | 2013-09-10 | National Institute Of Advanced Industrial Science And Technology | Photo transistor |
JP5386764B2 (en) * | 2008-10-10 | 2014-01-15 | 独立行政法人産業技術総合研究所 | Photodetector |
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