JPS6020918B2 - Method of forming thick film conductor pattern - Google Patents

Method of forming thick film conductor pattern

Info

Publication number
JPS6020918B2
JPS6020918B2 JP10207577A JP10207577A JPS6020918B2 JP S6020918 B2 JPS6020918 B2 JP S6020918B2 JP 10207577 A JP10207577 A JP 10207577A JP 10207577 A JP10207577 A JP 10207577A JP S6020918 B2 JPS6020918 B2 JP S6020918B2
Authority
JP
Japan
Prior art keywords
pattern
conductor
thick film
film conductor
conductor pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP10207577A
Other languages
Japanese (ja)
Other versions
JPS5435359A (en
Inventor
仁 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP10207577A priority Critical patent/JPS6020918B2/en
Publication of JPS5435359A publication Critical patent/JPS5435359A/en
Publication of JPS6020918B2 publication Critical patent/JPS6020918B2/en
Expired legal-status Critical Current

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  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】 本発明は混成集積回路基板における厚膜導体のパターン
形成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of patterning thick film conductors in a hybrid integrated circuit board.

従来、厚膜導体のパターン形成法としては、所望のパタ
ーンを転写したスクリーンを利用し、印刷、焼成する方
法及び基板の全面に厚膜導体を印刷焼成し、ホトェツチ
ングによりパターン化を行う方法が探られてきた。
Conventionally, methods for forming thick film conductor patterns include a method of printing and firing using a screen onto which a desired pattern has been transferred, and a method of printing and firing a thick film conductor on the entire surface of a substrate and patterning it by photoetching. I've been exposed to it.

しかるに、前記形成方法に於て、前者は、微細パターン
の形成が難しく、実用上の最小パターン幅としては、1
00仏m程度である。
However, in the former method, it is difficult to form a fine pattern, and the practical minimum pattern width is 1.
It is about 00 French meters.

一方、後者は、微細パターンの形成は可能であるが、導
体を基板全面に印刷焼成した後、不用部分の導体を除去
するために、材料の無駄が多い。
On the other hand, in the latter method, although it is possible to form fine patterns, a lot of material is wasted because conductors are printed and fired on the entire surface of the substrate and then unnecessary portions of the conductors are removed.

さらに、多層配線基板等に於て、下層導体パターンが、
絶縁層より露出して形成されている場合には、上層導体
をホトェツチングするとき、下層導体もエッチングされ
るので、そのようなパターンを形成することは不可能で
あった。本発明においては、上記の欠点を除去するため
に、スクリーン印刷で所望のパターンを含む領域に厚膜
導体を形成し、しかる後、スクリーン印刷ではパターン
形成が不可能な微細パターン領域のみホトェツチングに
よりパターン形成するものである。
Furthermore, in multilayer wiring boards, etc., the lower layer conductor pattern is
If the conductor is exposed from the insulating layer, the lower conductor is also etched when the upper conductor is photoetched, making it impossible to form such a pattern. In the present invention, in order to eliminate the above-mentioned drawbacks, a thick film conductor is formed by screen printing in an area containing a desired pattern, and then only a fine pattern area where it is impossible to form a pattern by screen printing is patterned by photoetching. It is something that forms.

従って導体材料の無駄を少なくし、且つスクリーン印刷
では不可能な微細パターンの形成を可能にする厚膿導体
パターンの形成方法を提供するものである。以下実施例
に基づき、図面を参照して、本発明を詳細に説明する。
Therefore, it is an object of the present invention to provide a method for forming a thick conductor pattern that reduces waste of conductor material and enables the formation of fine patterns that are impossible with screen printing. The present invention will be described in detail below based on Examples and with reference to the drawings.

第1図イ〜ハは本発明の一実施例を示す平面図であり第
1図イ′〜ハ′は前記各平面図におけるA一A′線に沿
った断面図である。
FIGS. 1A to 1C are plan views showing one embodiment of the present invention, and FIGS. 1A to 1C are sectional views taken along line A-A' in each of the plan views.

所望のパターンを転写したスクリーンを使用し、絶縁基
板1上に厚膜導体2,2′を印刷焼成する(第1図イ、
イ′)。
Using a screen onto which a desired pattern has been transferred, thick film conductors 2 and 2' are printed and fired on an insulating substrate 1 (see Fig. 1A,
stomach').

スクリーン印刷でパターン形成が可能なパターン2は所
望の形状で、又スクリーン印刷ではパターン形成が不可
能な微細パターンは、スクリーン印刷可能な大きさで、
所望の微細パターンを含む領域に厚膜導体2′を印刷焼
成する。次に、微細パターンの形成を目的としてホトレ
ジスト3,3′を該基板上に形成する(第1図ロ、口′
)。
The pattern 2 that can be formed by screen printing has a desired shape, and the fine pattern that cannot be formed by screen printing has a size that can be printed by screen.
A thick film conductor 2' is printed and fired in a region containing a desired fine pattern. Next, photoresists 3 and 3' are formed on the substrate for the purpose of forming a fine pattern (see FIG.
).

ホトレジスト3′は、スクリーン印刷のみでパタ−ン形
成が不可能な微細パターンの形成を行うためである。ま
た、スクリーン印刷のみでパターン形成が完了している
導体パターン2に関しては、エッチング液から保護する
ためにやはりホトレジスト3を形成する。次に、前記ホ
トレジストパターンより露出した領域の厚膿導体をエッ
チングすると厚膿導体2′の部分の微細パターン2″と
なる。
The photoresist 3' is used to form a fine pattern that cannot be formed by screen printing alone. Further, regarding the conductor pattern 2 whose pattern formation has been completed only by screen printing, a photoresist 3 is also formed to protect it from the etching solution. Next, the thick conductor in the area exposed from the photoresist pattern is etched to form a fine pattern 2'' in the thick conductor 2' portion.

しかる後前記ホトレジスト3,3′を除去すれば、所望
の導体パターンを有する回路基板が得られる(第1図ハ
、ハ′)。またト第2図イ〜ホは多層配線基板の上層導
体パターン形成に、本発明を適用した場合の一実施例の
各工程を示す平面図であり、第2図イ′〜ホ′は各平面
図のB−B′線に沿った断面図を示す。
Thereafter, by removing the photoresists 3 and 3', a circuit board having a desired conductor pattern is obtained (FIG. 1C and C'). In addition, FIG. 2 A to H are plan views showing each step of an embodiment in which the present invention is applied to the formation of an upper layer conductor pattern of a multilayer wiring board, and FIG. A sectional view taken along line BB' in the figure is shown.

まず絶縁基板1上に下層導体2を形成し、しかる後絶縁
層4を形成する(第2図イ、イ′)。
First, a lower conductor 2 is formed on an insulating substrate 1, and then an insulating layer 4 is formed (FIG. 2A and 2B').

次に、上層導体5をスクリーン印刷により、所望のパタ
ーンを含む領域に形成する(第2図口、。′)。次に、
上層導体の微細パターン形成を目的として、ホトレジス
トパターン6を形成する(第2図ハ、ハ′)。
Next, the upper layer conductor 5 is formed by screen printing in a region including a desired pattern (Figure 2, opening .'). next,
A photoresist pattern 6 is formed for the purpose of forming a fine pattern of the upper layer conductor (FIG. 2, c and c').

この時、スクリーン印刷のみで、パターン形成が完了し
ている上層導体パターン及び、絶縁層より露出している
下層導体パターンを含む領域にもホトレジスト5を形成
し、導体エッチング液に対して保護する。次に厚膜導体
エッチング液によりホトレジストより露出した厚膜導体
をエッチング除去した後、ホトレジストをハクリすれば
所望の導体パターンを有する二層配線基板が得られる(
第2図二、ニ′)。
At this time, a photoresist 5 is also formed by screen printing only in areas including the upper layer conductor pattern whose pattern formation has been completed and the lower layer conductor pattern exposed from the insulating layer to protect it from the conductor etching solution. Next, after etching away the thick film conductor exposed from the photoresist using a thick film conductor etchant, the photoresist is peeled off to obtain a two-layer wiring board with the desired conductor pattern (
Figure 2 2, d').

以上のごとく本発明によれば、厚膿導体材料の無駄をな
くし、且つ微細な導体パターンの形成を可能にするもの
である。
As described above, according to the present invention, it is possible to eliminate waste of thick conductor material and to form fine conductor patterns.

また多層配線構造においても、上層導体を下層導体に影
響与えること無く形成可能であるため、パターン設計の
自由度を増加させるものである。
Further, even in a multilayer wiring structure, since the upper layer conductor can be formed without affecting the lower layer conductor, the degree of freedom in pattern design is increased.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図イ〜ハは本発明により厚膜導体パターンを形成し
た場合の各工程を示す平面図、第1図イ′〜ハ′は前記
各平面図におけるA−A′線で切断した断面図、第2図
イ〜二は本発明により二層配線基板の上層導体パターン
を形成した場合の各工程を示す平面図、第2図イ′〜二
′は前記各平面図におけるB−B′で切断した断面図で
ある。 1……絶縁基板、2,2′,2″・・・・・・(第1層
目)導体配線、3,3′,6…・・・ホトレジスト、4
・・・・・・絶縁層、5・・・・・・第2層目導体配線
。 第1図第2図
1A to 1C are plan views showing each process when forming a thick film conductor pattern according to the present invention, and FIGS. 1A to 1C are cross-sectional views taken along line A-A' in each of the above plan views. , FIGS. 2 A to 2 are plan views showing each process when forming the upper layer conductor pattern of a two-layer wiring board according to the present invention, and FIGS. 2 A' to 2' are B-B' in each of the above plan views. It is a cut sectional view. 1... Insulating substrate, 2, 2', 2''... (first layer) conductor wiring, 3, 3', 6... Photoresist, 4
...Insulating layer, 5...Second layer conductor wiring. Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 1 絶縁基板上に、厚膜導体を選択的にスクリーン印刷
、焼成して第1のパターンを形成し、しかる後、前記厚
膜導体の一部分をホトエツチングして所望の第2のパタ
ーンを得ることを特徴とする厚膜導体パターンの形成方
法。
1 Forming a first pattern by selectively screen printing and baking a thick film conductor on an insulating substrate, and then photoetching a portion of the thick film conductor to obtain a desired second pattern. Characteristic method for forming thick film conductor patterns.
JP10207577A 1977-08-24 1977-08-24 Method of forming thick film conductor pattern Expired JPS6020918B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10207577A JPS6020918B2 (en) 1977-08-24 1977-08-24 Method of forming thick film conductor pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10207577A JPS6020918B2 (en) 1977-08-24 1977-08-24 Method of forming thick film conductor pattern

Publications (2)

Publication Number Publication Date
JPS5435359A JPS5435359A (en) 1979-03-15
JPS6020918B2 true JPS6020918B2 (en) 1985-05-24

Family

ID=14317640

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10207577A Expired JPS6020918B2 (en) 1977-08-24 1977-08-24 Method of forming thick film conductor pattern

Country Status (1)

Country Link
JP (1) JPS6020918B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0517292Y2 (en) * 1986-08-01 1993-05-10

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5938006U (en) * 1982-09-02 1984-03-10 株式会社名南製作所 Conveyance roll in continuous cutting machine for plywood veneer
KR101051590B1 (en) * 2009-08-24 2011-07-22 삼성전기주식회사 Ceramic substrate and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0517292Y2 (en) * 1986-08-01 1993-05-10

Also Published As

Publication number Publication date
JPS5435359A (en) 1979-03-15

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