JPS6020905B2 - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS6020905B2
JPS6020905B2 JP3968577A JP3968577A JPS6020905B2 JP S6020905 B2 JPS6020905 B2 JP S6020905B2 JP 3968577 A JP3968577 A JP 3968577A JP 3968577 A JP3968577 A JP 3968577A JP S6020905 B2 JPS6020905 B2 JP S6020905B2
Authority
JP
Japan
Prior art keywords
region
resistance
current
emitter
conductivity type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP3968577A
Other languages
Japanese (ja)
Other versions
JPS53124985A (en
Inventor
和好 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP3968577A priority Critical patent/JPS6020905B2/en
Publication of JPS53124985A publication Critical patent/JPS53124985A/en
Publication of JPS6020905B2 publication Critical patent/JPS6020905B2/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/7302Bipolar junction transistors structurally associated with other devices
    • H01L29/7304Bipolar junction transistors structurally associated with other devices the device being a resistive element, e.g. ballasting resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0804Emitter regions of bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)

Description

【発明の詳細な説明】 本発明は、パワートランジスタ等の半導体装置に関し、
特にその電流特性或はスイッチング特性を良好にすると
同時に安全動作領域(ASO)を大ならしめんとするも
のである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device such as a power transistor,
In particular, it is intended to improve the current characteristics or switching characteristics and at the same time to widen the safe operating area (ASO).

従来より例えばパワートランジスタでは、小さなべレッ
ト面積でその電流増中率hFEの電流特性を良好にする
と同時に安全動作領域を大きくすることは困難であった
Conventionally, for example, in a power transistor, it has been difficult to improve the current characteristics of the current increase rate hFE and at the same time enlarge the safe operation area with a small pellet area.

小さなべレット面積で電流特性を良くするにはェミッ夕
領域のパターンを微細化しなければならない。このパタ
ーンの微細化によって周囲長が長くなり、大電流領域で
ヱミツタ領域の直下部が働きにくくなってもェミッタ有
効面積の減少が少〈電流特性の伸びが大きくなる。第1
図はトランジスタのhF8の電流特性を示すもので、曲
線1はェミッタ領域が粗いパターンの場合、曲線瓜まヱ
ミッタ領域が微細パターンの場合である。一方、ェミッ
タ領域を微細パターンにする程、熱集中及び電流集中が
顕著に現われ、安全動作領域が極端に蟻性になる。この
原因は、第2図に示すようにコレクタ1、ベース2及び
ェミツタ3の各領域を有するトランジスタにおいて、そ
のェミッタ領域3のパターンを微細にする程ェミッタ電
極4及びベース電極5間の距離が短くなり、従ってェミ
ッターベース間の抵抗、所謂ベース抵抗RBが4・さく
なりバラスト抵抗の働きが4・さくなる為に最も流れ易
い一部に電流が集中するためであり、この電流集中によ
り熱が発生し、さらに熱の高い部分に電流が集中し、熱
暴走となって破壊する。換言すれば、安全動作領域はベ
ース抵抗RBが大きい程大きくなる。尚、仮にべレット
全面が働いたとしても熱はべレットの中央部に集中し易
く上記と同様の現象が生じる。さらにスイッチング用と
しても、微細パターンにする程スイッチング特性は良く
なるも、安全動作領域は逆に小さくなる。本発明は、上
述の点に鑑み微細パターン化してそのhFEの電流特性
、或はスイッチング特性を良好にすると同時に安全動作
領域を大ならしめ得る半導体装置を提供するものである
In order to improve current characteristics with a small pellet area, the pattern of the emitter region must be made finer. As the pattern becomes finer, the peripheral length becomes longer, and even if the part directly below the emitter region becomes difficult to work in a large current region, the effective area of the emitter decreases less (and the current characteristics increase more). 1st
The figure shows the current characteristics of the hF8 transistor. Curve 1 shows the case where the emitter region has a coarse pattern, and curve 1 shows the case where the emitter region has a fine pattern. On the other hand, as the emitter region is made into a finer pattern, heat concentration and current concentration become more prominent, and the safe operation region becomes extremely strict. The reason for this is that in a transistor having collector 1, base 2, and emitter 3 regions as shown in FIG. 2, the finer the pattern of the emitter region 3, the shorter the distance between the emitter electrode 4 and the base electrode 5. Therefore, the resistance between the emitter and the base, the so-called base resistance RB, decreases by 4. The function of the ballast resistance becomes 4. The current concentrates in the part where it flows most easily, and this current concentration causes heat to increase. The current then concentrates in the hotter parts, resulting in thermal runaway and destruction. In other words, the safe operating area becomes larger as the base resistance RB becomes larger. Incidentally, even if the entire surface of the pellet were to work, the heat would tend to concentrate in the center of the pellet, resulting in the same phenomenon as described above. Furthermore, even for switching purposes, the finer the pattern, the better the switching characteristics, but the safe operation area becomes smaller. In view of the above-mentioned points, the present invention provides a semiconductor device that can be finely patterned to improve the current characteristics or switching characteristics of its hFE and at the same time enlarge the safe operating area.

本発明は、基板主面に臨む第1導電形の第1領域と、基
板主面に臨み第1領域を囲む第2導電形の第2領域と、
第2領域に接する第1導電形の第3領域を有し、基板主
面に臨んで第1及び第2領域による環状の接合端が形成
されて成る半導体装置において、その接合端の傍に接合
端に沿って、電流又は熱の集中しやすい中心に向って幅
が大となるか又は深さが大となるような帯状の抵抗領域
を設け、電流又は熱の集中し易い部分の抵抗分を大きく
し、熱放散の良い部分の抵抗分を小さくして、動作時に
動作領域の全面が電流及び熱的に均一となるようにする
ものである。
The present invention includes a first region of a first conductivity type facing the main surface of the substrate, a second region of the second conductivity type facing the main surface of the substrate and surrounding the first region,
In a semiconductor device having a third region of the first conductivity type in contact with the second region, and in which an annular bonding end formed by the first and second regions facing the main surface of the substrate is formed, a bonding is provided near the bonding end. A band-shaped resistance area is provided along the edge, the width or depth of which increases toward the center where current or heat tends to concentrate, and the resistance of the area where current or heat tends to concentrate is reduced. By increasing the size and reducing the resistance of portions with good heat dissipation, the entire operating area is made uniform in terms of current and heat during operation.

以下、図面を参照して本発明の実施例をパワートランジ
スタに適用した場合につき説明しよう。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a case where an embodiment of the present invention is applied to a power transistor will be described with reference to the drawings.

本発明においては、例えば第3図及び第4図に示す如く
コレクタとなる第1導電形例えばN形の半導体基体】翼
を設けトこの基体11の一主面に列えば拡散による第2
導電形則ちP形のベース領域12を形成し「 さらにベ
ース領域12内に例えば拡散による第1導電形貝0ちN
形のェミッタ領域13を形成する。このェミッタ領域1
3は微細パターンに形成し、ェミッタ領域13及びベー
ス領域12間で形成されるェミッタ接合jeの基体主面
に臨む環状の接合端je,の周囲長を長く形成する。そ
して例えば〜 このェミツタ領域亀3と同時の拡散工程
によってベース領域12内で接合端je,に近い位鷹に
ベース抵抗RBの増大に寄与する第1導電形の抵抗領域
14を形成する。この場合、抵抗領域14は熱の集中し
易し、ベレット中央部に行く程その領域の中dを大なら
しめ、べ−ス抵抗RBが中央部に行く程大となるよつに
、ベース抵抗RBに分布をもたせるように形成する。
In the present invention, as shown in FIGS. 3 and 4, for example, a semiconductor substrate of a first conductivity type, for example, an N type, which serves as a collector, is provided with wings.
A base region 12 of a conductivity type, that is, a P type, is formed, and a first conductivity type shell 0 or N is formed in the base region 12 by, for example, diffusion.
A shaped emitter region 13 is formed. This emitter region 1
3 is formed in a fine pattern, and the peripheral length of the annular junction end je facing the main surface of the base of the emitter junction je formed between the emitter region 13 and the base region 12 is made long. For example, a resistance region 14 of the first conductivity type, which contributes to an increase in the base resistance RB, is formed in the base region 12 at a position close to the junction end je, by a diffusion process simultaneously with the emitter region 3. In this case, heat tends to concentrate in the resistance region 14, and the closer to the center of the bullet, the larger the medium d of the region becomes. It is formed so that the RB has a distribution.

そして通常のように基板裏面の高濃度領域城15にコレ
クタ電極16Cを形成し、又基体表面のベース領域12
及びェミツタ領域13に夫々ベース電極16B及びェミ
ッタ電極16Eを形成する。17はSi02膜等より成
る絶縁保護膜である。
Then, as usual, a collector electrode 16C is formed in the high concentration region 15 on the back surface of the substrate, and a collector electrode 16C is formed on the base region 12 on the surface of the substrate.
A base electrode 16B and an emitter electrode 16E are formed in the emitter region 13, respectively. Reference numeral 17 denotes an insulating protective film made of Si02 film or the like.

かかる構成によれば、抵抗領域14によってベース及び
ェミッ夕闇の抵抗RBが増すと共に、抵抗領域14の中
dが放熱し易い周辺部より熱の集号し易い中心部に向つ
て漸次大となることによって抵抗RBも中心に向って漸
次大となる。
According to this configuration, the resistance RB of the base and emitter regions increases due to the resistance region 14, and the middle d of the resistance region 14 gradually becomes larger toward the center where heat is more easily collected than the periphery where heat is easily dissipated. Therefore, the resistance RB also gradually increases toward the center.

即ち、中心部では第5図に示すように抵抗領域14の中
がd,と大きいので大なる抵抗RB,を有し、周辺部で
は第6図に示すように抵抗領域14の中力幻2と小さい
ので小なる抵抗RB2を有し、所調べレットの熱分布に
沿って抵抗分布が形成される。従って、トランジスタの
初期の動作ではRB,>R82によって中心部は働かず
、或は働きにくく、王として周辺部が働く。しかし時間
が経ち、又は添流が大きくなると発熱が起り、この発熱
は周辺部より中心部が大きいために中央部の抵抗RB,
の低下の割合が周辺部の抵抗RB2のそれより大となる
ことから、略RB,とRB2が等しくなり、ベレツト全
面においてその抵抗RBが均一化する。このため滋流集
中が回避され安全動作領域が向上する。同時にェミルタ
領域13は微細パターンであるので、パワートランジス
タの電流特性も向上する。従って小さなべレット面積で
電流特性と安全動作領域を共に向上したパワートランジ
スタが得られる。なお、第3図の場合には抵抗領域14
を局部的に設けた構成であが、例えば図示せざるもェミ
ッタ領域13の全周囲を取り囲むように抵抗領域14を
形成しt電流集中し易いところのみ抵抗領域14の中を
大とし抵抗RBを大きくするように構成することもでき
る。
That is, in the center, as shown in FIG. 5, the inside of the resistance region 14 is as large as d, so it has a large resistance RB, and in the periphery, as shown in FIG. Since it is small, it has a small resistance RB2, and a resistance distribution is formed along the heat distribution of the sample. Therefore, in the initial operation of the transistor, the center part does not work or works poorly due to RB,>R82, and the peripheral part works as the king. However, as time passes or the additional flow increases, heat generation occurs, and this heat generation is larger in the center than in the periphery, so the resistance RB in the center
Since the rate of decrease in resistance RB2 is greater than that of resistance RB2 in the peripheral area, RB and RB2 become approximately equal, and the resistance RB is made uniform over the entire surface of the beret. Therefore, concentration of water flow is avoided and the safe operating range is improved. At the same time, since the emitter region 13 is a fine pattern, the current characteristics of the power transistor are also improved. Therefore, a power transistor with improved current characteristics and safe operating area can be obtained with a small pellet area. In addition, in the case of FIG. 3, the resistance region 14
For example, the resistor region 14 is formed to surround the entire emitter region 13 (not shown), and the inside of the resistor region 14 is enlarged only in areas where current tends to concentrate, and the resistor RB is It can also be configured to be larger.

又、抵抗分布をもたせるべく領域14の中dを漸次異な
らすようにしたが、中dに代えて領域14の深さを異な
らすようにしてもよい。第7図は、本発明の他の実施例
を示す要部の平面図である。
Furthermore, although the middle d of the region 14 is made to vary gradually in order to provide a resistance distribution, the depth of the region 14 may be varied instead of the middle d. FIG. 7 is a plan view of essential parts showing another embodiment of the present invention.

これは、ェミッタ領域13との間で形成された接合端i
e,に近いベース領域内において、熱放散が悪く電流集
中し易い中心部にのみ抵抗領域14を形成し、周辺部の
熱放散が良く電流集中し‘こくい部分には抵抗領域14
を形成せざるようにした場合である。斯る構成とした場
合にも抵抗領域1…こよって中央部での抵抗RBが周辺
部より大きくなり、従って初期の動作では中央部が働き
にくいが、時間が経つにつれ、又は電流が大きくなるに
つれて発熱すれば周辺部と中央部での抵抗RBが略等し
くなり「電流集中が起り‘こくくなり、第3図と同様に
ェミッタ領域の微細パターン化にもかかわらず安全動作
領域を拡大することが出来る。尚〜抵抗領域14はベー
ス領域内に設ける他、第8図に示すようにェミッタ領域
13内に形成しても理論的に可能である。
This is the junction edge i formed with the emitter region 13.
In the base region near e, the resistance region 14 is formed only in the central part where heat dissipation is poor and current tends to concentrate, and the resistance region 14 is formed in the peripheral part where heat dissipation is good and current is concentrated in the thick part.
This is a case where the formation of Even in the case of such a configuration, the resistance region 1...Therefore, the resistance RB in the central part is larger than that in the peripheral part, and therefore the central part is difficult to operate in the initial operation, but as time passes or the current increases, When heat is generated, the resistance RB at the periphery and the center becomes almost equal, causing current concentration to occur, and as shown in Figure 3, it is not possible to expand the safe operating area despite the fine patterning of the emitter region. In addition to providing the resistance region 14 in the base region, it is also theoretically possible to form it in the emitter region 13 as shown in FIG.

又、抵抗領域としては拡散領域の他に、例えば第9図に
示すように溝18をもって抵抗領域14を構成しても良
く、或はこの構内にSi02等の絶縁層を埋込むように
して構成することもできる。一方、スイッチング用トラ
ンジスタにおいては、キャリアが蓄積し易いところはヱ
ミッタ領域直下か、又はベース電極のボンディングパッ
ドより最も遠い所であり、従ってこの場合も、ェミッタ
領域を微細パターン化すればスイッチング特性の向上が
図れると同時に、上記の抵抗領域14を設けることによ
り安全動作領域の拡大を図ることができる。
Furthermore, in addition to the diffusion region, the resistance region 14 may be configured with a groove 18 as shown in FIG. 9, or an insulating layer such as Si02 may be embedded in this area. You can also do it. On the other hand, in switching transistors, carriers tend to accumulate directly under the emitter region or at the farthest point from the bonding pad of the base electrode. Therefore, even in this case, fine patterning of the emitter region can improve switching characteristics. At the same time, by providing the above-mentioned resistance region 14, the safe operation region can be expanded.

上述せる如く、本発明にむれば、微細パターンによる電
流特性、スイッチング特性の向上と共に、同時に安全動
作領域の向上を図ることが出来るもので、例えばパワー
トランジスタ等に適用した場合には、その小型化が図れ
る。
As mentioned above, according to the present invention, it is possible to improve the current characteristics and switching characteristics by using fine patterns, and at the same time improve the safe operating area. For example, when applied to power transistors, etc., it is possible to reduce the size of the transistors. can be achieved.

なお、本発明はパワートランジススタに限らずサィリス
タ等のスイッチング素子にも適用できる。
Note that the present invention is applicable not only to power transistors but also to switching elements such as thyristors.

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は本発明の説明に供するhF8の電流
特性図及びトランジスタの要部の断面図、第3図及び第
4図は本発明の一実施例を示す平面図及びそのA−A線
上の断面図、第5図及び第6図は布々本発明の動作の説
明に供する断面図、第7図は本発明の他の実施例を示す
要部の平面図、第8図及び第9図は夫々本発明の更に他
の実施例を示す断面図である。 11はコレクタ領域、12はベース領域、13はェミッ
タ領域、14は抵抗領域である。 第1図 第2図 第3図 第5図 第6図 第4図 第7図 第8図 第9図
1 and 2 are a current characteristic diagram of hF8 and a cross-sectional view of the main parts of the transistor, which are used to explain the present invention, and FIGS. 3 and 4 are a plan view and its A- 5 and 6 are cross-sectional views taken along line A, and FIGS. 5 and 6 are cross-sectional views for explaining the operation of the present invention. FIG. FIG. 9 is a sectional view showing still another embodiment of the present invention. 11 is a collector region, 12 is a base region, 13 is an emitter region, and 14 is a resistance region. Figure 1 Figure 2 Figure 3 Figure 5 Figure 6 Figure 4 Figure 7 Figure 8 Figure 9

Claims (1)

【特許請求の範囲】[Claims] 1 基板主面に臨む第1導電形の第1領域と、上記基板
主面に臨む上記第1領域を囲む第2導電形の第2領域と
、該第2領域に接する第1導電形の第3領域と、上記第
1及び第2領域間の上記基板主面にある環状の接合端と
、該接合端の傍に接合端に沿つて帯状に設けられ、且つ
電流又は熱の集中しやすい中心に向つて幅が大となるか
又は深さが大となるように形成された抵抗領域を有して
成る半導体装置。
1 A first region of a first conductivity type facing the main surface of the substrate, a second region of the second conductivity type surrounding the first region facing the main surface of the substrate, and a first region of the first conductivity type in contact with the second region. a ring-shaped bonding end on the main surface of the substrate between the first and second regions, and a center provided in a band shape along the bonding edge near the bonding edge and where current or heat tends to concentrate. 1. A semiconductor device comprising a resistance region formed such that its width or depth increases as it approaches.
JP3968577A 1977-04-07 1977-04-07 semiconductor equipment Expired JPS6020905B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3968577A JPS6020905B2 (en) 1977-04-07 1977-04-07 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3968577A JPS6020905B2 (en) 1977-04-07 1977-04-07 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS53124985A JPS53124985A (en) 1978-10-31
JPS6020905B2 true JPS6020905B2 (en) 1985-05-24

Family

ID=12559917

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3968577A Expired JPS6020905B2 (en) 1977-04-07 1977-04-07 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6020905B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5496161U (en) * 1977-12-19 1979-07-07
JPS56146271A (en) * 1980-04-16 1981-11-13 Nec Corp Semiconductor device
DE3788500T2 (en) * 1986-10-31 1994-04-28 Nippon Denso Co Bipolar semiconductor transistor.
JP2010219454A (en) * 2009-03-19 2010-09-30 Sanken Electric Co Ltd Semiconductor device and method for manufacturing the same

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JPS53124985A (en) 1978-10-31

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