JPS60201644A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enhance the electric characteristic, and to enable to supply stably a high integrated memory of 1mum order level by a method wherein a first CVD silicon oxide film, a first silicon nitride film and a polycrystalline silicon film are patterned, and a second CVD silicon oxide film and a second silicon nitride film are anisotropically etched to form side walls. CONSTITUTION:A silicon substrate 14 formed with a P-well or an N-well is thermally oxidized, and after a polycrystalline silicon film 16, a first silicon nitride film 17 and a first CVD silicon oxide film 18 are grown on a first oxide film 15, the laminated films are driven to be etched. After thermal oxidation is performed, a second silicon nitride film 19 and a second CVD silicon oxide film 20 are grown, and the second CVD silicon oxide film 20 and the second silicon nitride film 19 are etched back to form side walls. After the first, the second CVD silicon oxide films 18, 20 are etched wholly, field silicon oxide films 21 are grown, the first and the second silicon nitride films 17, 19 are etched according to hot phosphoric acid, and the polycrystalline silicon film 16 is etched according to an aqueous solution mainly consisting of nitric acid-hydrofluoric acid.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method of manufacturing a semiconductor device, and particularly to an element isolation technique for electrically insulating each element on a semiconductor substrate from each other.

[Prior art]

Conventionally, as an element isolation method in manufacturing a semiconductor device having, for example, an MO8 type transistor structure, a LOCO8 method using selective oxidation using a silicon nitride film as a mask has been used. However, in this isolation structure, a so-called bird's beak is formed under the silicon nitride film 2 serving as an oxidation mask as shown in FIG. 1, which digs in as the silicon oxide film 3 of the field grows.
To form a device region of 0 to 1.5 μm, a mask pattern of approximately 50 μm is required. Pattern design like this,
Large dimensional margins must be taken during manufacturing,
This made fine integration or channel control of short channel MOS devices difficult, making it impossible to stably supply MO8 integrated circuits with a 1.0 to 1.5 micron rule.

On the other hand, recently, sidewalls (Si(lewall)
) to hold down the bird's beak (5i6
e Wall MaeKed engineering)
Technology or STOM x (5tackedOx
For example, the device isolation process is shown in FIGS. 2-a to 2-0. A first silicon oxide film 5, a first silicon nitride film 6, and a first OVD silicon oxide film 7 are successively grown on the silicon substrate 4, and then selectively etched with a dry etcher to remove the silicon substrate in the field area. 4 is exposed, the silicon substrate 4 is etched with a KOH solution or a dry etcher to form a groove, and then impurity ions are implanted into the channel stopper region 8 using the laminated film as a mask, and then a second silicon oxide layer is etched. wA91 second silicon nitride film 1
0 and the second OVD silicon oxide film 11 are sequentially grown (
FIG. 2-a) Next, when etched back with a dry etcher, the OVD silicon oxide film 11 and silicon nitride film 10 are etched back.
The sidewalls of the following items are formed (FIG. 2-b), and the next step is 1. Second (
7) After removing the OVD silicon and oxide film 7.11 by etching with hydrofluoric acid, a field silicon oxide film 12 is formed (FIG. 2--). However, these techniques also have low
Although the Pebber's beak is reduced compared to the AOS method, when etching a silicon substrate, wet etching with a KOH solution causes alkali ion contamination and side etching, resulting in large pattern conversion differences and poor relimitation, while dry etching There are many defects such as surface roughness and residue, and when used as a device, the bonding characteristics, gate breakdown voltage, etc. are extremely poor, and the uniformity of the etching amount within the wafer is also poor. In addition, since the stopper ion implantation is performed after silicon etching, the stopper region overlaps with the source/drain region after forming the MO8') run sister, which lowers the drain breakdown voltage and reduces the effective channel width instead of the field film. The current amplification rate cannot be increased because it is fixed between the stoppers.

As described above, there are many process and characteristic problems that make it impossible to put it into practical use or mass production.

〔the purpose〕

The present invention is intended to solve these problems, and its purpose is to suppress the growth of bird's beaks and stably supply micro-highly integrated semiconductor devices having element isolation structures with excellent electrical characteristics. .

〔overview〕

The method for manufacturing a semiconductor device of the present invention includes forming at least a first silicon oxide film, a polycrystalline silicon film, and a first silicon oxide film on a semiconductor substrate.
After a step of growing a silicon nitride film or an OVD silicon oxide film, and a step of buttering the first OVD siliman oxide film, first silicon nitride film, and polycrystalline silicon film, a second After a step of growing a silicon nitride film and a second OVD silicon oxide film, and a step of anisotropically etching the second OVD silicon oxide film and second silicon nitride film with a dry etcher to form sidewalls. It is characterized by forming a field silicon oxide film.

Furthermore, the method for manufacturing a semiconductor device of the present invention is characterized in that a channel stopper region is formed using a sidewall made of a silicon oxide or silicon nitride film as part of an ion implantation mask.

〔Example〕

The following is a detailed explanation of the present invention based on examples.
Figures -a to -d show the element isolation process of a semiconductor device according to the present invention. The silicon substrate 14 on which the P-well or N-well is formed is thermally oxidized to #! Polycrystalline silicon 16 of about zooooX, silicon nitride film 17 of about 1400X @1, and first OVD silicon oxide film 1 of about 3000X are formed on the silicon oxide film 1δ of No. 1 using a low-pressure OVD apparatus.
After growing No. 8, the laminated film was dry etched using a photoresist pattern. The etching gas used was OHF B + Ot Irs * for oxide films and nitride films, and o, aty, +sy, and +oot as main components for polycrystalline silicon. After thermal oxidation again, the silicon nitride film 19 of the cylinder 2 is
0X and a second OVD silicon oxide film 20 were grown to a thickness of 6000 (FIG. 3-a). Next, use a dry etcher to dry the second layer.
OVD silicon oxide film 20 and second silicon nitride film 1
9 was etched back to form side walls (FIG. 3-b). Next, the sidewall is used as a part of the ion implantation mask, and a stopper region 22 with a long distance from the element region is formed (
5-c), and 1. After etching the entire surface of the second CvD silicon OvD oxide film 18.20 with a hydrofluoric acid aqueous solution,
A field silicon oxide film 21 of 5sooX is grown in a high-pressure oxidation furnace at 950°C (Fig. 3-a), and then the cylinder 1 and the second silicon nitride film 17 and 19 are grown with hot phosphoric acid, and the polycrystalline silicon 16 is grown with nitric acid. Etching was performed with an aqueous solution containing decafluoric acid as the main component. At this time, the bird's beak is 0.4 to 0.5 μ compared to 0.7 to 0.9 μ on one side in the LOOO8 method.
and was able to be reduced. After this, using the above element isolation process, 0M0816K and 64KSRAM with a 1.0 to 1.5 μ rule can be manufactured, and by reducing the field dimension margin, the degree of integration is increased by 1.8 times compared to the conventional one. I was able to do it. In addition, the leakage current can be reduced, and the access time can be on the order of 50 h seconds for the 64 and 50 A seconds for the 16. It should be noted that the first QVD silicon oxide film 18 can clearly define the end point of the pack etch and does not need to be used unless the first silicon nitride film 17 is used.
If the surface of the polycrystalline silicon film 16 is lightly oxidized before the growth of the polycrystalline silicon film 7, the end point of the dry etching can be clearly determined.

〔effect〕

As described above, the present invention provides a method for manufacturing a semiconductor device including element isolation technology that is defect-free and has few bird's beaks using sidewall technology and a polycrystalline silicon film buffer. A stable supply of high-density memory □ was achieved. The present invention can also be applied to single-channel MOB devices, contributing to stable supply, speeding up, and miniaturization of memories, gate arrays, etc.

[Brief explanation of the drawing]

FIGS. 1 and 2 (α) to (C) are schematic cross-sectional views of conventional processes, and FIGS. 3 (a) to (d) are schematic cross-sectional views of processes according to the present invention. j, 4.14...Silicon substrate 3.12.21
...Field silicon oxide film 6.17...
First silicon nitride film 7.18...First OV
D silicon oxide film 10.19...Second silicon nitride film 11.20...Second OVD silicon oxide film 16.
・・・・・・：・・・・・・Polycrystalline silicon film 8.22...
...stopper area and above Applicant Shuwa Seikosha Co., Ltd. Agent Patent attorney Tsutomu Mogami Figure 2

Claims (2)

[Claims] (1) A step of growing at least a first silicon oxide film, a polycrystalline silicon film, a first silicon nitride film, or a first CvD silicon oxide film on a semiconductor substrate, and the step of growing the first OVD silicon oxide film. a step of patterning the first silicon nitride film and a polycrystalline silicon film, a step of growing a second silicon nitride film and a second OVD silicon oxide film, and a step of patterning the second OVD silicon oxide film and the first silicon oxide film. 1. A method of manufacturing a semiconductor device, which comprises forming a field silicon oxide film after the step of anisotropically etching the silicon nitride film with a dry etcher to form a sidewall. (2) A method for manufacturing a semiconductor device according to claim 1, characterized in that a channel stopper region is formed using a sidewall made of a silicon oxide film or a silicon nitride film as part of an ion implantation mask.