JPS60195951A - Light erasable type semiconductor memory device - Google Patents

Light erasable type semiconductor memory device

Info

Publication number
JPS60195951A
JPS60195951A JP59056051A JP5605184A JPS60195951A JP S60195951 A JPS60195951 A JP S60195951A JP 59056051 A JP59056051 A JP 59056051A JP 5605184 A JP5605184 A JP 5605184A JP S60195951 A JPS60195951 A JP S60195951A
Authority
JP
Japan
Prior art keywords
holes
cap
semiconductor memory
hole
agent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59056051A
Other languages
Japanese (ja)
Inventor
Masamoto Akeyama
明山 正元
Michio Tanimoto
道夫 谷本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59056051A priority Critical patent/JPS60195951A/en
Publication of JPS60195951A publication Critical patent/JPS60195951A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/18Circuits for erasing optically

Abstract

PURPOSE:To omit transparent glass bonding step and to reduce the thickness of an entire package by opening a plurality of through holes passing externally of a cap at the cap, solidifying a melting agent coated on the holes to form light transmitting windows. CONSTITUTION:Circular holes (spot facing holes) 10 of suitable depth are opened upward from the inner surface of a ceiling plate 9 which forms a cap 8 of a box shape, and a plurality of circular through holes 11 communicated with the exterior of the cap 8 are opened integrally with the top of the holes. This effectively block the through holes with a melting agent, and the thickness of the light transmission unit is readily reduced. The agent is coated in the holes 11. A semiconductor memory is hermetically sealed by the cap 8. In this case, when a bake furnace set at 400-450 deg.C is passed, the agent is heated and melted together with sealing material, cooled, solidified in the holes 11 to form a transparent window 16 capable of emitting ultraviolet rays.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体記憶装置に関し、特に光消去型半導体記
憶装置用キャップに関する〇 〔背景嫁術〕 従来の光消去型半導体記憶装置例えばEFROM(消去
可能な、書込み可能な読み出し専用メモリ)において、
半導体メモリに記憶させた内容を光照射によシ消去する
必要がある。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor memory device, and more particularly to a cap for a photo-erasable semiconductor memory device. [Background] The present invention relates to a cap for a photo-erasable semiconductor memory device. writable read-only memory)
It is necessary to erase the contents stored in the semiconductor memory by irradiating it with light.

第1図及び第2図に従来の当該記憶装置の一例を示す。An example of the conventional storage device is shown in FIGS. 1 and 2.

従来、第1図及び第2図に示すように、キャップ1の中
央に貫通孔2を穿設し、該貫通孔内に透明ガラス板3を
キャップ1に接合させ、以って咳透明ガラス板3から紫
外線を照射して半導□体メモリに記憶させた内容を消去
するようにしていた。尚これら図において、4は半導体
ベレットで、例えばシリコン単結晶基板から成シ、周知
の技術によって、このチップ内には多数の回路素子が形
成されたEFROMチップからなる。
Conventionally, as shown in FIGS. 1 and 2, a through hole 2 is formed in the center of a cap 1, and a transparent glass plate 3 is bonded to the cap 1 within the through hole, thereby forming a transparent glass plate. 3, the contents stored in the semiconductor memory were erased by irradiation with ultraviolet rays. In these figures, reference numeral 4 denotes a semiconductor pellet, which is an EFROM chip formed from, for example, a silicon single crystal substrate and in which a large number of circuit elements are formed using well-known techniques.

又、5は上記半導体素子4をマクントするペース(基板
)で、例えばセラミック基板により構成される。更に、
6はコネクタワイヤで例えばAJ細線によシ構成され、
このコネクタワイヤ6の一端部を゛半導体素子4のパッ
ド(図示せず)とボンディングし、当該ワイヤ6の他端
部をリード7とボンディングすることによシ、半導体素
子4内の内部配線がリード7より外部に引出されるよう
になっている。しかるに、この場合、キャップ1と透明
ガラス3との接合性が問題となるばかシでなく、透明ガ
ラス接合の為の工程を要し、コストアラグを招き、又パ
ッケージの全体の厚さも透明ガラスの存在する分厚くな
らざるを得ないという欠点があった。
Further, 5 is a plate (substrate) for mounting the semiconductor element 4, and is made of, for example, a ceramic substrate. Furthermore,
6 is a connector wire composed of, for example, an AJ thin wire;
By bonding one end of this connector wire 6 to a pad (not shown) of the semiconductor element 4 and bonding the other end of the wire 6 to a lead 7, the internal wiring within the semiconductor element 4 can be connected to the lead. 7, it is drawn out to the outside. However, in this case, the bondability between the cap 1 and the transparent glass 3 is not a problem, and a process for bonding the transparent glass is required, which causes cost delays, and the overall thickness of the package is also affected by the presence of the transparent glass. The disadvantage was that it had to be thick.

〔発明の目的〕[Purpose of the invention]

本発明はキャップと透明ガラスとの接合性の問題を回避
し、透明ガラスを特別に取付ける必要のない、光消去半
導体装置を提供することを目的としたものである。
SUMMARY OF THE INVENTION An object of the present invention is to provide a photo-erasable semiconductor device that avoids the bonding problem between a cap and transparent glass and does not require special attachment of transparent glass.

本発明の前記ならびにそのほかの目的と新規な%徴は、
本8A細書の記述および添付図面からあきらかになるで
あろう。
The above and other objects and novel characteristics of the present invention are as follows:
It will become clear from the description of this specification 8A and the attached drawings.

〔発明の概要〕[Summary of the invention]

本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、下記のとおシである。
A brief overview of typical inventions disclosed in this application is as follows.

すなわち、本発明では、キャップに小さな′X通孔を穿
設し、該貫通孔に融剤を塗布しておいて、キャップ封止
時に融剤を加熱溶融してガラス化し、紫外線照射窓と成
すものである。
That is, in the present invention, a small 'X through hole is formed in the cap, a flux is applied to the through hole, and when the cap is sealed, the flux is heated and melted and vitrified to form an ultraviolet irradiation window. It is something.

〔実施例〕〔Example〕

本発明の実施例を第3図〜第5図に基づいて説明する。 Embodiments of the present invention will be described based on FIGS. 3 to 5.

第3図は本発明を適用したキャップの断面図、第4図は
同平面図で、第3図は第4図I−I線断面を示し、又第
5図は本発明キャップを使用して成る半導体記憶装置の
断面図を示す。
Fig. 3 is a sectional view of a cap to which the present invention is applied, Fig. 4 is a plan view thereof, Fig. 3 shows a cross section taken along line I-I in Fig. 4, and Fig. 5 is a sectional view of a cap to which the present invention is applied. 1 is a cross-sectional view of a semiconductor memory device made of

本発明では第3図に示すように、箱形形状のキャップ8
を構成する天井板9の内面から上方向に適宜深さの円形
穴(座グリ穴)10を穿設し、紋穴の上部に連設して、
キャップ8外部と通じる小さな円形の貫通孔11を複数
穿設する。これは融剤により貫通孔を確実にふさぎ、ま
た光透過部の厚さを薄くし易くする。
In the present invention, as shown in FIG. 3, a box-shaped cap 8 is provided.
A circular hole (spot-bored hole) 10 of an appropriate depth is bored upward from the inner surface of the ceiling plate 9 constituting the ceiling plate 9, and a circular hole (spot-bored hole) 10 is formed in a row above the crest hole.
A plurality of small circular through holes 11 communicating with the outside of the cap 8 are bored. This allows the flux to reliably close the through hole, and also makes it easier to reduce the thickness of the light transmitting portion.

この貫通孔11に、融剤を塗布する。融剤の例としては
、加熱炉などでの焼成によp1光消去型半導体装置の光
照射窓を形成し得るような材料が使用され、具体例とし
ては粉末状のガラス材料、窯業製品に使用される釉(′
!@薬> 、AJz os の浴液又はコロイド、等が
挙げられる。
A flux is applied to this through hole 11 . Examples of fluxes include materials that can form the light irradiation window of P1 photo-erasable semiconductor devices by firing in a heating furnace, and specific examples include powdered glass materials and materials used in ceramic products. Glaze (′
! @Medicine>, AJzos bath liquid or colloid, and the like.

ガラス材料としては珪酸塩、硼珪酸塩ガラスが例示され
、粕はガラスと組成的に酷似し、両者とも種々の珪酸塩
が固容体として混合されたもので、釉は珪酸塩混合物又
は珪酸塩と硼酸塩との混合物から成っている。
Examples of glass materials include silicates and borosilicate glasses; kasu is very similar in composition to glass; both are mixtures of various silicates as solids, and glazes are silicate mixtures or borosilicate glasses. Consists of a mixture with borates.

このように、ガラス材料や釉などを貫通孔11に付着し
ておき、当該キャップ8で、半導体記憶装置において気
密封止(ハーメチック7−ル)を行う。
In this manner, a glass material, glaze, or the like is adhered to the through hole 11, and the cap 8 performs hermetic sealing (hermetic sealing) in the semiconductor memory device.

すなわち、第5因に示すようにベース(基板)12に半
導体素子13をマウントし、該半導体素子13とリード
14とをコネクタワイヤ15によシ周知の技術に基づい
て電気的に接続後、上記キャップ8に封止材を塗布しベ
ーク炉中を通して周知の技術により、半導体素子13の
気密封止を行う。この際、例えば400〜450℃位に
設定されたベーク炉中を通過するときに、封止材料と共
に上記融剤も加熱浴融され、冷却固化により貫通孔11
に、紫外線照射可能な透明窓部16を形成することがで
きる・ 上記本発明に係る半導体装置を構成する半導体素子13
やリード14やコネクタワイヤ15には、前記従来例で
例示したものと同様のものが使用され、又、キャップ8
やベース12は例えばセラミックにより構成されている
C 〔効果〕 貫通孔に釉などの融剤を塗布し、これを焼成することに
よp紫外線照射可能な窓を形成するようにしたので、透
明ガラス板を特別に用意する必要がなく、シたがって、
透明ガラス接合工程を要せず、又、従来のごとく、キャ
ップと透明ガラス板との接合性は問題とならず、更に、
パッケージ全体の厚さを博くすることができる。
That is, as shown in the fifth factor, after mounting the semiconductor element 13 on the base (substrate) 12 and electrically connecting the semiconductor element 13 and the leads 14 using the connector wire 15 based on the well-known technique, the above-mentioned A sealing material is applied to the cap 8 and the cap 8 is passed through a baking oven to hermetically seal the semiconductor element 13 using a well-known technique. At this time, when passing through a baking oven set at, for example, 400 to 450°C, the above-mentioned flux is melted together with the sealing material, and the through-hole 11 is cooled and solidified.
A transparent window portion 16 that can be irradiated with ultraviolet rays can be formed in the semiconductor element 13 constituting the semiconductor device according to the present invention.
The leads 14 and connector wires 15 are the same as those exemplified in the conventional example, and the cap 8 is
The base 12 is made of, for example, ceramic. [Effect] By applying a flux such as glaze to the through hole and firing it, a window that can be irradiated with ultraviolet rays is formed, so it can be used as a transparent glass. There is no need to prepare a special board, therefore,
There is no need for a transparent glass bonding process, and there is no problem with bonding between the cap and the transparent glass plate as in the past.
The overall thickness of the package can be increased.

以上本発明者によってはなされた発明を実施例にもとづ
き具体的に説明したが、本発明は上記実施例に限定され
るものではなく、その要旨を逸脱しない範囲で種々変更
可能であることはいうまでもない。例えば第6図に示す
ように、貫通孔の形状を方形状にできる。この場合、穴
10を適当な深さに設けることによって光透過族の厚さ
が、貫通孔11が大きくとも不足しないようにする必要
がある。さらにEPROMチップ13内のメモリプレイ
を貫通孔11と同様に分割するのがよい〇例えば第6図
の場合、メモリアレイは8つに分割するのがよい。ま九
、前記実施例では貫通孔をキャップの外部側に設けた例
を示したが、キャップ内部側に貫通孔11を穿設し、そ
の上部に穴lOを穿設してもよいが、ゴミなどが当該穴
10に付着するおそれなどがあるので前記実施例による
ことが好ましい。
Although the invention made by the present inventor has been specifically explained based on Examples above, the present invention is not limited to the above Examples, and it should be noted that various changes can be made without departing from the gist of the invention. Not even. For example, as shown in FIG. 6, the shape of the through hole can be rectangular. In this case, it is necessary to provide the hole 10 at an appropriate depth so that the thickness of the light-transmitting layer does not become insufficient even if the through-hole 11 is large. Furthermore, it is preferable to divide the memory array in the EPROM chip 13 in the same manner as the through holes 11. For example, in the case of FIG. 6, it is preferable to divide the memory array into eight parts. (9) In the above embodiment, the through hole was provided on the outside of the cap, but the through hole 11 may be provided inside the cap and the hole 10 may be provided above the through hole 11. It is preferable to use the above-mentioned embodiment because there is a risk that foreign matter may adhere to the hole 10.

〔利用の分野〕[Field of use]

本発明はキャップを有する気密封止タイプの半導体記憶
装置全般に適用することができる。
The present invention can be applied to all hermetically sealed semiconductor memory devices having a cap.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例を示す半導体記憶装置の断面図、第2図
は同キャップ部の平面図、 第3図は本発明の実施例を示すキャップの断面図、 第4図は同キャップの平面図、 第5図は本発明キャップを使用して成る半導体記憶装置
の一例を示す断面図、 第6図は本発明の他の例を示す平面図である@1・・・
キャップ、2・・・貫通孔、3・・・透明ガラス板、4
・・・半導体素”子、5・・・ベース、6・・・コネク
タワイヤ、7・・・リード、8・・・キャップ、9・・
・天井板、10・・・穴、11・・・貫通孔、12・・
・ベース、13・・・半導体素子、14・・・リード、
15・・・コネクタワイヤ 3 図 第 4 図
FIG. 1 is a sectional view of a semiconductor memory device showing a conventional example, FIG. 2 is a plan view of the cap portion, FIG. 3 is a sectional view of the cap showing an embodiment of the present invention, and FIG. 4 is a plan view of the same cap. 5 is a sectional view showing an example of a semiconductor memory device using the cap of the present invention, and FIG. 6 is a plan view showing another example of the present invention @1...
Cap, 2... Through hole, 3... Transparent glass plate, 4
...Semiconductor element, 5...Base, 6...Connector wire, 7...Lead, 8...Cap, 9...
・Ceiling board, 10... hole, 11... through hole, 12...
・Base, 13... Semiconductor element, 14... Lead,
15... Connector wire 3 Figure 4

Claims (1)

【特許請求の範囲】 1、 キャップにキャップ外部へ貫通する貫通孔を複数
穿設し、該貫通孔に塗布した融剤を固化して光透過窓を
形成して成る光・消去型半導体記憶装置。 2、融剤がガラス粉末である特許請求の範囲第1項記載
の光消去型半導体装置◎ 3、融剤が釉である、特許請求の範囲第1項記載の光消
去型半導体記憶装置〇
[Claims] 1. A photo-erasable semiconductor storage device comprising a cap with a plurality of through holes penetrating to the outside of the cap, and a flux applied to the through holes solidifying to form a light transmitting window. . 2. The photo-erasable semiconductor device according to claim 1, in which the flux is a glass powder. 3. The photo-erasable semiconductor memory device according to claim 1, in which the flux is glaze.
JP59056051A 1984-03-16 1984-03-16 Light erasable type semiconductor memory device Pending JPS60195951A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59056051A JPS60195951A (en) 1984-03-16 1984-03-16 Light erasable type semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59056051A JPS60195951A (en) 1984-03-16 1984-03-16 Light erasable type semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS60195951A true JPS60195951A (en) 1985-10-04

Family

ID=13016283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59056051A Pending JPS60195951A (en) 1984-03-16 1984-03-16 Light erasable type semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS60195951A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002103700A1 (en) * 2001-06-14 2002-12-27 Roke Manor Research Limited Detachable packaging for a programmable device with means for programming the device from the exterior
KR100453970B1 (en) * 2001-11-27 2004-10-20 전자부품연구원 Method for manufacturing window structure and apparatus for fixing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002103700A1 (en) * 2001-06-14 2002-12-27 Roke Manor Research Limited Detachable packaging for a programmable device with means for programming the device from the exterior
KR100453970B1 (en) * 2001-11-27 2004-10-20 전자부품연구원 Method for manufacturing window structure and apparatus for fixing the same

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