JPS60191234A - Flash photographing system and flash device - Google Patents

Abstract

PURPOSE:To prevent the malfunction due to the emission of a flash device when charging of another flash device is not completed, by setting the state, where light emission is possible, when charging of all connected flash devices is completed. CONSTITUTION:When flash devices I -III emit light, low-level signals are outputted from devices I -III for a certain period, and high-level signals are outputted for a certain period thereafter, and low-level signals are outputted again for a certain period required for successive full light emission of two lamps. Except data transmission and reception and light emission, high-level signals are outputted when charging of devices I -III is completed, and low-level signals are outputted if charging is not completed. Low, high, and low-level signals at the light emission time are used as signals for controlling the quantity of emitted light. Synchronizing clock pulses from a terminal SCK used for data transmission and reception among a camera body V, devices I -III, and a flsh controller IV are outputted to a line l3 from the body V, and a signal indicating the operation state of the body V is outputted from a terminal O5 to the line l3 also, and a control circuit FST outputs a light emission stop signal during light emission.

Description

[Detailed description of the invention]

The present invention connects a single or multiple electronic flash device (hereinafter referred to as a flash device) to a camera directly or indirectly,
It is used in a device for flash photography by emitting light in synchronization with the opening of the camera shutter. ”L

[1] The main capacitor determines whether or not the flash device fires.
It is well known that the battery is determined by the state of charge of the battery. this
If this method is used, the amount of light emitted will be insufficient when taking flash pictures.
This prevents underexposure and prevents malfunctions.
It has the effect of By the way, if you use multiple flash IAIs like this,
When performing flash photography, one flash device is required.
is fully charged, and other flash devices are uncharged.
Only the flash device fires: other flash devices
may not emit light, resulting in insufficient exposure or the intended lightness.
When I can no longer use the Flash Wi shadow function,
There is a problem. Utility Model Application No. 56-134025 and its corresponding U.S. Patent No. 4
．． No. 333,719 includes a connector for multiple flash photography.
A device that receives charging completion signals from multiple flash a devices.
is detected by the AND circuit, and all flash devices are charged.
When the charge is completed, a 1 signal (hereinafter referred to as the charge complete signal) will be generated to indicate the completion of charging.
A system has been proposed that sends the following information to the camera. But long
In flash systems using this connector,
Each flash device can monitor the charging status of other flash devices.
Since we do not know about the
If so, it will emit light in response to the flash command signal from the camera.
However, at that time, the camera did not receive a full charge signal, so it
Operate in natural light shooting mode without switching to rush shooting mode.
This may cause inconveniences such as making a mistake. 1 The purpose of the present invention is to improve the performance of each flash in multiple flash photography.
Depending on the charging status of all flash devices
A flash that does not cause malfunctions
The system is to provide. 111 Figure 1 shows a flash photography system to which this invention is applied.
FIG. 2 is a block diagram showing the overall configuration. In addition, this figure and IX
In the circuit diagram and block diagram below, thick lines indicate multiple signal lines.
, a thin line indicates one signal line. (V) is an interchangeable lens-eye reflex camera body.
This camera body has an electrical connection to the flash device.
Connector (CN9) for connecting. (CN3) is provided. Connector (CN9)
is located on the hot shoe (not shown) on the top of the camera.
When an electronic flash device (hereinafter referred to as a flash device) is
When attached to the camera via the shoe, the flash is installed.
directly electrically connected to the installed circuit. Connector (C, N
3) is provided at the bottom of the camera, and is used as a flash control (described later).
Electrically connected to flash device via roller (ff)
and the flash device is connected via the connector (CN3),
It is not directly electrically connected to the camera. moreover
, the camera body (V) is equipped with a connector (CNI').
and this connector (CNI >
The attachment of the interchangeable lens, such as the seat plate of the lens mount, is
and an interchangeable lens (Vl) is attached to the camera.
and connect to the connector (CN2) of the interchangeable lens (Vl).
various data from the lens circuit (LEC) are sent to the camera.
It is taken into the main body (V). (mV) controls the flash device connected to it
It is a flash controller and connects to the connector on the bottom of the camera body.
Connect electricity to the connector (CN3) through the connector (CN4).
connected. Flash controller (Ili')
There is also a connector (CN5). (CN7) is provided, and the connector (CN5)
has 4 electrical terminals, 2 on the connector (CN7)
There are two electrical terminals. And the connector (CN5
) is a flash device connected to
Data exchange and light emission with roller (ff) IIIJ
Connector (CN7)
The flash device connected to the
Only the transmission of the light emission start signal from the color (ff) is performed.
Ru. (1) is a two-lamp type flash device, and in the example shown in Figure 1.
connects the connector (CN5) to the flash controller (W).
), (CN6). (1) is 1
It is a light-type flash device, and it is attached to the camera body (V).
1 = Connector (CN9) and connector provided on the shoe
It is electrically connected via the terminal (CN 10). (
I[) is a single-lamp flash unit with the same configuration as flash device (1).
flash device, in this example the flash controller
NV) via connectors (CN7) and (CN8)
electrically connected. Figure 1 shows the camera body (V) and flash controller.
(ff) and flash equipment @ (r), (I), (■)
This is an example of how to connect the flash
Attire! (1) and (1) can be swapped, or
If the lash device (1) is not installed or the hot shoe
The flash device (1) or (It) only in position
or attach a flash to the camera body (V)
Attach the controller (ff) and connect the connector (CN!).
i ) only in position (I) or (I[)
Attach either one of the
Which of the flash device (1) or (I[) is installed,
Flash controller 1~〇-ra attached to the camera body (V)
Do not attach a flash device to (]'/').
You can also Furthermore, the flash controller (
IV) and place it in the position of the connector (CN7).
Just install the flash device (I) or (1).
Tomoyo (, in addition, there are 7 lanterns on the camera body (V)
1 to 5 (■: Attach only the flash device.
You can also operate the camera without installing it anywhere.
. Please note that only the flash controller (IV) is attached to the camera.
Flash R does not cast shadows when attached to the body (V)
Ambient light photography is performed. Also, the camera body (V)
Bot 1-shoe and flash-1 controller (IV
) at the connector (CN5) position, a general-purpose flash
The device or the system of this invention does not have the necessary functions.
This occurs if a non-dedicated flash device is installed.
No flash photography was performed, and the general-purpose
Or a non-dedicated flash device will emit light. In addition, the connector (C) of the flash controller (ff)
The flash device installed in position N7) is
The file according to the invention, whether general or non-dedicated,
Rush photography will take place. Next, the inside of the camera body (V) will be explained. (BAl) is the power supply battery, (MSl) is the main switch
It is. (The 31st button is pressed by the release button (not shown).
The photometering switch is opened in the first stage, (S2) is the release
The release is closed by the second step of pressing the button (not shown).
The closing signal of the photometric switch (81) is
Microcomputer (hereinafter referred to as microcomputer) (MCI)
) to the interrupt terminal (it) and input terminal (11),
The closing signal of the release switch (S2) is
'C1) Input to input terminal (12). (S4) is dew
It is released when the control operation is completed, and the shutter mechanism and comparison
Charging of exposure control JI machine JR (not shown) such as sideways
This reset switch is opened when the
The signals corresponding to the opening and closing of the switch (S4) are sent to the microcontroller (
It is input to the input terminal (13) of MCI). (Do
) is the exposure control mode film sensitivity, exposure time, aperture value
Outputs IC data, that is, setting data, according to the setting values such as
The input terminal (IPl) of the microcomputer (MCI) is a circuit.
) are inputting the setting data signals. In addition,
The film sensitivity value can be set using the film container (instead of manual setting).
(not shown) The film speed data marked above is automatically
Reading and configuration data may be performed in the same format. (LM) is a photometric circuit, and the output of the photometric circuit (LM) is
Analog input terminal for A-D conversion of microcontroller (MCI)
child (ANI) i: input, 1ll11 optical circuit (LM)
Base standard voltage i! ! (not shown)
Reference voltage input terminal for A-D variation of controller (MCI') (
VRI). (AF,) is the autofocus tJll adjustment circuit, and the shooting lens.
Detects the focal VA condition of the lens and moves the photographic lens to the focusing position.
Drive with. This automatic focus adjustment circuit 〈A'')
The data is transmitted from the controller (MC1) through the data bus (DB).
The camera performs the operation according to the command given, and the -C is formed by
The deviation direction and deviation darkness of the subject image from the planned focal plane
To detect. Then, the detected misalignment data and exchange lens
1lii shadow lens based on data from Vl.
Movement m (actually, the movement of the photographic lens for focus adjustment)
Calculate the amount of movement of the focusing lens system to
The focal point of the photographing lens changes as the lens moves by the same amount.
Display the adjustment status. (RL) is the operation of the exposure control mechanism.
This is the release circuit for starting the microcomputer (M
C11) 1 child (02) Kara 0) “High” faith
J-ru the operation with the number. (DP) is a display circuit, exposed
Control values (planned aperture value, exposure time value, etc. to be controlled)
, exposure IJ control mode, film sensitivity, flash device
Displays the status, etc. This display circuit (DP) is
data from output terminal (OF2) of (MCI>)
The display is performed based on the (FCC) is a circuit for exposure control, and the output terminal (OP
Based on the exposure time and number of stops from
control the shutter and aperture opening. The transistor (BTl) is a power supply transistor.
, the terminal (01) of the microcomputer (MCI) is "Hiuh"
” When the
The transistor (BTl) is made conductive, and the power supply line (+
(2) Power is supplied via From this line (10V), other than ``microcontroller (MCI)
The power supply to the circuit and lens circuit (LEC) is
Ru. The switch (SX) is turned on when the front curtain of the goblin and the ivy have finished running.
It is a synchro switch that is developed, and this synchro switch
The signal from the switch (SX) is sent to the C flash via the line (α1).
flash device (■), flash controller (■), flash
is transmitted to the shutter device (1). (FST) is Flash
It is a light emission amount control circuit that controls the light emission of the device, and its equipment.
An example is shown in FIG. (IOC) is the camera body (
V), interchangeable lens (■), flash device (I[) and
Sends and receives signals to and from the flash controller (IV)
It is an input/output controller that controls, and a specific example is the seventh
It is shown in the figure. The terminal (CKO) of the microcontroller (MCI) is
Outputs an internal clock pulse, and this pulse (φ1
) is the automatic focus adjustment circuit (AF) and the setting data output circuit.
(Do), exposure control circuit (FCC), display circuit (D
P), and the reference clocks to the release circuit (RL).
It is supplied as follows. Microcomputer (MCI) terminal (ANO)
) is the film sensitivity for controlling the amount of light emitted by the flash device.
No. 13 is output after D-A conversion. Terminal (SCK). (Sou) and (SIN) are serial data input/output terminals.
Yes, if there is a serial input/output instruction, the output from the terminal (SCK>
8 clock pulses are output and this clock pulse
In synchronization with the rise of the signal, the microcomputer (MCI)
Data is sent one bit at a time from the input/output register of the
clock pulse from the terminal (SCK)
Data to the terminal (SIN) is synchronized with the falling edge of
One by one, they are taken into the attendance register. (03) is intersection
When exchanging data with the interchangeable lens (Vl),
The high terminal (04) is for the flash device and flash.
Sending and receiving data with either or both of the host controllers
The terminal (05) that becomes 'Higb°' when performing
Camera movement to flash device and flash controller
"This is a terminal that transmits the J signal indicating the status, and the flash
Device and/or flash controller
When importing the data to the camera body, a predetermined period T1
between (e.g. between 9oμsea) "l-l right
” pulse from the camera body to the flash device and
and flash controller 2 or both.
When outputting the specified period]-2 (for example, 150
The camera outputs a pulse of
When the camera body starts the exposure control operation, the predetermined value is reached! IQI
IT3 (7) (for example, for 210 μsec)
Outputs a pulse of "i(ill").
6) Connect the flash device and flash control from the camera body.
When transferring either or both data to the controller
This is the terminal that becomes “@igh”. (LEC) is a circuit installed inside the interchangeable lens (Vl).
Yes, it is powered from the power line (10V) of the camera body.
. And the terminal (03) of the microcomputer (MCI) is '1
When it becomes “high”, the line (Ll) becomes “High”.
The circuit inside the lens becomes operational. and the line (
Based on the clock pulse sent from L2)
The data fixedly stored in the internal circuit (LEC) is sequentially
Output from the series C line (L3). Fixed memory
The data includes the maximum aperture, maximum aperture, and focal length.
, 1Ii1 shadow distance, various data for automatic focus adjustment, chi
For checking (interchangeable lens compatible with the system of this example)
installed or not, and if any such replacement lens is installed.
This data is used to check whether the case is securely attached.
There is data such as (α1) is the synchro switch (SX) as mentioned above.
This is a signal line through which an opening signal is transmitted. (A2) is
Camera body, flash controller and flash device
When exchanging data with either or both of the
flash device and flash controller or
Serial data from both and from the camera body
It functions as a bidirectional data bus through which data is transmitted. And when the flash device fires, the flash device
(from the time required for the flash device to emit all the light)
For a long time, e.g. 2.5w + 5ec)
signal is output, and then for a certain period of time (for example, ll1lsec
) "Higb" signal is output, then again
A certain amount of time (for example, 5
．． 5m5ec) A “low” signal is output. The flash device is not used except when sending and receiving data or when flashing.
'Higb' if charging is completed, charging completion status
If not, a signal of °1Lovil+ is output. In addition, 'LOW' when emitting light, 'l-11g11
°', the "LOW" signal emits light as described later.
There is a camera on line (9, 3) for mother control (No. 8).
Between the main body, flash device and flash controller
Synchronization from the terminal (SCK) when exchanging data between
clock pulses are output from the camera body. Also,
There is also a signal from the terminal (05) that indicates the operating status of the camera body.
It is output from line (α3). Further flash equipment
During light emission, light emission from the light emitting mvU111 circuit (FST)
A stop signal is output. Next, the inside of the flash device (I) will be explained. (BA3) is the power battery, (MS3) is the main switch.
It is. (FLCl,) is a control circuit,
Equipped with functions such as data exchange, display calculations, and light emission control.
The specific details of the interior are shown in Figures 9, 10, and 11.
Explanation will be made later based on FIGS. 12, 13, and 14.
do. (FDPl) is the later emission mode (parent-child emission).
Light, first or second light for sequential light emission, simultaneous light emission, 1
Display of light emission), display of bounce status, camera
Aperture value and film based on data sent from the main unit
Sensitivity, focal length display, and flash device illumination angle are variable.
display of the set flash coverage angle in case of
The data on the fringe value and film sensitivity that are received and the luminous intensity data are
Based on the data, the interlocking range (auto
dynamic flash control (shooting distance range) by the manually set amount.
In the case of flash mode (shown below in manual setting mode)
Displays the shooting distance for proper exposure. (CHCl
) is the charging completion detection circuit (CI-IDI), (CHD2
1-transistor (BT2) and
The R voltage control circuit controls the operation of the booster circuit and booster circuit (DDl).
be. In the booster circuit (DDl), the transistor (BT2) is conductive.
It operates and changes the voltage of the power supply (BA3) to the required voltage (e.g.
For example, the voltage is boosted to 300V), and this output is connected to a diode (
Dl) to the capacitor (C1), and the diode (C
2), the capacitor (C2) is charged. and
, charging completion detection circuit (CHDl), (CHD2)
The charging voltage of capacitors (C1) and (02) is
When the battery is charged to a voltage that can compensate for the maximum amount of light emitted by the device,
t-11g11” signal (hereinafter this signal will be referred to as the completion signal)
) is output. Boost 1113 control circuit (CI-ICB is
, from both detection circuits (CHol), (CHD2)
When the fullness signal is output, the transistor (BT2) is disabled.
As an operation, the operation of the booster circuit (DDl) is stopped and the
A full charge signal must be output from at least one of the detection circuits.
If so, the transistor (BT2) is made conductive and the booster circuit (
DDI). (PLO'!) and (FLO2) are light emitting parts, respectively.
Signal (STI) from control circuit (FLCI)
), (8P1), (ST2), (SF3)
is controlled. The light emitting part (FLO2) has variable irradiation direction.
It has become. This flash device can be used as a flash device.
Flash device (In only direct or flash controller)
If it is connected to the camera body (V) via the
In this case, if the light emitting part (FLO2) is facing the front (below),
(referred to as the lower front light state), only this light emitting part (FLO2)
The light is emitted, and the light emitting part (PLO2) faces in a direction other than the front.
(referred to as the IX lower bounce state), the light emitting part first
(PLO2> emits light for about 2/3 of the proper exposure, and then
The light section (FLI) emits only about 1/3 of the proper exposure (
(Hereinafter, this type of light emission mode will be referred to as the parent-child light emission mode.)
. On the other hand, as shown in Figure 1, this
Two or more flashes, including the flash unit If(I)
When the Pu device is electrically connected, the light emitting part (Pu
O2) is in front light condition or in bounce condition.
Only the light emitting part (PuO2) emits light, and (FLOI)t;
Luminescence L/suIz'. Light emitting part (FLOl). (PuO2) has terminals (ST1) and (ST2)
It starts emitting light when it reaches 1iIJ11".
, the capacitance of capacitor (C1) is the capacitance of capacitor (C2)
Because it is very small compared to the amount, the light emitting part (
The maximum light emission amount of FLOl)' is the maximum of the light emitting part (PuO2).
It is very small compared to the amount of light emitted. Therefore,
For example, the maximum light emission amount of the light part (PuO2) is the guide number.
Although it is 4o, the maximum light emission amount of (FLOl)
For example, the guide number is 8. Sara
Although the illumination angle of the light emitting part (PuO2) is variable,
On the other hand, the illumination angle of the light emitting part (FLOl) is fixed.
Ru. Terminals (SPl) and (SF3) are ends for stopping light emission.
The signal “l-1-1i” is output from the terminal (SPl).
When the signal is output, the light emitting part (FLOl) stops emitting light.
, a “)light” signal is output from the terminal (SF3).
Then, the light emitting section (PuO2) stops emitting light. Next, the flash device @<l) will be explained. (BA5) is the power supply battery, (MS51 is the main switch
It is. (PuO3) is the controller of flash device 1(r).
A control circuit with the same function as the control circuit (FLCl).
It is a roll circuit, and the display data is sent to the display unit (FDP3
), and the light emitting part (PuO4) is sent to the terminal (ST
4) A light emission start signal is sent from the terminal (SF3), a light emission stop signal is sent from the terminal (SF3).
Output the number. This control circuit (PuO3)
Based on Fig. 15, Fig. 16, and Fig. 11, the specific example is shown below.
I will explain later. Is the boost control circuit (CNC3) the detection circuit (CNC4)?
Transistor (Br3), boost circuit according to the fullness signal from
Controls the activation and inactivation of the road (DD3). Light emitting part (P
uO4) can be switched between front light state and bounce state.
The illumination angle is variable. Flash device (1)
Has a flash outfit! It has the same configuration as (1). Next, I will explain the flash controller (ff).
Ru. (BA2) is the power battery, (MS2) is the main battery.
It's it. (CNC) is a processing circuit, and the camera main unit
Flash based on clock pulses from the body (V)
Read and flash data from devices (1) and (1).
Check the mounting condition of the flash device and the internal condition of the flash device.
determines the flash mode, and adjusts the clock pattern from the camera.
sends a flash mode signal to the flash device based on the
send. And then the clock pulse from the camera body
Indicates the lighting mode and flash device status based on
Send the signal to the camera. Furthermore, the determination result of the light emission mode
Depending on whether the flash j or the device (IN) emits light,
(Sequential emission mode)
After the flash device emits light, the terminal (α21) starts emitting light.
Output a signal. A specific example of this processing circuit (CNG) is shown in FIG.
Ru. Next, we will explain the light emission modes using various combinations.
. Only the flash device (1) can be connected directly via the hot shoe.
Camera mains via connection or flash controller (W)
Connected to the body and the light emitting part (PuO2) is in frontal light condition
1, only the light emitting part (PuO2) emits light.
The lamp becomes light emission mode, and the interlocking range is that of the light emitting part (PuO2).
Displayed based on the maximum light emission amount. In addition, the light emitting part (Pu
If O2) is in a bounce state, the light emitting part (PuO2) is suitable.
Light is emitted for 2/3 of the normal exposure, and then the light emitting part (FLOI)
is 1/3 of the proper exposure. It is a parent-child lighting mode that only lights up.
The interlocking range is based on the maximum light emission amount of the light emitting unit (FLOl).
will be displayed. Only the flash device (Ir) is attached to the camera body (■).
Electrically via the controller or fludge unit controller
When the light emitting part (PuO4) is connected to the
The light emitting part (PuO
4) becomes the single-lamp light emission mode. In this case, the luminous
If the unit (PuO4) is in a bounce state, the interlocking range will not be displayed.
First, in front light conditions, the maximum light emission amount of the light emitting part (PuO4)
Based on the link (linked l@circle) is displayed. Next, attach a frame to the hot shoe and flash controller respectively.
Explain the case where a lash device is installed. this
One or both flash devices are of type (f).
In this case, even if the light emitting unit (PLO2> is in the bounce state,
The light emitting part (FLOI) does not emit light even in front light conditions.
, (FLO2) Da1no emits light. Fludge Unit 1
When Laura (IV) selects simultaneous mode,
Two flash devices fire at the same time, and the amount of light emitted by both
As soon as the photoembryo reaches the appropriate exposure, it stops emitting light.
do. In this case, the interlocking range is the maximum light emitting structure of each light emitting part.
is displayed based on the light emitting unit ht bounce status.
If there is, it will not be displayed. Flash controller 1-0-ra (IV
) selects the sequential flash mode, the flash
Flash device mounted on the controller (IV)
The camera first emits the proper exposure of 27'3, then the camera
The flash device attached to the hot shoe of the body (V)
Only 1/3 of the proper exposure is emitted. The interlocking range at this time is
, will not be displayed with a flash device that fires first, and will be emitted by the user.
For flash devices that emit light, the maximum output of this flash device is
The interlocking range based on the light distance is displayed. In addition, as shown in the illustration, the hot shoe and flash control
A flash device is attached to each roller, and a flash device is attached to each roller.
Connect the flash controller to the connector (CN7).
If a light emitting device is installed, the following light emission modes and
Become. Flash controller (IV) in simultaneous mode
When selected, the light emission start signal is sent from the terminal (α21).
No. is not output and Flash II (Il[) does not emit light.
. Flash controller (IV) Select flash mode sequentially.
If selected, two flash devices (If), (1
) emit light in sequence, then a light emission start signal is sent from the terminal (Q21).
is output, and the flash device ff1 (Il[> emits light).
Ru. Ground line (α4) for flash device (I[)
All that is required is the connection and transmission of the light emission start signal.
Therefore, the light emission amount control circuit (FST) on the camera side
No signal is transmitted, and either the manually set amount of light is emitted, or
Yes, I am! If it is in Ill dimming mode, all light will be emitted.
Ru. Note that this flash v device (ff[) is
Since you only need to input the start signal, you can use a dedicated flash device.
It is not necessary to have one, and a general-purpose flash device may be used. Ma I
The third flash device (I) in the background is e.g.
If you set it so that it only illuminates the area, you can use two lights in a row.
The main subject can be used as a background even if the main subject is illuminated.
Unnatural shadows caused by the subject can be removed. this
The third flash device (■) is the first and second flash device.
Proper exposure is achieved by the light emission of two flash devices (1) and (■).
After that, the light is emitted, and the amount of light emitted is controlled by the camera.
Therefore, it is not desirable to illuminate the main subject.
The light emission that covers the unnaturalness of the lighting is correct.
Just do it. Next, Figure 2, Figure 3, Figure 4, Figure 5, Figure 6, Figure 7
The operation of the camera body (V) and the
The operation of the entire system shown in FIG. 1 will be explained. Figure 2 is Figure 1
A file L1 to explain the operation of the microcontroller (MCI)
-It is a chart. The following explanation will focus on this flow chart.
I will clarify. Main switch (MS) on camera body (V)
When l) is closed, power is supplied to the microcomputer (MCI).
The microcomputer CMCI) starts the operation when power supply starts simultaneously.
start First, in step #1, output terminals (01) to (0
6) is set to “LOW”, and then the display (OP) shows
Outputs data to erase the display. And step #3
Then, from the data bus (DB) to the automatic focus adjustment circuit (AF)
Assuming that no data is being sent out for operation, proceed to step #4.
The chip is set to accept an interrupt signal to the interrupt terminal (1t).
The microcontroller (MCI) stops operating. When the photometry switch (Sl) is closed, the interrupt terminal (it)
A 'LOW' interrupt signal is input to the microcontroller (MC).
I) starts the operation and continues the operation from step #10.
Let's do it. In step #10, set the terminal (01) to “Hi”
gh” via inverter (INI)
Make the resistor (BTl) conductive and connect the power line (1)
and supply power to circuits other than the microcontroller (MC1).
Power is supplied and power is supplied to the lens circuit (LEC). #1
In step 1, set the terminal (o3) to 'High' and record it.
Start reading data from the lens circuit (LEC)
. First, register BR in the microcontroller (MCI) (see below)
registries indicated by non-bracketed symbols, even if
Data, flags, etc. are set programmatically in the microcontroller.
It is. ) as “’O”” and step #13.
Performs operations using serial input/output instructions. by this
From the lens (LEC) to the serial input/output register IOR
Data is read. The contents of this register IOR are
the contents of register SR.
II I II is added and the contents of register BR become N″
It is determined whether the Then it becomes “N”.
If not, return to step #13 and enter the next lens data.
If it is “N”, read step #17.
Move to tip. Here, read the lens data based on Figures 1 and 7.
Explain about taking. Note that Figure 7 shows the input control of Figure 1.
This is a specific example of a circuit (IOC). The terminal (03) of the microcomputer (MCI) is l-1i (]1
1”, AND times m(ANl >, (AN3')
becomes active, and furthermore, via line (Ll),
The lens circuit (LEC) is also given the “light” signal.
and becomes operational. And the microcomputer (MC1
) terminal (SCK) outputs 8 clock pulses.
, this clock pulse is processed by an AND circuit (AN3 >
, to the lens circuit (LEC) via line (U2).
It will be done. Then, from the lens circuit (LEC), this
The first data is sequentially synchronized with the rising edge of the clock pulse.
It is output to the next line (U3). This data is
Microcontroller via circuit (ANl) and OR circuit (OR1')
This data is input to the terminal (SIN) of the pin (MCI). This data is input to the clock pin output from the terminal (SCK).
Read to register IOH sequentially in synchronization with the falling edge of the signal.
It's getting mixed up. The lens circuit (LEC) is configured in the order in which multiple pieces of data are determined.
The ROM fixedly stored in the ROM and the address of this ROM are sequentially stored in
Specify the address specification method and data from ROM in order.
It is equipped with data output means for serially outputting data. and
Addressing means are 8 clocks from line (U2)
Address data is updated sequentially each time a pulse is input.
Let's move on to the decided data! The data will be output in the order of
It will be done. Then, the microcontroller (MCI) processes the input data.
Set the data in the registers in the order of the data.
Therefore, in a certain register, there is a book comparison (data of O, a certain register).
The register contains each record, such as maximum aperture data.
A certain type of data will be set in the register.
Become. In other words, the regular cash register in Mercon (MCI)
The content of the star is the standard type of data for the attached interchangeable lens.
This means that it has become a data. Behind the lens data,
Data that changes as the focal length of the zoom lens changes
, or change depending on the transport distance (lens extension amount).
In case of data, set position of zoom ring and distance ring.
A code board is provided that outputs data according to the code, and this code
The clock pulses from the board and the camera body were counted.
The address can be specified in combination with data. In step #17, terminal (03) is set to “' low”.
and stops data acquisition from the lens circuit (LEG).
Then, check whether flag JF1 is “1pa”.
Determine whether This flag JF1 is data for exposure control.
“1′” if the calculation is completed, 0 if not.
'°. And if JFl is “O°′”
Since the calculation is not completed, the process moves to step #25. On the other hand, if the calculation has been completed, then the release switch (
S2) is closed and the input terminal (12) becomes “Low”.
Determine whether it is. And the terminal (12)
If it is not “LOW”, move on to step #25.
go On the other hand, make sure that the terminal (12) is 'Low'.
Since the release switch (S2) is closed, the next
In step #20, the reset switch (S4) is opened.
Is the input terminal (13) set to ``LOW''?
Determine if it is a fish. At this time, exposure mode 011 i
The switch (S4) is opened and the terminal is disconnected.
If (i3) is ``to1ight'', move to step #25.
go Meanwhile, charging of exposure control IaII4 is completed.
The switch (S4) is opened and the terminal (13) is set to “L”.
For OwI+, start the exposure control operation from step #80.
Let's do it. In step #25, the data imported from the lens is
Determine whether check data has been entered
. This check data is determined by the address of lζROM.
Data common to all interchangeable lenses (e.g. °'
10101010"') is stored, and this data
Indicates that. And if this data is not entered
It means that the lens is not attached, and if it is input, it will be attached.
This means that it has been done. When the lens is attached, #
Of the data captured from the lens in step 26,
, the data to be used in VR for automatic focus adjustment is transferred to the data bus (DB>
is sent to the automatic focus adjustment circuit (AF) through this circuit (
AF) and move on to step #27.
. On the other hand, if there is no check data, the lens is not attached.
Since the autofocus circuit (AF) is not activated, the autofocus circuit (AF) remains inactive.
Then, proceed to step #27. In step #27, connect the terminal (04) to “Htgh”.
data with the flash device and flash controller.
This means that data can be transferred and received. Then, place the terminal (05)
During the period TI (90, czsec) “°r−+
This signal is sent to the flash device and flash controller via line (α3).
transmitted to the troller. Then, the flash device and flash
The lash controller is a flash device and flash controller.
transmits data from the controller to the camera body
mode (hereinafter referred to as FC mode).
. first from the camera by operation using serial input/output commands.
Eight clock pulses are connected to lines (α3), (11, 13
) to the flash device, the flash
The device synchronizes with the rising edge of this clock pulse.
6-pit data via lines (1') and (Q12)
This data is output on the falling edge of the clock pulse.
captured by the flash controller in sync with the
. And the flash controller reads the data
and (is set in the flash controller when
Which flash mode (sequential flash mode, simultaneous flash mode)
Determine the appropriate light emission mode and use the data according to this result.
2 bits to synchronize with the rising edge of the clock pulse.
In CQ2), the output is reversed via (12). At this time,
The icon (MCI) is an input/output register [by OR
, at this time the file is synchronized with the falling edge of the clock pulse.
I want to import the data that is output to the
The controller (MCI) does not use this signal. Next, #30
In step , the line (Q3
). Eight clock pulses are output to (Q13). At this time, the ``C flash'' is activated via the flash controller.
The flash device is attached, and the hot shoe is then flashed.
If the device is installed, the flash device will be in line (Q2
), (41>12), no data is output, and the line
(Q2), (,Q12) as A-bun state and signal
Avoid affecting transmission and flash control
data that the controller previously read from two flash devices.
determined by the flash mode and the set flash mode.
Data is flashed in synchronization with the rising edge of the clock pulse.
output from the controller. Also, flash controller
The flash device is attached via the controller and the hot flash
If the flash is not equipped with a flash device, the flash
The flash controller reads data from the flash device.
output the data to line <Q2). At this time, the flash
The device also outputs data on line (Q12).
However, this data is blocked by flash coat row
be done. If the flash device is attached only to the hot shoe
When the clock pulse at step #29
After outputting the data in synchronization with
Output the same data again in synchronization with the clock pulse
. Please note that the flash controller is attached to the camera body.
Even if the connector (C) of this flash controller
When the flash device is not installed in position N5)
, the flash controller opens the line (north 2).
to avoid affecting signal transmission. Next, data exchanged based on 16 clock pulses is performed.
This section explains the data. In addition, the first clock pulse
The data of bopi1~. 2nd data b1 bit
, hereinafter b2. b3. ......, bl4, b
There will be 15 pits. First, the data content of each bit and the
Camera body, flash device and flash controller
The status is not shown in Table 1. Table 1 The 6 bits bo to b5 indicate whether the flash device is connected to the camera.
Outputs the data shown in Table 1 based on the clock pulse,
The controller reads this data sequentially. bO
bit is the flash device's power switch is closed
If so, a "1-Bah" signal is output. bl pic
1~ are the upper light emitting parts (R person R light) of the above-mentioned parent and child strobes.
(the larger one of
If it is set to 'LOW', otherwise °'l
-1-1i'''. The b2 bit is the main controller of the flash a device.
'High' if it is in a fully charged state, but it must be in a fully charged state.
If so, outputs a “Low” signal. Bit b3 is the dimming table.
If the display is done with a flash device, °“10.IZ
If dimming display is not performed, “Hioh” signal
Output. Bit b4 is reserved and will be used in future systems.
For example, automatic focus adjustment
When a light emitting part is provided for auxiliary light, that light emitting part can emit light.
It is considered to output a “'High” signal when the condition is reached.
available. B5 pin 1- identifies the system of this actual flow example.
This is data for
If it is a lash device, it will always output a “LOW” signal.
do. This is compared to flash devices currently available on the market.
When it reaches the full state, the line (0,9) r t rin”
14 inh ”m Kure*shoht/!There is one thing.
. If such a flash device is installed, the flash
The controller and camera body are all “I-Iigh°
’ signals, and such conventional
The flash MU and the flash device of the system of this embodiment are
This is a signal for distinguishing. For bits bO and b7, the fludge-L controller (f
f) reads the data from the flash device and
It is set in the controller (IV) and corresponds to the 1c data.
Flash data corresponding to the above-mentioned light emission mode determined in the same way.
output to the device lines (α2) and (α12). hula
The ti incoming signal read by the flash controller (ff) and
Actual flash mode signal determined from the set flash mode
is the line (α2). (12) is output. Table 2 shows the signals for this light emission mode.
show. Table 2 The flash device reads the light emission mode signals shown in Table 2.
If you understand this, the operation according to this light emission mode LC4 will be performed from now on.
Flash*i will be performed. Note that the flash device cannot store data up to bits bO-b5.
b6. Read data with bit b7
It looks like this. By the way, flash con 1 ~ mouth ~
between the connector (CN5) and the flash device and the camera.
Connector (CN9') located at the hot shoe position on the main body of the camera
A cable may be used to connect the flash device and the flash device.
, 1 in this cable is line (λ2), (cL3)
There are parasitic capacitance and impedance components between
. Therefore, at the timing of bit (b5), it becomes ``High''.
When the flash controller outputs 8 signals,
If it is not installed, there is no discharge circuit, so there is no charge to the parasitic capacitance.
The load remains accumulated and bit b6. b7 and
The flash device reads the “High” signal.
I end up. That is, if the flash device is hot on the camera body.
A single light source that is simply connected to the shoe via a cable.
In the case of light, bit b5 outputs a signal of ゛to1i (lb°')
J, this signal remains accumulated in the parasitic capacitance.
There are so pick 1~b6. b7, e.g. simultaneous flash mode.
The flash device is used as a signal to indicate flash mode or sequential flash mode.
If it is read at the wrong position, a malfunction will occur. So this system
In the system, bit b5 outputs the discrimination signal “LOW”.
This prevents parasitic capacitance from being discharged due to short circuits and causing malfunctions.
This is to prevent it from happening. For bits b8 to b15, the flash device is connected to the camera main unit.
If it is only connected to the body's hot shoe, see Table 1.
Flash Hill outputs the gator shown and converts it.
The camera body loads. If the flash device is
] - When connected to the camera body via rollers
The flash controller reads from the flash device.
Based on the taken signals bO to b5, the beliefs of b8 to I]15 are
The number is sent to the camera body via the 7 controller 1 and rollers.
It is also possible to read this signal, but in this case,
There are the following problems. i.e. flash controller
This may occur if a cable is placed between the flash unit and the flash unit.
cable and the circuit inside the flash controller 1-roller.
The signal is delayed. So, first, start from the camera body.
The clock pulse sent to the lash device is delayed and
When the clock pulse of the camera rises and the flash
There is a time lag between the time when it starts up in the device. stop
and check that the clock has started on the flash device.
and output the data. This data is
The signal is sent to the camera body via the shutter controller 1-roller.
Delayed as in the case of a clock. And a camera book
It will be read by the falling of tarotsuk on the body.
. However, the clock delay time and data delay time
The combined delay time is the start-up of the clock on the camera body.
The time from the beginning to the end is more important than the time between the mount and the camera itself.
will read incorrect data. Therefore, this system
The system flashes the data from the flash device once.
Read the controllers 1 to 0-ra, then read the flag 1 controller.
data is sent from the camera to the camera body. A flash controller is connected to the camera body, and this
Flash device on controller connector (CN5)
If not installed, the flash controller is B8
Do not output a signal to the line (incl. 2) between bits ~b15.
It becomes a high-impedance state and connects to the hot shoe.
data sent from the connected flash device to the camera body.
It is designed so that it does not have a negative impact on the data. Also, Hora 1
-Flash device in shoe and flash controller
is installed, flash controller 1-roller to b
6. Bit b7 indicates that multiple lights are emitting light.
Data 111 i II, ``10'', or ``oi''
is input to the flash device and the flash device is b8~b
Between the 15th pitch and 1-, the line (α2) and (α12) are connected.
No data is output and the state is high frequency beadance. And if the flash controller is both flash devices?
data based on the data read from the camera and the set flash mode.
Output at pin 1 of b8 to b15, and the camera body (V)
Read this data. Next, the data of pins 1 to b8 to b15 will be explained. b8's
Pip 1- is a mounting signal, which is output by the flash device.
If the power switch is open, it will be High.
Outputs the l+” signal.Flash controller 1-roller
output from at least one flash device.
With a bit of bo from the place! Input “l-1-1i” signal
If so, it outputs a signal of "l-1ight". The bo bit distinguishes the system of this embodiment.
If it is a signal and Flash II outputs it, '1'
-ow” signal is output, and the Franche controller
At least bit b5 from one flash device.”
L (If the signal of “IW” is read, 'L OW'
Outputs the signal. Are the blo bits in sequential light emission mode?
This is a signal indicating whether the flash device outputs data.
If so, the flash device is in parent-child flash mode.
If 'L OW' otherwise '+-+ +gh
Output No. 16 of Pa. On the other hand, since the flash controller outputs data
If there is, it will turn on “'LOW” when in sequential flash mode.
Outputs "'l-1-1i" signal when in external light emission mode.
Strengthen. The bit bll outputs a fullness signal. When the flash device outputs, if it is fully charged,
Outputs a light signal. flash controller
When outputting, attachment signals are input from two flash devices.
bit h2 from two flash devices if
The “l-1igt+” signal indicates both are fully charged.
If it is input, the signal of "') (high" in bit b11)
Outputs. Therefore, if one flash is 1ift.
LOW when the “cut light” signal is not input.
” signal is output.B12 bit is the flash device
When taking photographs using a device that emits light (flash photography),
Indicates that light has been adjusted to obtain proper exposure.
One point: fJFDc signal, which is output by the flash device.
If the flash device is displaying the completion of dimming,
outputs a “low” FDC signal.Flash control
If the roller outputs, at least one flash
LOW” FDC signal is input from the device at bit b3.
If it is, output a 'low' FDC signal.b1
Bits 3, b14, and b15 are reserved data.
Yes, even if the flash device outputs it, the flash controller
It also outputs a “low” signal when the roller 1 is output.
”. When the data exchange described above is completed, the flash
controller is in FC mode.
, then learn (QJ3). (QJ13) wait mode for pulse input (hereafter
This is called the lower waiting mode), and this transition is the line (α2
) is not fully charged if the flash is fully charged.
Then it becomes “low”. On the other hand, on the camera body, step #31 in Figure 2
from a flash device or flash controller.
Data of pins 1-b8 to b15 read in register IOR
Set the terminal (04) to the specified register and set the terminal (04) to 'LOW'.
”.Next, in step #33, the input terminal (I
Pl) various setting data (B ratio control mode, set exposure
Apex l direct TV on time! 1. Setting aperture value
value AVS, film on film container or set
Kanmaro's Apex I + tlSv, W) to each data
Capture the corresponding register. Next, in step #34
is the photometric circuit (LM) output BV-AVO (BV is the object
lli degrees, AVO is the apex 1st position at the open aperture value)
-D conversion and set this data in a predetermined register. Then, in steps #35 to #37, #18 to #2
Move to exposure control operation in the same way as step 0 (j
#80 if it is possible to determine whether the
If not, move to step #38.
do. A specific example of step #38 is flowchart 11-1 in Figure 3.
This is shown below. First, in step #210, the FCC signal is
When it is determined that the input is being made, the FDC display will be displayed.
to reset the full charge display and move to step #40.
Ru. -73, FDC display if FCC signal is not input
[Reset] ~ Determine whether the completion signal is input.
do. Then, if the charging completion signal is input, set the charging completion display.
If you haven't entered it yet, reset the fullness display and go to #40.
Move to step. In step #40, check 1-ta from the interchangeable lens.
10101010" is entered.
Ru. Then, if the check data is entered, #41
．． Calculation of step #42, if not input, #4
3. Perform the calculation in step #44. The steady light calculation I in #41 is shown in the flowchart shown in Figure 4.
The computation is performed accordingly. First, in step #101, (3v −AVO) +AVO+SV =EV −(1
) is calculated. However, EV is the apex of exposure value.
w4E exposure value. Then dew
Output III m mote is determined in step #102,
#103 for P mode (program exposure mode)
．． Moving to step 104, p-[:v=Av...(2) Ev-Av=TV=(3) (0<p<1
). Here, AV should be controlled
Open vagina, TV is an apex of exposure time to be controlled
value, p is the program constant, and the exposure is 1111EV.
To determine the distribution ratio between the aperture value and exposure time line.
This determines the program diagram.
Ru. The value of p can be determined at the time of design or manually set to a desired value.
Can be set to Then, in step #105, AV<A
When it is determined that it is VO, at step #10G,
Setting A va = A VOl, the following calculation is performed in step #107: EV -, A, va = Tv - (5). If TVO≦Tv, then T in equation (5)
Set V to Tva so that no warning is issued. On the other hand, if Tva > Tv, the exposure value is set with TVO as Tva.
A warning will be issued. Here 'lvo is turtle
This corresponds to the maximum exposure time that can be controlled by the main unit. If the AV calculated by formula (2) is AV≧AVO, then AV>
Determine whether it is an AVM. And if AV>AVM
Move to step #114, set Ava=AvM,
In #115, the calculation of equation (5) is performed. Then, if TV≦TvM, the fraudulent Tv@ by formula (5)
A warning is issued as Tva. On the other hand, if TV > TVM in step #116, TVM
is set as Tva, and an overexposure warning is issued. Here, TvM is the best exposure time that can be achieved with the camera body.
corresponds to In step #113, it is determined that AV≦AVM.
Calculated using equation (2) assuming that no warning is given when
Is A V is the aperture value for constant light photography Ava1 (3) formula
Let the TV of #1 be the exposure time Tva for ambient light photography, and
In step G3, calculate Ava−Avo=d Ava −= (4),
The calculated dAva is set as the number of aperture stages for steady light photography,
Ava, dAva, Tva data are respectively predetermined.
Set in register. In step #102, it is determined that the mode is not P mode.
Then, in step #115, determine whether it is in S mode or not.
Ru. Exposure control mode is S mode (exposure time priority/auto aperture)
When in dynamic control mode, set exposure in step #126.
EV - Tva = AV with time 7 vs as Tva
(6 calculations are performed. Then, in step #128, AV<
If AVO, use AvO as Ava and under, - warning will be issued.
On the other hand, in step #131, the AV
>If AVM, set AVM as Ava and issue an over warning.
The state is set such that the following is performed. Also, if AV<AVO, AV
>If not AVM, use the formula (6) in step #134.
The input V calculated in is set as Ava, and no warning is issued.
state and moves to step #163. It is determined in step #125 that the mode is not S mode.
Then, in the next step #140, determine whether it is A mode 6 or not.
Ru. And exposure 11J III mode is A mode (aperture
When in priority exposure time automatic control mode), step #141
Set the aperture value Avs in the aperture for constant light photography
The calculation of equation (5) is performed as va. SoL/T# 1
43 no step TVO> TV Tvo Tva
The underexposure warning is issued as #14.
In step G, if TVM < TV, set TVM to Tva.
An overexposure warning will be issued. TVO>
If you are unsure whether TV or dvM<TV, calculate using equation (5).
Warn that the TV that is displayed is the exposure time TVa for ambient light photography.
is not performed and moves to step #163.
. , P, S, M mode if not A mode (Hand! 11 settings)
constant exposure control mode), and at this time step #155
7=Avs, l”vs respectively A
va, Tva. Furthermore, EV −(7va+Ava
) = dv, and calculate the constant value k (film tolerance).
dv-re-ni-no-tosa is an under warning for
Warning, over warning when dv>k, - when ≦dv≦H
In this case, step #163 is assumed to be in a state where no warning is issued.
move to In step #163, the constant light Ill shadow aperture is set to 1tEA.
From va and open aperture value AVO, the number of aperture steps for constant light photography
d A va = A va - A VO is calculated and #42
Move on to step ① of calculation for flash light rope Akira. A specific example of step #42 is shown in the flowchart in Figure 5.
The following explanation is based on this flowchart.
To go. First, in P mode, AVO<3 (FN
o, equivalent to 2.8), AVC1=3, AVO≧3
In this case, set Avc1=Avo and roughly follow step #174.
Avc2 = 6 + (Sv -5) - (7)
Let's do it. Here, 6 corresponds to FNo. 8, and 5 corresponds to l5O1
Corresponds to 00. And if AVO2>AVM then AV-
Let A VO2 be A va2 if A VC2≦AVM
Leave the value determined by equation (7) as it is and proceed to step #171.
move to Next, the following calculation is performed: [Ev +1-6=Av-(8). Then, the AV calculated by equation (8) is
When the result of determination in #178 is AV>AVO2, A
vf=A VO2 and 4. And Avr+6≧Ev
When , 7vr=5, and Av4+6<Ev.
and data from the flash device are sequentially changed to the flash mode (or
If it is not parent-child flash mode), Tvf=7.On the other hand,
, if the sequential light emission mode signal is input, Avf-1-
Even if 5<[v, Tvr= (remains 3. Then
So, is the AV calculated by equation (8) AVC? <AV≦A
If it is va2, use this AV as the flash aperture Idi.
Avf, and the exposure time Tvf for flash b1 is 6.
Then, the process moves to step #204. At step #170, it is determined that there is no P'T need.
When the flash is installed @ (or flash
flash mode (or parent/child controller)
Determine whether the signal for (light emission mode) is input,
For sequential light emission mode, set the tuning limit exposure time TvQ to 6 (1
/60sec), -r if in sequential emission mode ()
#190 step with VA 7 (1/125sec)
to the top. At the #190 state, it is determined that the mode is A mode.
When setting aperture value AVS@AVf1Tv Q to Tvf
As a result, the process moves to step #204. #190 Ste
If it is determined that the device is not in A mode, set
If the exposure time TVS is Tvs>Tvn, TVf=Tv
Q, if TVS≦TVfL, then Tvf = Tvs
Ru. Check whether it is in S mode or not in step #191.
However, in S mode, perform the calculation Ev+1-Tvf-AV ・= (9), and if AV<AVO, convert AVO to AvflA.
If V > AY, then AV is Avf, ,A, vo<Av
If ≦AVM, then let the AV calculated by the 9 formula be Avf.
Proceed to step U#204. #19G step
If the mode determined by is M mode, change AVS to Av
f, move to step #204, and set dAvf-,A
, vr-AVO. Steady state of step #43 when no lens is attached
Specific examples of light calculation ■ and flash light calculation H in #44 are as follows.
This is shown in the flowchart of FIG. The following explanation will be given based on the flowchart shown in FIG. First, in step #220, perform the calculation 3v-Avn+3v=7v (10)
. Here, By-AVl+ is the photometric output, and Avn is the main
The aperture is not controlled by the example system and it
Manual 'C setting or specific aperture width
Pre-fixed interchangeable lenses, intermediate rings and bellows
, equivalent to the aperture value of pinhole photography adapters, etc. Next, in step #221, select M mode or other mode.
Determine whether the code is When the mode is set to Ml-mode, set exposure
Let 7vs between U and ¥ be the control exposure time lower νa, and Tva-
The calculation Tv (Tv in equation (10))=dv is performed. So
Then, when dv < -k, over warning, dv>k
When , an under warning is issued, -dv≦1(
When ≦dv, no warning is issued and #238
Move to the next step. In step #221, it is determined that the mode is not M mode.
In this case, it is called automatic exposure control mode. In this case, the TV calculated by equation (10) is Tvo<T
If V≦TVM, the TV calculated by equation (10) is
Assuming a, no warning is given, and if TV<TVO
The TV is set to Tva and an under warning is given.
, if TV > TVM, override l”VM as Tva.
- A warning will be issued. Then, in step #238, set dAva=Q and record
Warning as Ava so that a warning is issued when lenses are not installed.
Set the data and proceed to step #240. At step #240, it was determined that it was in P mode.
In fact, the TV calculated using formula 10) is TV ri6 (1
/60sec), set Tvf=6, and when TV>6, set Tvf=7 (1/125
sec), and in sequential mode, T vr= (3).
Then, the process moves to step #253. At step #240, it is determined that the mode is not P mode.
and step #245 to determine whether it is sequential mode or not.
. And if it is sequential mode, the synchronization limit exposure time TV4
= 6, if there is no sequential mode, 1-vα = 7 #24
Move to step 8. In step #248, it is determined whether it is A mode or not, and
If mode, Tvl' = T'v lice of #253
Move to step. On the other hand, if it is not A mode, the set exposure
7vs by determining whether the time TVS is Tvs≦TVα
If ≦TV, Q, TVS is 'l'vf, Tvs＞'Tv
If A, set TVQ to 7vf and move to step #253.
go Then, in step #253, set d A, vf.
O, and the Avf issues a warning that the lens is not attached.
Set the warning data so that the
go In addition, when using sequential flash mode, up to three flashes can be used.
Since the lash device emits light, the shortest exposure time is
Required for the contact (Sx-) to open and the three lights to emit light in sequence
The rear shutter curtain reveals its face after a time of 1-v = 6
(1/60sec) and must be in sequential light emission mode.
For example, the shortest limit exposure time is when the X contact 'GSx) is opened.
After the time required for 1*T to emit light, the shutter rear curtain is released.
The TV for cueing is set to 7 (1/125 sec).
. When the above calculation operations are completed, the process moves to step #45.
Check whether the full charge signal is being input from the flash device.
Determine whether Then, if the fullness signal is input, the fill signal is input.
Since rush photography is performed, it is better than flash photography.
@A vr, exposure time Tvf and flash device
The signal indicating the status (charging completed, dimming display) is displayed on the display unit (DP).
sent to. On the other hand, if the fullness signal is not input, the steady light
Since photography will be carried out, the aperture for constant light photography @ A va
The exposure time 7va and warning data are displayed on the display (DP).
sent to. And in steps #4B to #50, #
Whether to shift to exposure control operation like #18 to #20
#80 if you want to determine and switch to exposure control mode.
If not, go to step #55.
to move to. In step #55, the microcomputer (MCI> terminal (
04n and 〈06n are changed to ゛”@(gh).
Then, the NAND circuit (NA1>, AND circuit (AN
ll) becomes active, and data from the camera body becomes active.
In (α2), (Q, 12), flash device
The state will be transmitted to Then, the terminal (05) has a predetermined
Period 120 (e.g. 150μsec)” Hrg
h” signal is output, and this (No. 3 is the line (Q3)
, (13) to the flash device and flash controller.
data from the camera to the flash device.
This is the mode in which the data is transmitted (hereinafter referred to as CF mode).
It is determined that And the microcomputer (MCI) is directly
The aperture value for flash photography is set in the column input/output register IOR.
Avf is set and this data is output in series. Next
Set the film sensor Sv and mode data in the register IOR.
output the data in series, then calculate the focal length of the interchangeable lens.
The distance fv is set and output in series. and,#
At the G3 step, the terminals (04n, (06n) are set to "L"
ow” and move on to the next step #64. Next, based on Figure 7, connect the flash device and camera body.
Explain about data exchange. First, in FC mode
is the terminal (06> becomes 'Low', and the NAND circuit C
The output of NA1) is 1"F-1ight" AND circuit (A
The output of Nll) becomes “L OW” and the transistor
(BTI5) and (BTI7) are non-conducting.
. Therefore, the terminal (L2) is open. stop
When a clock pulse is output from the terminal (SCK),
, this clock pulse is an AND circuit (AN5), an OR circuit
The clock pulse is output through the circuit (OR3')
When 'Higb', the inverter (rN3)
The transistor (BTll) becomes conductive, and the line (including 3
) outputs a “High” signal, and the clock pulse
When the signal goes 'LOW', the inverter (INS)
The transistor (E3'r13) becomes conductive and the light
A 'LOW' signal is output to the pin (α3).
When in FC mode, serial data is sent from the flash device.
is input, but this switching transistor (BTI5)
, (BTI7) is non-conducting, so the line (including 2) is
When it becomes “light”, the transistor < B T 19)
It is conductive and the output of the inverter (IN7) is “Hight+”
When the line (incl. 2) becomes 'low', a trouble occurs.
The inverter (< 8719) becomes non-conductive, and the inverter (
The output of IN7) becomes 'LOW'. The output of this inverter (IN7) is an OR circuit (OR1).
The series input terminal (SIN) of the microcontroller (MCI) is
) from the microcontroller (MCI>). In the CF mode, the terminal (06) is
I linand circuit (NA1) and AND circuit <ANl
l) is in the active state. And the series output terminal
Data from (Sou) is passed through the AND circuit (AN9).
The signal “)(igll” is output.
and the output of the NAND circuit (NA1) becomes “'Low”
This makes the transistor (B T 15) conductive and the line
(Magazine 2) becomes '11 igl+'. On the other hand, the output of the AND circuit (AN9) becomes 'LOW' [
Then, the output of the AND circuit (ANll) is "' l-l
isu1) °' becomes and the transistor (8th block 17) becomes conductive.
The line (including 2) becomes 'Low,''. Return to flow 17-1- in Figure 2 again and turn on the microcomputer (M
The operation of CI) will be explained next. In step #64
Since the preparation for exposure control has been completed, set the discrimination flag JF1.
Set the content to “1” and #19. Same as step #20
, determines whether to shift to exposure control operation. and
Exposure system 9Ili! If you are moving to l1 work, #80
It moves to step and does not move to exposure control operation.
Then move on to step #10. In step #70, the photometry switch (Sl) is closed.
check whether the input terminal (11) is 'LOW' or not.
Discern. If it is LOW, go to step #11.
Return to and repeat the above operation. On the other hand, step #10
If the input terminal (11) is '@high' in the
Step to stop automatic focus adjustment circuit (AF) operation
, turn off the display on the display (DP) and set flag JF1 to '0''
and enables reception of interrupt signals from the terminal (11),
Set the terminal (01) to 'low' and connect the 1-herald resistor.
By making (BTI) non-conducting, the power supply line (+V)
The microcontroller (MCI) operates by stopping the power supply from
stop. When performing exposure control operation, proceed from step #80.
do the work. In step #80, the automatic focus adjustment circuit (
AF) operation. Next, connect terminal (04) to '
l-1ight”, the terminal (05) is connected to the terminal (05) for a predetermined time T3.
(e.g. 210 μsec > ”I-1tgh
” signal and sets the terminal (04) to ``1ow''. The flash device and flash controller are No. 18.
mode (hereinafter E) in which exposure control operation is performed by reading the
(referred to as S mode), and press the X button on the camera body.
Contact (Sx) closing signal is input from line (Island 1)
have a Next, in step #84, flash
Determine whether a fullness signal is input from the device,
If input, flash 1Ii1 shadow exposure control value T
v", dAvr through the output terminal (OPl")
The charge completion signal must be input to the control circuit (FCC).
For example, exposure control for constant light photography 1*Tva%d, 61Va.
The exposure control circuit (ECC) is connected via the output terminal (OPl).
). And when taking flash photography, use the #8G flashlight.
Check whether the sequential flash mode signal is being input by step.
If it is sequential emission mode, film sensitivity S
Output the analog signal corresponding to v from the terminal (ANO).
, Sv from the terminal (ANO) unless the sequential light emission mode is selected.
Outputs analog signals corresponding to -0 and 5. this end
The meaning of the analog signal from the child (ANO) is based on Figure 8.
This will be explained later. In step #90, the display on the display unit (DP) is turned off.
Then, set the terminal (02) to ")light". This activates the release circuit (RL) and exposes the
UJ Ij it! +The work begins. And aperture n mouth
is controlled, the reflective mirror rises, and its rise
When this is completed, the front shutter curtain starts running. When the shutter front curtain completes its travel, the X contact (Sx)
is opened and the flash fires when shooting with a flash.
be called. For details on controlling the amount of flash light emitted, see Section 8.
This will be described later based on the figures. And then the first curtain began to run.
After that, as the exposure time determined as described above has elapsed,
, the shutter rear curtain starts running, and the shutter rear curtain starts running.
When this is completed, the reflecting mirror moves down and the aperture opens. The switch (S4) opens when the above exposure control operation is completed.
The microcontroller (MCI) switches this switch (
S4) is opened and the input terminal (13) is
It is held in step #92 that it becomes h. and input terminal
When (i3) becomes ° “HD+h”, in step #93
Set the terminal (02) to “low” and turn the photometry switch (Sl)
is closed and the input terminal (11) is “LOW”.
Determine whether or not. And then it became “L 01”
If so, move on to step #11.
”, move to step #95 and set flag J.
Set F1 to 0'' to allow reception of interrupt signals to the terminal (it).
the power line (
+V) and the microcontroller (MCI) stops operating.
stop production. Next, a specific example of the light emission control circuit (FST) shown in Fig. 8
Explain the light emission control operation of a flash device based on
. In Figure 8, (PD) represents the camera's photographing lens and
The point at which the light that passes through the aperture and is reflected on the film surface is received.
The light receiving element (PD) is placed at
The force current is logarithmically compressed by the diode (Dll)
. Then, the analog output terminal (ANO) emits light sequentially.
3v when in mode, Sv- if not in sequential emission mode
Since the signals of 〇 and 5 are output, the operational amplifier (OA)
When the flash fires, the output is the subject of the flash fire.
Information on the intensity of reflected light from the body, control aperture value, and film sensitivity.
QV +SV −Avf or Qv + (S
v −0,5) −Avf. Here QV is
Logarithmically compresses the intensity of reflected light from a subject under flash illumination
This is the value. The output of this operational amplifier (OA) is
resistor (BT29) as its collector current.
This collector N current is connected to a capacitor (C1l).
It is integrated by Therefore, the integral role of the capacitor is
,? ", 12" dt/2 "'
Ukotonina 6° terminal (02) has 111111 operation.
This is the terminal that becomes “High” when starting.
When the terminal (02) of
The control circuit (A N 13) becomes active and the output is “
High+1". Also, °' from terminal (02) @
igh” signal is delayed by a delay circuit (DLI).
After that, D flip flop (TFI) and D flip
These are sent to the reset terminal of the 70 tube (DFl).
7 lip 70 lip (TFI), <DFl) reset
Cancels the cut state and makes it ready for operation. Therefore, this
Flip-flop (TFI), (DPI)
Tomo & CQ output 1fi “L GW” Te, Q output
ffi "Htgh"I'm in trouble. Terminal (IN
T) is the output of the inverter (IN7) in Fig. 7, and
This is the signal from the lash device via the line (O2)
. And this line (incl. 2) is turned off in ES mode.
If the rush is fully charged, until it starts emitting light °')l
When the X contact (Sx) is opened, 2.
“l OW” for 5m5ec, then 11IISe
C “)-1ight”, then 5.5m5ec 1
It becomes "low" and then becomes ")light". Therefore
, the output of the delay circuit (DLI) in FIG. 8 is '! -1ig
h”, the AND circuit (A N 15)
Output is 'LOW', output of inverter (IN9)
is “’thigh”, NAND circuit (NA3) (7) output
is °'High", and the output of the NAND circuit (NA4) is "
LOW”, the transistor (BT21) and the transistor
(B T 27) is conducting. Therefore, the comparator
The non-inverting input terminal of the converter (AC?) is connected to the resistor (R2/3).
The level is determined by the constant current source (Cr1), and these resistors
(R2/3) resistance value and constant current value are appropriate exposure level
It is set to generate a potential at a level of 10% of . Next, we will explain the light emission control operation sequentially starting from when the light emission mode is not.
I will clarify. When the flash starts firing, the AND circuit (A
The output of N13 becomes 'Low' and the NAND circuit
The output of (NA4) becomes “High” and the transistor
Transistor (BT27) becomes suspicious, ]-transistor
The collector current of BT29) is multiplied by the capacitor (C11).
divided. In this case, from the analog output terminal (ANO>
Since the signal of SV -0,5 is output, Z"v-52Qvdt/zAv+ -zas brightness (7,7
・2", 52"dt / ZAv+= Rti =
0.78...(11) (K: Constant value corresponding to proper exposure
), the output of the comparator (Ac1) is “l-
1-1i” and from the one-shot circuit (O81)
°'l-1ight" pulse is output, and this pulse
is output to the line (α3) through the circuit shown in Figure 7, and the flag is output to the line (α3).
Flash emission stops. Equation (11) is
The flash fires until the proper exposure is achieved.
become. After this, the circuit of Fig. 8 is connected to the terminal (INT).
The operation described below is performed based on the signal, but the mode is sequential light emission mode.
It does not affect the C flash emission. In the sequential flash mode, the operation of the first light emission amount is as described above.
It is done in the same way. However, at this time, the analog output
Since the SV signal is output from the terminal (ANO),
, zAv5g ... (13) 52"dt = O7zs-, and the light emission amount is 'f2'dt is '70 of the proper exposure amount.
%become. The terminal (INT) changes from °'L OW' to 'H
When you stand up to “high”, you can flip T-flip 70 (TFl).
) inverts the output °(Q output is 'l-1-1i'
, (1:i output becomes '1-ow'. On the other hand, D flip
The flop (DFl) is the comparator (A
Cl ) output and the first light emission amount is appropriate exposure.
If the Q output reaches 70% of the
The output becomes °'1-ow''.The light emission amount of the first lamp is at the appropriate exposure.
If the light does not reach 70%, the comparator (Ac1)
Since the output remains 'LOW', it is a D flip-flop.
(DPI) Q output is “LOW” and 0 output is “)l”
tgh'' remains.The first light emission amount is appropriate.
When the exposure reaches 10%, the NAND circuit (NA3)
Since the output remains “HiQh”, the NAND circuit (NA4
) output after the terminal (INT) becomes Htgh”.
' L 0 after a certain period of time using the delay circuit (DI-3)
11+”, and 1 to transistor (BT27) are conductive.
The integrated charge of the capacitor (011) is discharged. on the other hand
, if the first light emission does not reach 70% of the proper exposure,
The output of the NAND circuit (NA3) is inverted to "L-OW"
Ru. Therefore, the output of the delay circuit (O12>
”, the output of the NAND circuit (NA4) is “T1”.
remains “high” and the transistor (BT27) does not conduct.
First, the integrated charge of the first light is maintained by the capacitor (C11).
It remains held. When the first light emission amount reaches 70% of the proper exposure, the
The output of the code circuit (AN15) is "l-1tgh",
The output of the inverter (IN9) becomes “LOW” and starts.
The transistor (BT23) becomes conductive and the converter (AC
The level of the non-inverting input terminal of l> is equal to the resistance (R1/3)
The level is determined by the constant S flow source (C1l). This resistance
The resistance value of (R1/3) is constant current of 1 (C11).
C to produce a potential of 30% of the proper exposure. −
If the exposure does not reach 70% of the proper exposure, the Nando circuit (
The output of NA3> becomes “low” and 1 range.
The star (BT25) becomes conductive. This allows the comparator
The level of the non-inverting input terminal of the resistor (R1
) and constant current i<crt), and the resistance (
The resistance of R1) is appropriate with the current of the constant current source (C11).
It is designed to generate a level of potential that corresponds to exposure.
. Therefore, the non-inverting input terminal of the comparator (8C1>
is applied with a voltage corresponding to the appropriate exposure level. and
, when the second light starts emitting light, the terminal (INT) is "'"
LOW” and the first light has reached 70%.
If the transistor (B T 27) becomes non-conductive again
Therefore, the collector current of the transistor (B, T2O) is
It is integrated again by the capacitor (C11). On the other hand, the first light
When the amount of exposure due to light emission does not reach 70% of the appropriate exposure
, the transistor (BT27) remains non-conducting.
Therefore, the con answer (C11) is based on the first light emission.
Integrate so that the integral charge of the second lamp is added to the integral charge.
. The exposure from the first light is the condition for proper exposure.
A light emission stop signal is output, and the light emission amount of the second lamp is at the appropriate exposure.
In this case, the ratio of the amount of light emitted by the first light and the second light is
is 7:3, and the sum of both sold light m gives the proper exposure. on the other hand,
If the first light emission amount does not reach 70% of the appropriate exposure
(, (2Qv+ + zQve), 1t= standing・
When bar-(15)Sv is reached, the second light emission stop signal IFa is output.
. Therefore, in this case, the ratio of the amount of light emitted by the two lamps is limited to '7=3.
Although it cannot be controlled, proper exposure can be compensated by firing two flashes.
It will be done. Note that if three lights emit light in succession, the second light will start emitting light.
After the time required for the second light to fully emit light (2.5m)
5ec#&) The third light emits light. At this time, the terminal (I
NT) remains “'LOW”, so the con answer (C11
) is continued; for example, in the case of two lamps emitting light,
If the proper exposure is not achieved, the third light will emit a line.
A light emission stop signal may be output to (North 3). deer
However, this flash stop signal is sent to the third flash device.
As shown in Figure 1, there is no transmission, and the flash device has 3 lights H.
emits light every meter determined by its flash IAI. In addition, the first and second flash devices output FDC signals.
For power use, only for 2.5m5ec after the second light starts emitting light.
Luminescence)? Accepts a positive signal and emits light for light emission m control.
2.5m5ec after the flash device starts emitting light
The 3rd light is designed to receive a light emission stop signal.
The light emission stop signal caused by the flash of the first or second light H
It will not affect the system and cause malfunction. Next, a specific example of the flash device (I) shown in FIG. 1 is shown in FIG.
Figure 10, Figure 11, Figure 12, Figure 13, Figure 14.
I will explain based on this. Figure 9 shows the control circuit (FLC
This is a specific example of (l). terminal (FC mode from α3)
, OF mode, [rlJ pulse indicating S mode, data
The clock pulse for transmitting and receiving data and the pulse for stopping light emission are input.
When the terminal (α3) becomes “@high”, the
The resistor (BT31) becomes conductive and the inverter (INII
) output (p3) becomes High”.Mode discrimination circuit
(T'I C> is 'Higli' of this terminal (p3)
Detects “No. 11” and controls the operation of the flash device.
Ru. Next, we will discuss the specifics of the mode discrimination circuit (TIC) shown in Figure 10.
The discrimination operation will be explained based on an example. The terminal (pl) is
The X contact (Sx) is opened and the line (see 1) is connected to the ground voltage.
When the transistor (
BT39) becomes conductive, “' @ igl+
”, FC mode, CF7-Code, E
Indicates S mode + iJ pulse and data transfer clock
When the clock pulse is input, it becomes “L OW”.
and the output of the inverter (IN19) is 'High
”.The terminal (p3) is “l-1-1i”.
Then, the output of the AND circuit (AN43) is Higl, I
rises to I, and from the one-shot circuit (O8, 3)
-l-1i” pulse is output and the counter (COl
) is thereby reset to 1~, and then the microcomputer (MO
2) from the reference terminal (CKO) (φ2
) starts counting. Also, the pulse from the one-shot circuit (083>)
7 lipflops (FFI) to (FF7) are set.
It will be done. Decoder that inputs the signal from the counter (COl)
terminal (τ1) of DEO. From (τ2), (τ3), and (τ4), the count starts, respectively.
60μsec from the beginning, 120μsec 1180μs
ec. A pulse is output after 240 μsec. Therefore, free
The flip-flop (FFI) is eo, c from the start of counting.
B bit state during z sea, (FF3') is 120μ
sec, (FF5) is 180μsec, (FF7)
remains set for 240 μsec. Therefore,
AND circuit (AN45) is 60μsec to 120μsec
active state during c, <AN47) is 120 μs C ~ 18
Active for 0μsecC, (A N 49) is 180μ
It becomes active for sec to 240 μsec. And the one-shot circuit (035)
Since it outputs a 'Htgh' pulse at the falling edge of the
, if the potential of the terminal (O3) falls in 90μSec,
The pulse from the one-shot circuit (085) is an AND circuit
(AN45) output from the flip-flop (FF9
) has been set from 1 to 1, and the terminal (FC) is 1111Jll.
”. On the other hand, the terminal (O3) turns on for 150μsec.
If it goes down, the pulse from the one-shot circuit (085) will be
Output from the AND circuit (A N 47) and flip 7
The 0 knob (F F 11) is set and the terminal (CF) is
becomes “'H+(ill”).Furthermore, the terminal (O3)
falls in 210 μsec, the one-shot circuit (
The signal from 085) is output from the AND circuit (ΔN49)
and the flip-flop (F F 13) is set.
, the terminal ([S) becomes “g1i(lh”).CK 15
, the clock pulse is output from the AND circuit (AN43).
and the output from the one-shot circuit (083>, (085))
In this case, two pulses are output.
The interval between flip-flops is much narrower than 60μsec, so the flip-flop
Conditions of lop (FF9), (FF11), (FF13)
has no effect on When the terminal ([C) becomes "Hi gl+"', the counter
The relay 1~ state of the data (CO3) is released and the decoder (
DEL > becomes ready for output. and press the counter (
CO3) is the clock pulse for data exchange from the terminal (O3).
Inverter (l N 21) 0 inverted No. 13
Color the falling edge of the clock pulse, that is, the rising edge of the clock pulse.
Turn+-. Then, the decoder (DEl) is the counter
Each time the content increases by °“1”, the terminal (r(1) ~ (N5
) is outputting the month to 'l-l igl+'.
Ku. That is, the output of the counter (CO3) is "0 (101
” then (“0)” is “I-1+S11”, “0010°”
If (tl) is 'Higl+', '1000'
If (fl) is ′“+−+ tgh ′,”1001”
If (f8) is I-1ight ++, “1111”, then (f
14) is “Hight” and “0000” (fl5)
becomes "l-l igl+". il (1) Faith
Used for control of sending and receiving code data. moreover
When the terminal (fl5) becomes 111g1+”, the AND circuit <
AN44) becomes active, and the inverter (IN21)
The signal from is output. And the inverter (IN2
1) The rising edge of the output, that is, the 16th rise in FC mode
The one-shot circuit (O
A pulse is output from 84), and the rising and falling edges of this pulse
The one-shot circuit (O86) is triggered and the pulse is
is output, and the flip-flop (Fi:9) is reset to 1
~, the terminal (FC) becomes “low” and the timing mode is activated.
It becomes C. Also, the terminal (C") becomes "G1+gh".
When it becomes CF mode, the counter (CO4)
Relen 1-state is released and decoder (DE2) is output.
becomes available for power. And the counter (CO4) is in
Count the clock pulses from the converter (IN21)
, after counting 24 clocks (3 bytes),
The output of '11000' is output from the decoder (D[E2
) terminal ((123) becomes "l-1iqh n
. Then, the AND circuit (, AN46) becomes active.
The signal from the inverter (IN21) is output, and 24
The falling edge of the second clock pulse, that is, the AND circuit (A
Is it a one-shot circuit (088) at the rising edge of N46)?
A pulse is output from the
A pulse is output from the shot circuit (OS 10). So
And the pulse from this one shot circuit (OS 10)
The flip 70 knob (F F 11) is reset.
The terminal (CF) becomes 'Low' and the timing changes from OF mode.
mode. The terminal (ES) becomes “'l-1-1i”.
When in ES mode, the rear of the shutter on the camera body
When the X contact (Sx) is opened after the
The transistors 1 to BT39 (BT39) in Figure 9 are non-conductive and the terminals
(pl) is “'Low”, inverter (I N
19) output becomes +-+ +gh” and one shot
]・A pulse is output from the circuit (O8γ). This is it
So, the Noritsubu flop (F F 13) is a rellel~
The terminal (ES) becomes LOW” and the mode is set.
Ru. Returning to FIG. 9, (FTCI) shown at the bottom right is a light emission amount control circuit, and this circuit (FTCI) is a light emission control circuit.
A specific example of CI) will be described later based on Figure 11.
Ru. Also, (MC2) is a microcontroller.
For the operation of 2), refer to the flowcharts in Figures 13 and 14.
This will be explained later based on the following. In period mode, the mode
terminals (FC), (CF>, (E) of the code discrimination circuit (TIC)
S') has a c"l-ow" tear, and then the terminal (fO
) ~(r15) has also been changed to “shiOW”
Therefore, the outputs of the NOR circuits (NO3) and (NO5) are High.
h”.As will be described later, the light emission It It,
II 111 circuit (FTCI) (7) Output (I N
S) C, the fully-filled srx contact (Sx') is opened.
And, until 2.5m5eclliI elapsed, ' L
OW” and then 1 m5ac “l-1”
-1i”, and furthermore, between them 5.5m5ea-
゛L 0WII and for another 5 m5ec
gh”, and Ishitoshi remains in a state of “OOW”. The signal from this terminal (rNs) causes the X contact <SX> to open.
and the output of the AND circuit (AN24) is in the full state.
OFF circuit (OR2) after being forced to LOW
via the command circuit (AI”J21) and the OR circuit (OR5).
is output, and the AND circuit (A N 18) and the AND circuit
The transistor (8T
35, (8T37) Nyote terminal (2) has a terminal (
INS) is output. Regardless of the time of year
For example, the AND circuit (AN24) outputs AND in the fully charged state.
If the output of the circuit (AN33) is ``High''
A signal is output, and if it is not charged, "l cow? = i"
? : @ is out of output. And if it is in full state, the trans
The transistors (BrO3) and (BT35) become conductive, and the line (
α2) is output with l-(high” signal, indicating that it is uncharged.
The transistors (BrO3) and (BT37) are conductive.
A “LOW” signal is output. When the FC mode is entered, the end of the mode discrimination circuit (TIC)
The child (FC) becomes “”)lig++” and Noah times.
The output of the circuit (NO5) and the output of the AND circuit (AN21)
The power becomes 'Low'.The end of the mode discrimination circuit (TIC)
When the child (fO) becomes ')-1ight'', this It number becomes
The output of the OR circuit (OR7) and (OR5) is
” outputs a “Higli”° signal to the terminal (North 2nd).
Strengthen. This No. 18 is the signal of bit bO in Table 1 above.
, that is, it becomes a mounting signal. Edge of mode discrimination circuit (TiG)
When the child (“1”) becomes °“)−1ight”, the AND circuit
(AN 29) becomes active, and the flash in Figure 1
The light emitting part (FLO2) of the module m(1) is in a bounce state.
If it is, the switch (SB1) is opened and the LOW
” switch (8131) if the signal is not in the bounce state.
is opened and the signal 'lligh' is sent to the AND circuit (A
N29). Therefore, ynd times N (AN29)
” +7) signal is output, the AND circuit (A
The output of N18) is l-1+Oh u-AND circuit (AN
The output of 19) becomes “Low” and the 1-transistor
(BTJ13 and (BT35) are conductive and the line (including
2) has the “@igt+” (7) signal output.
Ru. On the other hand, the "LOW" signal is passed through the AND circuit (AN2
9), the AND circuit (A N 18)
Output is 'Low', output of AND circuit (AN19)
The force becomes “' @igl+ ” and the transistor (B
rO3) and (BT37) are conductive and the line (north 2) is
'LOW' signal is output.This signal is shown in Table '1.
This becomes the parent and child signal of bit b1 of . Mode discrimination circuit (T
I
The draw path (AN31) becomes active. This causes the signal from the AND circuit (A33) to be output.
be done. The AND circuit (AN33) is the flash unit shown in Figure 1.
Two main condensers (CI) of Maff (1)
, (C2) reaches a predetermined value and the charging completion is detected.
(CI-IDI), (CI-ID2) output is 8
When it becomes “'Hiot+”’, it outputs a “Hi9h” signal.
Power is strong. The output of the AND circuit (AN33) is shown in Table '1.
Pi 1-b2, that is, the full line as No. 1g (incl. 2)
is output to. Need discrimination circuit (TIC) terminal (r3
) becomes I-1igl+'', the AND circuit (AN3
5) becomes active, and the dimming completion indication circuit (INF) (
The details will be described later with reference to Figure 12).
The C signal is connected to the line (α2) with the pin 1-b3 signals in Table 1.
is output. Therefore, the mode discrimination circuit (TIC)
When terminals (f4) and (f5) become “High”
In this case, terminals (f4) and (f5) are not connected to anything.
Therefore, the output of the OR circuit (OR5) is LOW''', and
The output of the circuit (AN 19) is +-+ +gh
The power circuit (ANlg) is 'Low' and the
The transistors ([3T81) and (BT37) are conductive, and the
A "LOW" signal is output to the input (α2). this
As shown in Table 1, bit b4 is a spare timing
bit b5 does not indicate this system.
This is a discrimination bias. Terminals (f6), (f7) of mode discrimination circuit (Tic)
is l-1-1i", the output of the NOR circuit (NO3) is "
LOW”, AND circuit (A N 18) and
The outputs of the AND circuit (A N 19) are both “L”
OW”. Therefore, the transistor (BT35) and
(B T 37) becomes non-conductive and the line (QJ2
) according to the signal input from the 1-transistor (B
T33) becomes conductive/non-conductive. And this
As explained in Table 1, at the timing of
The light emission mode signal determined by the controller is input.
Ru. If the line (O2) becomes “'l-(igh”)
The transistor (BT33) becomes conductive and the inverter (I
The output of N13) is on the line (α
If 2) is “OW”, the transistor (BT33) is non-conducting.
As a result, the output of the inverter (IN13) is °' L
(IW"). The terminal of the mode discrimination circuit (Tic) (
f6) is “l-1-1i”, the AND circuit (AN25
) becomes active and the clock pulse from terminal (p3) is activated.
(7th pulse) is output, and the falling edge of this pulse
Is the D flip 70 knob (OR3) the terminal (p2)?
Latch the bit 1)6 signals. and mode determination
The terminal ([7) of the circuit (TIC) is
Sometimes the AND circuit (AN2γ) becomes active and the terminal
The 8th pulse from the child (p3) is output and the D flip
flop <OR5) is the bit b7 from the terminal (p2)
Latch the signal. Flip 70 tube (OR3) and
The data latched in (OR5) is sent to the microcontroller (MC2)
input terminal (ill). (i12) and determines the light emission state according to the light emission mode.
be done. In addition to this flash device (1), there are also other flash devices.
As explained in Table 1, if the Shush Vi fat is installed.
At least one of bits b6 and b7 is "' H
igl+”, so the OR circuit (OR8)
The output becomes “Hight” and the AND circuit (AN23)
The output is mode discrimination times! (TIC) terminal (f8
) to (f15) are 'High'.
h” and the output of the NOR circuit (NO3) becomes 'L OW
'', no signal is output to the line (affected 2).
. In this case, either simultaneous flash mode or sequential flash mode as described above.
This is the light emission mode, and the signals of bits b8 to b15 are flash.
output from the controller to the line (λ2) and the camera
It is read by the main body, and during this time the transistor (BT35),
(8Tγ) remains non-conducting, and the flash control [1-
It will not become a barrier for data exchange between 5 and the camera body.
. The flip 70 knobs (OR3) and (OR5) are latched.
If both signals are ``OW'', the flash device is 1
Only one V: is connected to the camera body. this
In this case, OR circuit (ORB), AND circuit (AN23
) output is 'Low' and is the output of the NOR circuit (NO3)
becomes °'High'', and the AND circuit (A N 18
) and the AND circuit (A N 19) are active, and the line
It is now possible to output data to (Sad 2). The terminal (t8) of the mode discrimination circuit (TIC) is °'Hia
h", this °'l-1ight" signal becomes OR.
-C is output through the circuit (OR9), and in the same way as above.
, the 'l-1-1i' signal is output to the line (including 2).
It will be done. This is the necking signal of bit 1)8 shown in Table 1.
Ru. When the terminal ([9) becomes “High”, the A
Since the output of the circuit (OR9) is "LOW", the line (
II) becomes LOW"'. This is the discrimination signal for pins 1 to b9 shown in Table 1. When the terminal (rio) of the mode discrimination circuit (D IC, ) becomes LOW"'
-1i+°', the switch (SBI) is open
The jfG number is an AND circuit (ΔN37), an OR circuit (O
R9) and is output to line <92. child
This is the sequential light emission signal of bit blo in Table 1, and the light emitting part
(If PLO2> is in the bounce state, it will emit light sequentially.
The line (O
2) becomes “'LOW” and the camera body sequentially switches to the light emitting mode.
mode (or parent-child light emission mode). Mo
The terminal (fll) of the code discrimination circuit (TIC) is l-1-
When it reaches 1i”, charging from the AND circuit (AN33) is completed.
The signal is AND circuit (AN39), :4A circuit (OR9)
) is output to the line (A2 line). By the way, the 7-lip 70-tub (FF2) is a mode discrimination circuit.
(TIC) terminal (FC) becomes 'l(ihg)'
As a result, the pulse output from the one-shot circuit (O82)
It has been removed by the user. Single light emission mode
In the case of
When (BT35) is made conductive, the transistor (BT33)
conducts and the terminal (O2) becomes ``high''.
In this case, the AND circuit (AN20) remains 'low'.
7 lip-flop (FF2) remains in reset state.
Ru. Therefore, the output of the NAND circuit is "H+g++",
The AND circuit (AN22) is activated and the terminal (pl)
transmits the light emission start signal from the light emission IM control circuit CFTC1).
Reach. On the other hand, if charging is not completed, the transistor
(B T 37) is conductive and the line (Hiro 2) is “L”
OW”, but this causes 1 to transistor (BT3
3) becomes non-conducting and the terminal (O2) becomes “L OW”.
Become. With this, the flip 70 knob (FF2) is set.
The output of the NAND circuit (NA5) is the terminal (ES)
) becomes Haku (+gh”, it becomes “'LOW”, and
The circuit (AN22) becomes disabled and the terminal (pl)
The light emission start signal is output, and no flash light emission is performed in C. Therefore, the completion message sent to the camera body using PIL-1111
Whether the flash device itself emits light based on the
After the decision was made, the camera body was charged using the pin 1-bll.
Completed (Whether or not to perform flash photography based on FFI issue)
The system does not malfunction because it determines whether the When in multi-flash mode, the flash device is set to bits b8-b.
The signal of 15 is not output, but the flash controller 1~roller is
As described below, make sure both flash devices are fully charged.
If it is ``Hight+'', it is low (if one side is fully charged)
If not, send a “L 0WIT” signal to line (Q, 2).
Output file. This signal is then converted into a full signal on the camera body.
However, even in flash devices, the
It is read by the flip-flop (FF2) and whether it emits light or not.
is determined. Also, the output to the flash device line (α2) is “
The output current that outputs the signal “G11g11” is LO.
The input current is less than the input current when outputting the W'' signal.
ing. That is, there is a difference in impedance. child
This structure is used to perform the following operations.
It has become a reality. That is, each of two or more flash devices
Prepare a connector that connects the terminal to the camera body in parallel,
A adapter for multiple flash units to fire each flash device at the same time.
I think it's possible. When connected like this, the terminal
(rti) becomes °“High'” and sends a full charge signal.
At least one flash device is full when printing.
If not, at least one flash device is in trouble.
The resistor (BT37) becomes conductive and the inside of other flash devices
Even if the transistor (BT35) is conductive in
The current from the resistor (BT35) is passed through the constant current circuit (C110
) and transistor (BT83) to maintain constant current U1
is limited, so the transistor (BT35) is conductive.
Even if this output current is
It flows into the transistor (BT37). Therefore
, in which flash device is the t-transistor (BT33) located?
However, there was no conduction, and the flip 70 tube (FF2) was closed.
1- flash device connected to the connector for multiple flashes.
cannot emit light. The terminal (f12) of the mode discrimination circuit (DIN IC) is 'l-
When it reaches "l tgl+", the dimming completion display circuit (I N
The signal from F) is an AND circuit (ΔN41) and an OR circuit.
It is output to line (include 2) via (OR9). These are FDC indicated by Hira 1-b12 in Table 1.
(No. 3, which is read by the camera body and flash device
Used to indicate the status of Mode discrimination circuit terminal (f
13), (114), (1N!'i) is "l
-l igl+°' is the output of 21 circuits (OR9')
is °' L OW" and the line (α2) is 'l-ow"
bits b13, b14 of Table 1
, As shown in b15, the pre-order pitch is 1-.
Ru. Next, the light emission control operation in ES mode is shown in Figures 9 and 11.
Therefore, I will explain. The X contact (Sx) of the camera body ■ in Figure 1
) is opened and the terminal (pl) becomes “'@igh”
At this time, the flip-flop (FF2) becomes a relay.
If the state is set, the NAND circuit (NA5) is 'High
h” signal is output, and if it is roughly fully charged, the AND rotation is performed.
The output (FSA) of the circuit (AN22) is “+-+ i9h
It becomes n. This results in the one-shot circuit shown in Figure 11 (
089') outputs a pulse of l-1-1i'', and
The pulse causes a flip through the 21 circuit (OR13).
The flip flop (F F 15) is reset and the flip
70 whelks (FF17). (F F 14) is activated and flips
The Q output of the flop (F F 14) is l-l tgh
”, the counter (CO5) will be sent to Reset 1.
The state is released, and the decoder (D E 3 , > is also output).
becomes available for power. The decoder (DE3) has a terminal (p
2.5m5ec from T where l) becomes “High”
When it exceeds 3.5, it outputs a pulse of “@high” and
After m5ec has elapsed, the terminal (τG) will switch to “ligt+”
It outputs a pulse of
7) outputs a pulse of -”Htgh” and reaches 9 m.
After 5ec, the terminal (τ8) becomes empty “High” 0
) pulse is output, and when 11m5ec elapses, the terminal (τ9
) outputs a 'High' pulse.
The Q output of the lip 70 tube (F F 15) is connected to the terminal (pl
) becomes +-+tgh'', 2.5m5ec
Until °'L OW", (pl) is "+
-+ igl+ “Howdy 2.5+n5ec ~3
, 5m5ec with "l-1-1i", 3.5m5ec
“Low” roared again during -9m5ec, 9m5
After ec has passed, it becomes +-+ igh ++ again and becomes 1
After 1n+sac has passed, the state becomes "low" again.
. This Q output is connected via the terminal (INS) to the -C
input to the circuit (OR2). At this time, the terminal (pl)
By becoming 'l-l right', you are in a state of completeness.
Even if the output of the AND circuit (AN 24) is 'L OW
” and from the 21st circuit (OR2) is the terminal (INS)?
These signals are output. If in ES mode
The output of the NOR circuit (NO5) is 'l-1igt+'
The previous signal is output as is from the C AND circuit (AN21.) of
It is output to line (λ2) in the same manner as the signal described above. child
The signal is transmitted to the camera body based on Figure 8 (as described above).
It is used as a signal for controlling the amount of light emitted. line(
93) to the camera body that does not output a pulse indicating the mode.
, when this flash device is installed, the terminal (ES
) is “L OW”, so when it is fully charged, the terminal (+
) “Higb” from 1) is output to the terminal (FSA)
and emit light. Figure 9 (#q i J n (MC2) +7) end 7 (
013) As described below, use the first light mode in the sequential light mode.
This is a terminal that becomes “light” when the
011) becomes I-l-1i” in parent-child flash mode.
This is the terminal for Terminal (012) is after sequential light emission mode χ゛
This is the terminal that becomes 'I'igl+' when in light emission mode.
be. (010) is the same! J: 1B light mode or 1 light emission mode
This is a terminal that becomes °' High+1 '' when
(014) is 'l-l i when in automatic light control mode.
gh”, 'low' when in manual setting mode
This is the terminal. In Figure 9, (FLD) indicates automatic dimming mode and manual setting.
This is a circuit that outputs the signal of light emission m in constant mode,
This circuit (FLD) output terminal (el), (C2) and
Output terminal (di) of the decoder (DE!i) in Figure 11
, ((+2>;((13> and light emission mode, light emission
Table 3 shows the relationship between amounts. Table 3 As is clear from this table, only 1/2 of the total light is emitted.
When the decoder (DE5) (7) 1st child (d2)
Tri, l, 11 transistor (B T 43)
is conductive. The light emitted from the light emitting unit (FLO2) is then
The light is directly received by a phototransistor (PTl), and this phototransistor (PTl)
The output current of the phototransistor (PTI) is
OR circuit (OR21) to make FLO2) emit light.
When the output becomes "'l-1igl+", OR circuit
When the output of (OR20) becomes 'Low', a transition occurs.
The star (ST45) becomes non-conductive, and the capacitor (C15)
) is integrated. And the integral voltage of capacitor (C15)
When the pressure exceeds the potential determined by resistors (R5>, (R7))
The output of the comparator (AC3) is “l-111Jh”
Invert and send “@ig” from the one-shot circuit (0811)
h" pulse is output, and this pulse stops the light emission.
Ru. Connect the terminal (d
3) becomes “tl igt+°゛” and the transistor (
ST41) becomes conductive. Then, go to Fu A1.
The output current of the capacitor (PTl') is
Integration is performed by a capacitor (C13) with half the capacity.
be done. Therefore, the light emission stop signal is sent to the terminal (d2) at l-1.
The amount of light emitted is half that of the case of “-1i+”.
,White! In the case of ll dimming, the terminal (dl) is l-1-1
i'' and 11 circuits (OR20) are 'll right'
The I-transistor (ST45) became conductive.
It remains as it is, and the one-shot circuit (0811) emits light.
No stop pulse is output. First, the operation of parent and child light emitting [-] will be explained. In this case,
The terminal (011) of the icon (MC2) is “l-1-1i”
It becomes O.7 circuit (OR15). (OR17), (OR19) output is 'l-1-1i'
It has become. Therefore, at this time, the X contact (SX) is
Kaisei Te 2, 5 WASeC Questions and Circuits (AN51)
The output of becomes 111g1+”-(, 11 circuits (OR2
The output (ST2) of 1) becomes °“)-11gh” and the
The light part (PLO2) emits light. During this flash, the auto-adjustment
In optical mode, the AND circuit (ΔN65) is active.
Yes, the terminal No. 1G stops emitting light from the camera body (p3)
If the signal is input through the AND circuit (ANG5
), to the terminal (SF3) via the OR circuit (OR25)
It is output and stops the light emitting unit (FLO2) from emitting light. hand
In the active setting mode, the AND circuit (AN(33) is active)
status, and - output from the one-shot circuit (0811)
The optical stop signal is output from an AND circuit (AN (33)) and an off circuit (O
R25) is output to the terminal (SF3), and the light emitting part (
Float the light emission of FLO2). Next, the X contact (SX)
3.5m5ecl since opening! 61 from the time
Until sec elapses, the AND circuit (AN55)
The output (ST1) becomes +-+ +9h a, and the light emitting part
(FLOl) emits light. and auto dimming mode.
The terminal (014) of the icon (MC2) is 1i911°
°, the light emission stop signal from the terminal (p3) is
It is output from the circuit (AN67) to the terminal (SPl), and the emitted
The light emission of the light section (FL, 01) is stopped. On the other hand, the hand
In the dynamic setting mode, the microcontroller (MC2) terminal (0
14) is “low”, so is it an AND circuit (AN67)?
The light emitting part (FLOl) does not emit light and the positive signal is not output.
is fully emitted. Also, in this case, in automatic dimming mode,
If there is, the second light emission stop signal from terminal (p3) will be sent.
AND circuit (AN61>, OR circuit (OR23), AN
It is also output via the code circuit (AN69) and is output to the terminal (FDS).
The signal is input to the dimming completion display circuit (INF) via. When in simultaneous flash mode or single light flash mode, the microphone
Terminal (010) of <MC2) is 'l-11g1l
'', and the output of the OR circuit (OR1?) becomes 'f(high
''. Therefore, after the X contact (SX) opens,
．． The output of the AND circuit (AN51) is up to 5m5ec.
becomes “1-Ii (Jll”), OR circuit (OR21)
The output (ST2) becomes "+-++oh". to this
J: So, the light emitting part (FLO2) emits light and the automatic light control mode is activated.
If it is a mode, the emission input from the terminal (p3) during this emission is
The optical stop signal is transferred from the AND circuit (AN65) to the OR circuit (O
R25) is output to the terminal (SF3), and the light emitting part (
FLO2) is stopped from emitting light. On the other hand, manual setting mode
If the code is the pulse from the one-shot circuit (0811)
However, the AND circuit (AN63) and the OR circuit (OR25) are
It is output to the terminal (Sr1') through the light emitting section (FLO2
) will stop emitting light. In this case, the terminal (STI
), the signal ``to1i1;lh'' is not output, and the signal is emitted.
The light part (FLOI) does not emit light. 〔, dimming completion table
After the X contact (Sx) is closed in the indicator circuit (INF),
The output input from terminal (p3) during 2.5m5ec
Optical stop signal is AND circuit (AN59), 7j a circuit
(OR23), is input via the AND circuit (AN69).
It will be done. In the sequential light emission mode and first light mode, the terminal (01
3) becomes ``to 1igt+'', resulting in 17 circuits (OR15)
, (OR17), (OR19) output is "High"
2.5 after the X contact (SX) is closed.
The terminal (Sr1) is 'l'' until w+sec.
become. As a result, the light emitting unit (FLO2) emits light,
During this light emission, from the terminal (p3) or from the one-shot I.
Light emission is stopped by the light emission stop signal from the circuit (0811)
. In addition, the dimming completion display circuit (INF) has an X contact (S
Is it the time when 3.51SelC has passed since X) was closed?
6 m5ec has passed since the X contact (Sx) was opened.
Light emission input from terminal (p3) until
The stop signal is an AND circuit (AN61) or an OR circuit (OR2).
3) Input via the AND circuit (AN69). follow
Therefore, even if the leading light does not reach 2/3 of the proper exposure, it is still the leading light.
If the sum of the post-emissions becomes appropriate, FDC display is performed. The AND circuit (AN 53) is activated in the after-emission mode.
3 after the X contact (Sx) is opened.
After 5s+5ecffi have passed, the X contact (Sx)
Uncircumcised until 6 m5ec elapses after it closes.
The output of the code circuit (AN53) becomes F]+ah” and light is emitted.
(FLO2) emits light, and during this light emission, the terminal (p3) or
The light emission stop signal from the one-shot circuit (0811) is
It is output to the terminal (SF3.) and the light emitting part (PLO2) emits light.
The light stops. In addition, for dimming completion display 1 (INF),
Similarly, 3.511SeC from opening of the X contact (Sx)
From the point in time when the X contact (Sx) opens (
31 Terminals to be input until SOC progresses (p3)
A light emission stop signal is input from the In addition, the first light and the second light
The light emitting part (FLOl) does not emit light even during the t-mode. Next, based on FIG. 12, the dimming completion display circuit (INF>
I will explain about it. Luminescence [I Ill 111 circuit (F
from the output terminal (FDS) of TCI) to indicate the completion of dimming.
When the light emission stop signal is input, the flip 70 knob (FF21
) is set. At this time, if the ES [- mode is
The terminal (ES) of the mode discrimination circuit (TiG) is ")-1i
Since gh u, the output of the AND circuit (AN71) is “L”.
OW” and the counter (CO7) is in the reset state.
It has become. Then, enter the period mode and connect the terminal (E S
, ) becomes lLowll, AND circuit (AN71)
The output of the inverter (IN20) becomes "High", and the output of the inverter (IN20) becomes
The output becomes “LOW” and the FDC signal goes through the AND circuit (
AN35). Also, an AND circuit (AN71
) becomes “High”, the counter (CO7)
The relay 1-state is released and the counter (CO7) is reset to master.
Clock pulse (φ2) counter from icon (MC2)
Start the event. Is it the terminal (tO) of the counter (CO7)?
A clock pulse of 8 fl z is output, and the traffic
LED (Sr47) at 8 Hz
(LDI) is blinking. 3 seconds have passed.
Then the terminal (eye) becomes 'High' and the flip 70
The block (FF21) is reset via the OR circuit (OR27).
is reset, the counter (CO7) is reset, and
Furthermore, the output of the inverter (rN20) is 'l-1i1Jh
” and the light emitting diode (LDl) turns off.
, Horikage g! When the J positive is short, the light emitting diode (LD
The ES mode is activated while l) is displayed, and the seventh-card discrimination in Figure 9 is performed.
The terminal (ES) of the circuit (TiG) is 'H+l;111
”, the output of the AND circuit (AN71) becomes ' l
ow" and the output of the inverter (IN20) becomes "'
In addition, the counter (CO7) is in the reset state.
The light emitting diode (LDl) turns off. Also, the terminal (
One shot 1 by changing ES) to 'l-1-1i'
A pulse is output from the circuit (OS 13) to the flip-flop.
The flop (FF21) is reset. Next, based on flowcharts +7-1~ in Figures 13 and 14,
The operation of the microcomputer (MC2) shown in FIG. 9 will now be explained. C
In F mode, the terminal (Tic) of the 7th code discrimination circuit (Tic)
CF) becomes “+-+ igh n”, the microcontroller (M
C2) interrupt terminal (eye) receives l-+ igh” signal.
input and start the operation from step S3. S3's
Interrupt to the microcontroller (MC2) terminal (1t) in steps
data to the terminal (SIN>) and the data to the terminal (SIN>
Based on the clock pulse from the terminal (p3) to CK)
and read it. And this aperture value data for flash photography.
data (Avf) to the specified register in the microcontroller (MC2).
Set. Next, in the same way, serial data (film sensitivity value Sv and exposure control
mode) and the specified register of the microcontroller (MC2).
Set to In addition, the focus of another lens
Read the distance data ([V) and send it to the microcomputer (MC2).
') in the specified register. That's all for the camera body.
Data from will be read. Then the internal cow
Count a certain value (for example, 1 osec) to the counter.
Set the desired data and make sure the counter reaches the set predetermined value.
It is said that an interrupt occurs when the Next, the terminal (i13)
. Determine whether (N4) is ``H1σh II.
Separately, both "++ bright u" has automatic dimming mode.
Since it is set, move to step 815 (-J rJ
Ru. On the other hand, at least the terminal (i13) or (i14)
If one side is “Low”, go to step 814 and check if the camera body
Determine whether the exposure control mode read from is M mode.
do. And if it is M mode, it is manual setting mode.
, 318. On the other hand, it must be in M mode.
If so, the flash device must be set to manual configuration mode.
Even if the light is turned off, it will go into automatic dimming mode and move on to step 8.15.
Ru. In step S15, the automatic light control mode is set to 315.
Move to the next step. Step 815 indicates automatic light control mode.
Perform automatic display and connect terminal (014) to l-1-1i"
Set the flag AMF to 1″ and move to step 321.
Zuru. On the other hand, step 818 switches to manual setting mode.
Terminal (014)
is set to “l OW”” and the flag AMF is set to “0”.
Move to step 21. From step 821, terminals (ilO), (ill
), the light emission mode is determined according to the input signal to (i12).
Set. Terminal (i12 > , (ill) is '''l-
1io1+”, it is the simultaneous flash mode, and S23
Display the simultaneous flash mode in step , and connect the terminal (0
10) as '1-1 igh' and connect the terminal (0'll
), (012). (013) as “'L OW” and go to step 334.
Migration Riru. Then, in step S34, the terminal (ilO
) is 'l1ioh' and '111g1+
”, the light emitting unit (PLO2) is in the front light state and 33
Move to step 6. On the other hand, the terminal (ilO) is "'
LOW” means it is in a bounce state, so the bounce
Then, the process moves to step 360. Terminal (i12) is “High” and terminal (ill)
If it is “'Low”, it is the leading light, and in this case, the step
324, set the terminal (013) to "tligb", and start the first light.
mode, terminal < 0.10), (
355 with 011) and (012) as “L, OW”
Move to step. Terminal (i12) is "' low
", and if the terminal (Nl) is ')-1tgh", the after-emission mode is activated.
terminal (012) in step S27.
-1igl+” to indicate that it is in the after-emission mode.
and terminal (010). (011), (013) as ``Low'' 3
Move to step 34. Terminal (i12), (i
ll) is “LOW”, this flash Hi
ll Only (1) can be controlled directly or via a controller.
This is the case when the 829 step is attached to the main body of the camera.
move to In step 329, the terminal (ilo) is
'l-1-1i' is determined, and the terminal (ilo) is
If it is “High”, the light emitting part (PLO2) is in front light condition.
, -Light emission mode and Natsu(, Ste, Tube 330
Displays the single light emission display state and steps 831.
move to On the other hand, if the terminal (ilo) is “Low”
The light emitting part (FLO2) of the flash device (I) bounces.
mode, and the parent-child flash mode is activated.
Displaying in step 348 that it is in sub-emission mode,
Connect the terminal (011) to "+-+ +oh ', and connect the terminal (010
), (012), (013) as 'low'
Ru. Then, the maximum and minimum light emission amount of the light emitting part (FLOI)
Based on the amount of light emitted, the maximum value of the amount of light emitted and the minimum 1 alv,)
Set up vm and move to step 841. In step 83G, the illumination angle data (this is the light emitting part (P
The irradiation angle of LO2 is variable.
(ZD) outputs the corresponding data) and outputs the beam angle data.
The beam angle is taken in from the force circuit (ZD) and the illumination angle is displayed. Next, it is determined whether the flag AMF is °゛1', and the flag
If ΔMF is “1°”, step 34 (if O to 1, input
Terminal (i13). The level of (i14) is determined. and automatic dimming mode.
When in flash mode or full flash mode, the light emitting part (FLO2)
The maximum light emission amount is Jv. The minimum light emission amount is (vm.)
, if the flash is not in full flash mode, the maximum flash is set at that time.
The amount of light emission is lv 1 and the minimum light emission m is lvm, 34
Move to step 1. In step S41, the camera
Determines whether an interchangeable lens is attached to the main body,
If a lens is not attached, it will display no lens.
Then, the process moves to step 859. Here, the interchangeable lens
If it is not attached to the camera body, the data AV next to the aperture
so that specific data is input to the flash device as f.
and the flash determines that this data has been entered.
If this occurs, it is determined that an interchangeable lens is not attached. It is determined in step 341 that the lens is attached.
Then, the process moves to step 843, and the operation of (15) is performed.
After sieving, the shortest shooting distance for proper exposure [)vM and
Minimum shooting distance @ [) Extend vm. Next, the shortest shooting
Limit shooting where shadow distance [)vm is determined by balax etc.
Determine whether the distance is short from the shadow distance DVL, [)
When vm < [) vL, the shortest shooting distance is [) vm.
The camera uses the limit shooting distance III Dv, and the S52's
Move to step. In step 352, it is determined whether the flag AM "is Pa 1" or not.
If it is automatic light control mode at 1", the maximum light emission ff
Displays the interlocking range from 1lV and minimum emission 11v, and
Maximum light emission if lag AMF is “0” and manual setting mode
[Displays the photographing distance for proper exposure based on IIV]
Ru. Then, the aperture value data Avf for flash photography
Based on the focal length data fv of the interchangeable lens.
Based on the focal length and film sensitivity data Sv
After displaying the luminous sensitivity, return to step 312 and set the setting data.
Repeat the data acquisition, calculation, and display operations to determine the mode.
The terminal (CF) of the separate circuit (TIC) is ``Hgh''.
When the interrupt terminal (it) becomes "H1g11", it will start again.
and performs the operations from step S3. In addition, step S
Does the 55 have interchangeable lenses like the S41?
If it is installed, proceed to step S57.
If the camera is not called 'JA', it will display that the lens is not installed.
Then, proceed to step 359. A mode that displays the interlocking range or shooting distance for proper exposure.
Simultaneous flash, single light flash, and bounce state in first light mode
and when the parent-child flash mode is activated.
In the case of child light emitting t-do, the interlocking range based on the light emitting part (FLOI)
The surrounding area or shooting distance will be displayed. And in advance light mode
The light emitting part (FL02) bounces when firing at the same time or after firing.
Interlocking range or Wi change range is not displayed on the status page
. Note that simultaneous flashing, after-flashing, and single flashing result in a bounce state.
If so, perform bounce display in step S35.
After that, move on to the SGO step. and after-emission.
If it bounces, the probability of getting it right is lowC.
A warning is issued and the process moves to step S55. In Figure 14, power is supplied to the microcontroller (Mc2).
Then, the operation from step 870 is repeated 17 times. First, in step 370, the display section ("DPl") displays the
, enable interrupts to the terminal (it), and switch to simultaneous mode or
Alternatively, in order to set the single lamp light emission mode, connect the terminal (010) to '
Set the terminal (011) to "High" and set the terminal (012) and (013) to "LOW" to S7.
Move to step S74. In step S74, the input terminals (i13), (it
Determine the day number from 4 and determine whether it is in automatic light control mode.
do. And if it is in auto dimming mode, it will display auto.
No, set the terminal (014) to "l-1-1i" and set the flag A.
The MF is set to "1" and the process moves to step S81. 3
In step 74, it is determined that the automatic light control mode is not set.
Then, the manual display is performed and the terminal (014) is
ow”, set the flag AMF to “0”, and set the 381 step.
to the top. At the step of S81, it becomes 13Q100.
Set the corresponding 5v=5, and input in step S82.
The signal from the terminal (ilo) is discriminated and the light emitting unit (flO2
) is in a bounce state. So
If it is in a bounce state, in step S94
After performing the bounce display, move to step 395.
Ru゛. At step 882, the light emitting unit (flO2) enters the front light state.
If it is determined that the
data on the illumination angle from the illumination angle data output circuit <ZD)
Incorporate. The beam angle is then displayed based on that data.
do. Next, when the flag AMF) is set to 1″, automatic light control mode is set.
Determine whether or not. In automatic light control mode, the light emitting part (flO2)
Maximum light emission amount IVM and minimum light emission amount 11vm based on the irradiation angle
Set up. Then perform the operation of IVM +Sv=Gv)vm +5V=GVlB, and find the maximum gap at 'r so ioo.
ID″ number GVM and minimum guide number GvI
11 is displayed and the process moves to step 895. On the other hand, S
At step 85, AMF is 0' and automatic light control mode is not set.
If it is determined that the
) Light emission 11VM based on the set value IC and the illumination angle
, set GVM = rvM + Sv and set
The luminous guide number based on the fixed value (3v is displayed and 3
Proceed to step 95. In step S95, data related to the lens is removed from the camera body.
A table without lenses to indicate that no data is being sent.
Display 150100 and display 397.
Move to step. 897.9B. Step 99 is whether the setting state of the external setting means has changed.
If the setting status changes, the step
Return to step 870 and perform the above operation again to return to the 1 display state.
Switch. Interrupt signal input from terminal (CF) to interrupt terminal (it)
and for a certain period of time (e.g.
(for example, 10 seconds) from the terminal (CF) while H passes.
If no signal is input, the internal of the microcontroller (MC2)
An interrupt is generated by the counter, and the process starts from step S10.
An action is taken. Therefore, the data from the camera body
Data from the camera body is not accessed for 10 seconds after no input is made.
The display based on the data is performed, and after 10 seconds, the screen is displayed.
The data is displayed only by the Hani set in the Rush device.
Gno will now be displayed. Next, the flash device is installed based on Fig. 15.16.17.
<1') and (If) will be explained. Figure 15 is the first
Control circuits (flO2) and (flO3) in the figure
A specific example is shown, and only the parts that differ from Figure 9 are shown.
, the corresponding terminals are given the same symbols as in Fig. 9 and are τ (mutually
(See Figure 9 II for the same part). In the case of this flash device, the light emitting part is (flO3) or
With just one (flO4), parent-child light emission mode can be achieved.
There is no such thing. Therefore, in FC mode, bit b1 and
blo outputs a signal indicating that it is in parent-child mode.
There is no need to use the mode identification 111 (TIC) terminal.
The outputs of (fl) and (flO) are ORed as they are, respectively.
bits bl,
As blo, a signal of °'f-1ight'' is output.
. In addition, the microcontroller (MC3) has parent-child light emission mode.
The terminal (011) that outputs a 'High' signal indicating
Not set up. In addition, the light emission control circuit (FTC2) and
The operation of the icon (MC3) is similar to that of the flash device 1 (I).
are different, but the different parts are explained in Figure 17.
. Figure 16 shows only the parts that are different from Figure 11.
See Figure 11 for the same part. First, one light is emitted for a period of time or one light.
In optical mode, the end of the mini-1 (MC; 3) in Figure 15
The child (010) becomes “')l+9h” and the OR circuit (O
The output of R31) becomes "Htgh". Therefore, the terminal (
From Sr1), the X contact (SX) of the camera body is closed.
2.5m5e from the 4 points made. It passes. Yodenoma”)l
Flip 70 knob (FF17) (11th
(see figure) Q output is AND circuit <AN7b>, 47 circuit
It is output from the terminal (Sr1) via (OR35).
The light emitting part (FLO3) or (FLO4) shown in Figure 1
lights up. And while the light is flashing, if the automatic light adjustment mode is turned on,
The light emission stop signal from the terminal (p3) is sent to the AND circuit (AN
83), terminal (SP4) via OR circuit <0R39)
is output to the
The light is also sent to the completion indicator circuit (I N F ), as shown in Figure 1.
Light emission of the light emitting part (FLO3) or (FLO4) shown in
will stop and a message indicating that dimming is complete will be displayed. Manual setting mode
Is it a one-shot circuit (0811) (see Figure 11)?
These pulses are used in an AND circuit (AN85), an OR circuit (OR
39) and the light emission is stopped. First light mode
On the board, connect the terminal (013) of the microcontroller (MC3) in Figure 15.
) becomes “) light”, and OR circuit (OR31),
The output of (OR33) becomes "to1 high". and
, the Q output of the flip 70 tube (F F 17) is AND
Output via circuit (AN75) and OR circuit (OR35)
and the light emitting part (FLO3) or (FLO4) is the X contact.
It emits light as soon as it closes. In this case as well, the light emission stops
This is done by the light emission stop signal that is input during the light emission.
Ru. On the other hand, the automatic dimming mode is included in the dimming completion indication circuit (INF).
If it is a mode, the X contact (Sx) is closed and then 3.
``'l for 2.5m5ec from the point when 5m5ec has passed.
-(igh” flip 70 knobs (F F 19)
The Q output of is an AND circuit (AN81) and an OR circuit (OR3).
7), and during this period there is an input from the terminal (p3).
A light emission stop signal is input. In backlight mode, the edge
Child (012) becomes “'High” and the OR circuit (OR
The output of 33) becomes "thigh°'. Then, the X contact is opened and 3.5+11S from the time Iζ
After eC elapses, it becomes ")-1high" for 2.5 isec.
The Q output of the flip-flop (FF19) is AND
Through the circuit (A N 79) and the OR circuit (OR35)
It is output and starts emitting light. And if you input while this light is flashing,
from the terminal (p3) or one-shot circuit (0811)
Light emission stops based on the light emission stop signal. At this time
In dynamic dimming mode, input from terminal (p3) while the light is being emitted.
The coming stop signal is adjusted via the AND circuit (AN87).
The signal is sent to the optical display section (INF). Figure 11 shows 7 of the operation of the microcomputer (MC3) in Figure 15.
For Japan-Chile-1~, the flowchart in Figure 13 = 1・
Only the different parts are shown, and the same parts as in Fig. 13 are shown.
This will be explained with reference to FIG. From 821, terminals (ill), (
The light emission mode is determined based on the output state of i12). end
Children (i12) and (ill) are both “to1ig”
h”, it is simultaneous flash mode, and in step 5101
Display the simultaneous flash mode, and in step 5105
Set the terminal (010) to 'High', set the terminal (012) and (013) to 'Low', and proceed to step 834.
Determine whether the data has migrated and is in a bounce state. Terminal (i1
If 2) is “loh” and the terminal (ill) is “LOW”, then
It is the light emission mode, and the first light mode is activated in step 5102.
and connect the terminal (013) to °“+-++ah
”, terminal (010), (Q12) is set to “low”
The process moves to step 855 in FIG. Terminal (i12)
is “'Low” and (ill) is “l-ILgh”
After that, the flash mode is displayed and the terminal (012) is connected to '
@igh”, terminals (010) and (013) as “lo”
w” and moves to step 834. Terminal (i12
), (iii) are both 'LOW', then 51
Display the single light emission mode in step 04, and
Proceed to step 05. Figure 18 shows the internal circuit of the flash controller (ff>
It is a diagram showing a specific example of (CNC). (TIC> is a mode discrimination circuit, a specific example of which is shown in Figure 10.
It is the same as the mode discrimination circuit shown in Figure 9, and the same as that.
It is indicated by a symbol. First, let's explain the operation during FC'E-do.
I will clarify. First, the mode discrimination circuit (TiG> terminal (fO)
While ~(f5) is “light”, the NOR circuit (NOII
), the output of (NO15) becomes “Low”,
AND circuit (AC3). (AC64), (AGI), (AC65) are disabled
The data from line (Q2 >, (Q12))
It is ready to read. Then, the message from the line (include 2)
The numbers are transistor (BT53), inverter (IN27)
) to the terminal (r21), and the line (A 1
2) The signal from the transistor (BT69), inverter
It is output to the terminal (r22) via the terminal (IN31). And the terminal (r21). Lanojit bO, b2. b3. b5 1g issue is D
Flip-flop (DFll), (DF13), (
DF15). (D F 17) is latched. On the other hand, the terminal (r22
) lJ'6 (7) Human bO, bl, b2. b3.
b5 (7) ff1 HaD 7! J flop flop (D
F19) , (DF21) , (DF23), (DF2
5) , (DF27) is latched. Then, switch
<SS> will be released if the sequential flash mode is selected.
If it is a simultaneous light emission mode, it is open. D Fri
Pu70 Tsubu (DFII). (D F 19) both have their Q outputs
If it is set to ``gh'', there are two flash devices!
Therefore, the output of the AND circuit (AG47) is
It becomes "l-11g1t". On the other hand, there are fewer
D flip 70 tube (DFll) or (DF 19)
If the Q output of is 'L OW', two flashes
This means that the AG device is not installed, and the AND circuit (AG
The output of 47 is 'L OW', and the AND circuit <AG4
5) output (α0) and AND circuit < A G 59)
Both outputs are 1 “LOW”. 0 flip-flop (DFI7) and (DF27)
is a flip-flop that latches the distinction signal at bit h5.
However, when both are 'LOW' and input
Two flash MLs were also fitted to this system.
At this time, the AND circuit (A G 63) is ``
l-1ioh" signal. On the other hand, the two flash
One of the terminals (incl. 2) is
If it is the type that outputs only the @igb” signal,
The output of the AND circuit (AG63) becomes “low”.
Therefore, both AND circuits (AG61) are suitable for this system.
The mode will be selected sequentially with the matched flash device.
When the AND circuit (AG61) output is
+”.On the other hand, at least one flash device
If this system is not compatible, select sequential mode8
Even if the switch (83) is released, the AND circuit will not work.
The output of (A-061) is °"Lo'w"'
. Then, the two 7 lash 1 devices are @-arrived and rotated.
When the circuit (AG47) is “High”, the AND circuit (
The output of AG61) is 'l-l ig! 1”, sequentially
The mode becomes light emission mode, and the output (α
0) becomes "'l-1+gha". On the other hand, the AND circuit (
Even if the output of AG47) becomes “I-l igl+”
The output of the AND circuit (AG61) is "il igl+
”, the output of the AND circuit (AG59) increases.
′° and at the same time becomes [-de]. In sequential mode, mode discrimination time i'1f (TIC)
When the terminal Be of
The “Low” signal from Q59) is sent to the AND circuit (A
G41), OR circuit (OR47), (OR43). (OR41), 7>Do Dom (AGI>, Tora
> Output to line (incl. 2) via register ([3T57)]
be done. And the terminal (f7
) becomes 'Higl+', the AND circuit < A
The “G1i9h” signal from G47) is sent to the AND circuit (
AG43), OR times 1 (OR47), (OR43)
, (OR41). AND circuit (AG2) transistor (8-55)
It is output to line (Q2) via the signal line (Q2). Therefore, crab)
Flash device connected directly to the Holamy shoe on the main unit
01", that is, indicating the after-emission mode'!I signal is sent.
Ru. On the other hand, if the terminal (r6) is "")-1+g++"
and the “tLD+h” signal from the AND circuit (AG47).
The numbers are AND circuit (AGS5) and OR circuit (OR51).
), AND circuit (AG64), transistor (BT6
5) to lines (1) and 2). and
The terminal (f7) of the mode discrimination circuit (Tic) is “I-(i
gh", the AND circuit (AG59) ' L
OW” signal tfi7nd D path (AG57), OR
circuit (OR51), AND circuit (AG65), t-ra
Output to line (Q12) via resistor (B Ta2)
Powered. Therefore, the flash controller is in direct contact with the roller.
The connected flash device has a '10'', i.e.
Mode signal is input. In the simultaneous flash mode, the AND circuit (AG47), (
Both outputs of AG59) are ')(igh', so
, AND circuit (AG41), (AG43). (ΔQ55), (AG57) /)'Rubber, terminal (f
6). (f7) is “it igh” is °+-+ i
The gh u signal is output, and both flash units have
This signal is sent. That is, both flash devices have
'11' simultaneous flash mode signal is sent.Sequential mode
However, when it is not in simultaneous mode, that is, the Franche device
If none or only one is installed, uninstall it.
The output of the code circuit (AG47) becomes “LOW”,
The output of the AND circuit (AG59) also becomes low.
Therefore, the 'oo' signal is output as bit 11B and b7.
This signal is output to input (1) and (j12), and this signal is read.
The captured flash device is the flash device itself that was read.
It is determined that only the body is attached to the camera. Next, terminals (f8) to (f
15) describes the data transfer between 'Hioh'.
I will clarify. First, the D flip 70 tube (D F 19)
0 output is “'Higl+”, that is, line (Q12
), the terminal (α
3) becomes “tr tgh”, and during this time the OR circuit (O
Since the output of R46) is 'Hiilh', unplug it.
The output of the code circuit (A G 13) becomes “l-1-1i+”
Become. Therefore, the output of the NOR circuit (NOII) is “' Low
”, and the AND circuits (AG2) and (AGI) are
In the active state, line i2) is in a high impedance state.
Ru. There is a mounting signal from both lines (including 2>, i12>)
When input, the output of the AND circuit (AG47) is 'H
igll” and the AND circuit (ΔG21) becomes active.
becomes. First, the “High” signal of the terminal (f8) is
From the OR circuit (OR49) to the AND circuit (AG21),
OR circuit (OR43), (OR41), AND circuit (A
G2), the line (α
2) is output. This is the configuration of bit b8 shown in Table 1.
This is an incoming signal. Mode discrimination circuit (TIG) terminal (“9
) becomes “l-1-1i”, the D flip-flop (
DF27), (DF17) Q output as input
The signal obtained by inverting the output (α6) of the α circuit (OR55) is
Output from the terminal circuit (AG33) and sent to the line (A2)
Output. The output (α6) of the OR circuit (OR55) is small.
At least one flash device compatible with this system
If the
By inverting and outputting the
A flash device compatible with the system is installed.
and 'LOW' signal is output from line (92).
That will happen. This is the distinguishing signal shown by bit b9 in Table 1.
It is numbered. Mode discrimination circuit (TIG) terminal (f
When lo) becomes “” l-l igl+”, the AND rotation
The signal obtained by inverting the output (α0) of the circuit (AG45) is the AND
It is output from the circuit (AG35). AND circuit (AG
47) is °“1-l1g1+ in sequential light emission mode.
”. Therefore, this signal is indicated by bit old 0 in Table 1.
The signals are sequential. Mode discrimination circuit (T, IC
) terminal (N1) becomes “l-1high u”, the amplifier
The output (α2) of the AND circuit (AG49) is
G37) and is output to line (λ2). The AND circuit (AG49) is a D flip 70 tube (D F
13), (DF23) and input the Q output of each free
The top 70 tube is sent from the Franche device using bit b2.
The coming full charge signal is latched. Therefore, the AND circuit
(AG49) has both flash devices fully charged.
When the signal is
The fullness signal indicated by the 1 beep 1-bll goes off. Card size
The terminal (f12) of the separate circuit (TIC) is ' @ igl+
”, the AND circuit (AG39) becomes active.
The signal is the inverted output (α5) of the OR circuit (OR53).
It is output to the line (α2). A-1 circuit (OR5
3) are D flip-flops (DF15), (DF25
) as input, flip 70 tube (DF15
), (DF25) are bit b from each flash device.
The FDC signal at 3 is latched. Therefore, there are few (and
Also send FDC signal from one flash device at pins 1 to b3.
is output, the output of the OR circuit (OR53) is
gh-”, which is reversed to 'LOW' and displayed.
It is output to the in (α2). This signal is bit 1 of Table 1.
112 FDC signals. Mode discrimination circuit (TIC)
terminals (f13) and (f14). (N5) lfi “Hi!Jh” Nina 8 Toki 4
．． The t line (92) remains 'L OW', which means
Indicated by pitch 1-b13゜1+14, b15 in Table 1
It is a spare pin 1-. The installed jSi number is input from the line (Q 12), and D
Q output (cXl) of flip 70 tube (DF 19)
) becomes “To1ight”, and from the line (including 2)! X
i 1iffi not input, D-7 lip 70
If the Q output/fi of (DFII) is “LOW”
, the output of the AND circuit (AG51) is
Therefore, the AND circuit (A G 19) becomes active. First, the mode discrimination circuit (TiG) terminal (8) is
Hiah”, this signal is directly connected to the OR circuit (OR circuit).
II5), AND circuit (AGl9), t7 circuit (OR4
3), output from (OR41) and output to line (including 2)
be done. This becomes an am signal with pitches 1-b8. Terminal (
f9) becomes “1i911”, the D flip-flop
The Q output (α8) of the loop (DF27) is connected to the AND circuit (AG
27). This signal is distinguished by bit b5.
This signal is output to line (α2)
It becomes a discrimination signal for cut b9. The terminal (flo) is “Hi!
lh", the Q of D flip 70 knob (DF21)
Output (α4) is output from the AND circuit (AG27)
. This signal (Yo) can be installed on the line (QJ12) side.
If the flash device you are using is in parent-child flash mode,
OW'', if it is in single light emission mode' H1g11
” and turns IN. This signal is sent to the terminal (ri
o) line at the timing of "'I-1igl+"
(include 2) and is shown in bit blo in Table 1.
This is a light emission mode signal. Seventh card discrimination circuit (TiG
> terminal (rll) becomes “'HIIJII”, the
The D flip-flop (DF2) is connected to the D flip-flop (DF2) from the D circuit (AG29).
3) Q output (α3) is output. This signal is a line
112) is the fullness signal pin 1-b2 from the terminal (f
ll) is “@igh” timing line (O2
), the 1-bit b11 shown in Table 1 is completed.
It becomes a signal. Terminal (f12) of the mode discrimination circuit (Tic)
) becomes “1IiGh”, the D flip-flop (DF
25) Q output (α7) is from the AND circuit (AG31)
Output. This flip-flop (DF25) is a bit
FCC input from line (α12) at port 1112
This signal 8 is the mode discriminator circuit (TIC
) terminal (f12) becomes "' l-11 (ill").
The pitch is output to the line (α2) at the timing when
1 to 1) resulting in 12 FDC signals. T-do discrimination circuit (T
ic) terminals (f13), (f14), (f1
5) is "L" while line (1) is "'" and 1igb.
OW" is a spare pin 1-. When CFT needs, the end of the mode discrimination circuit (-rlc)
Since the child (CF) is 11 igl+”, it is a NOR circuit.
(NOll) outputs a °'Low' signal and
(AG2) and (AGl ”) are disabled and the
In response to the signal from the input (α2), the transistor (BT5
3) becomes conductive or non-conductive, and the inverter (
From the output (r21) of IN27), from the line (Q2)
signal is output. Then, the terminal (CF) is set to “T1”.
By becoming “high”, the AND circuit (AG53) becomes active.
The signal from the terminal (r21) is passed through the AND circuit (A
G53), OR circuit (OR51), 7nd times vrI (
AG64), (AG65), transistor (BrO5)
, is output to line (912) via (BT67).
Ru. Therefore, the data from the camera body is
line (α12) through the flash controller from
will be output to the flash device and read into the flash device.
. When in ES mode, D flip 70 knob (D F 1
9) If the @Shintan is not latched, the Q output (α3
) is 'Htgh' and the terminal ([S) is -Hi, l, I
I, so the output of the AND circuit (A G 13) is “
11g1i", the output of the NOR circuit (NOll) is ""
low”, transistors (B 1-55>, (B
1-57) is in a non-conducting state. D flip
Q output (α1) of 70 tubes < D F 19) arrives at 1A
If No. 13 is latched, the terminal (E'S) will be "triggered".
When it becomes “high”, the AND circuit (AG23) becomes active.
becomes. Therefore, the flag input to line (α12)
The signal from the “edge” device is connected to the transistor (BrO3) input.
Input via converter (IN31) and terminal (r22)
This signal is output from the AND circuit (A G 23
) and output to line (incl. 2). Therefore
, output from the above-mentioned flash device to line (α12)
The 1c integral control signal is synchronized with the flash light emission.
It is output to the line (include 2) via the troller. In the sequential light emission mode, the output of the AND circuit (AQ45)
(α0) becomes 'l-1igt+'', and
The circuit (AGll) becomes active. the camera body
The X contact (Sx) of is closed and the line (Ql) becomes 'L
OW”, the transistor (BT59) becomes conductive.
Then, the terminal (rl) becomes "1-+1911". this
At this point, [Yo Flip 70 Tsubu (FF23) is in a reset state]
Therefore, the output of the AND circuit (AGll) is
, when the terminal (rl) becomes “High”, “trigb”
The counter (CO11) is released from the reset state.
, the counter (COll) receives the clock from the oscillator (PG).
Click pulse (φ3)]-. And the X contact (
Sx) is closed and 51 seconds have elapsed, the terminal (r
e) becomes 'High' and the flip 70 knob (F F
23) is let. and both flash devices
If the terminal (α2) is “)ligb” in the fully charged state, perform an AND operation.
The output of the circuit (AG88) becomes "l-1ight" and the transistor ([3T71)
Continuity occurs and the line (Q21) becomes low.
The "fludge" device (1) shown in Figure 1 emits light.
Ru. That is, the flash device (1) emits light, and then (1)
After the flash device (I) emits light and proper exposure is achieved,
[) will emit light. Noritsub 70 Tsubu (FF2
If 3) is turned 1-, it is an and. The output of the circuit (AGll) becomes 'low' and the count
The controller (CO11) enters the reset state. - then X contact
(Sx) is opened and 1 to transistor (BT59)
There is no continuity and the terminal (rl) falls to “low”
Then, a pulse is output from 722371 ~ circuit (OS 17).
Press to reset the flip 70 knob (F F 23).
and return to the initial state. When in multi-flash mode, Flash II sets bits 1]8~
The flash controller does not output the 1115 signal.
As mentioned above, both flash devices are fully charged.
If it is ')light', at least one of the
If the signal is ``LOW'', ring 1- (bll).
Output to input (α2). And this signal is the camera main
The body reads it as a fullness signal, but the flash device u
The odor °C can also be read with a flip 70 knob (FF2).
The amount of light emitted is determined. Also, flash
For flash Ml that is directly connected to the controller
, it is determined that both are fully charged in multi-light mode.
The output of the AND circuit (AG8G) is ``11g1+''.
When the terminal (fll) becomes “High”, the AND
The output of the circuit (8G92) and 717 circuit (OR72) is
This No. 1a appears on the line (912).
sends a signal to the flash device that allows it to emit light. on the other hand
, at least one flash device must be fully charged.
For example, the output of the AND circuit (A08B) is 'low'.
Therefore, a “LOW” signal is output to the line (patient 12).
, there is a signal indicating that the flash device should not emit light.
sent to. Also, when not in multi-flash mode,
The output of the motor (IN50) indicates that the lash device is fully charged.
If the terminal (α9) is “+(igh”), the terminal (rii
) becomes 'Higl+', an AND circuit (Ao90
) becomes High11°', the AND circuit (A
G90) output becomes ``to11g1+''. Therefore, this
No. 15 of “G11g1+” is 17 circuits (OR72)
,(OR51) ,,T-yin<Q,12in
output, read by the flash device, and read by the flash device.
The device is ready to emit light. On the other hand, flash equipment is fully equipped.
Not the condition, but the D Noritub 70 tube (DF23) has L.
OW” signal is latched and the terminal (α9) is “Low”.
Then, when the terminal (N1) becomes “@igh”
The ft number of "LOW" is output on line 112).
The flash device reads this signal and enters a state where it cannot emit light.
It becomes a state. The output of the NOR circuit (N 013) is the terminal (FC). (OF), (ES) is “l-ow” throat g, l1ll chi
, when in the period mode, it becomes ``to11g1+''.And,
No flash device is installed on the line (912) side.
Make sure the terminal (α3) is “' l-l right”.
For example, m ++ of Anne RRa / Δ Q l11N
``LJ inh'' l-? ? ks /
The output of the z circuit (NOll) is "LOW".
Both transistors (8T55) and (8T57) are non-conducting.
bawl. On the other hand, a flash device is installed on the line 112) side.
If it is connected, the terminal (α1 pin will be “l-11gha”)
1 and the AND circuit (AG1?) becomes active.
Filling is completed by inputting the line (912) with pins 1-b2.
The signal is latched into the D flip-flop (DF23) and the end
If the child (α9) is “High”, the AND circuit (A
G17) becomes "G11g1+" during the samurai state. Therefore, the flash device on the line (12) side receives the full charge signal.
When outputting , the controller outputs "1-g" during the period state.
h" signal is output to line (α2). 1'i19 figure shows the light emission control section (FTCl) of parent and child strobes.
This is a modification of (FIG. 11). When in first light mode, the edge
The child (013) becomes ``to1ioh'' and the OR circuit (OR
14) The outputs of (OR16) and (OR12) are “H”
igh", and the AND circuit (AN52) becomes active. (AN54), <AN62) becomes active.
2.5 seconds after the X contact (Sx) was opened.
Flip-flop with ``)l igl+''
No. 18 of F F 17 is an AND circuit (AN52)
. (AN54) outputs the OR circuit (OR22). (OR24) through the light emitting unit (FLOl). (PuO2), and the re-emitting section emits light at the same time. So
Then, if it is in i11 dimming mode, the output from terminal (p3) is
The light emission stop signal is an AND circuit (AN66). (AN68) and the two light emitting parts emit light at the same time.
Stop. Also, the light emission to the FDC display circuit (INF) is stopped.
The stop signal is 3.5 from the time the X contact (Sx) is opened.
1R5eCll, 2,5i+ from the time of +l1iLt
The flip-flop that is set to ``high'' during
The signal of the loop (F F 17) is connected to the AND circuit (AN62),
It is output from the OR circuit (OR26), and during this time the terminal (p
3) The light emission stop signal input from the AND circuit (AN
70) to the FCC display circuit (INF)
. In addition, if it is not in automatic light control mode, the light emitting part (PuO2)
is the light emission stop signal from the one-shot circuit (0311)
is passed through an AND circuit <AN64) and an OR circuit (OR2g).
The light emitting unit (FLO
The light is not transmitted to the light source (l) and is emitted entirely. In the after-emission mode, the terminal (012) is 'Hiah'.
Then, the OR circuit (oRla), (C)R12) becomes "
l-1ight”,) 7nd times m (AN'58)
. <AN60) and (AN62) become active. follow
So, the flip-flop (F F 19) is rets 1~
Then, the two light emitting parts emit light at the same time, and during this light emission, the terminal (p
3> Input light emission stop fG@ to stop both light emission.
At the same time, this light emission stop 1a@ is sent to the FDC display circuit.
It will be done. When using simultaneous flash mode or individual flash mode, connect the terminal (
010) becomes “Higl+” and the OR circuit (OR
14) , (OR1G) Ka"Higb" ト/, t
-Li, AND circuit (AN52), (AN54). (AN5G) becomes active. Therefore, flip-to
72 light emission with 0 tube (F 1 = 17)
light up at the same time, and input to the terminal (p3) while the light is being emitted.
When the re-emitting part stops emitting light based on the emitting stop signal from
This light emission stop signal is also sent to the FDC display circuit (INF).
enters. When in parent-child flash mode, the terminal (Off) is
h” and the OR circuit (OR10). The outputs of (OR?13) and (OR12) become 'Hi (lh
”, and the AND circuit (AN52), (AN(30
−). (AN132) becomes active. Then, first flip
When the flop (F F 17) is set to 1~, the light emitting part
(PuO2) starts to emit light, and during this time from the terminal (p3)
The input light emission stops (the light emission part (PuO2>)
The light stops. Next, flip-flop (FF 19
) is set, the light emitting unit (,FLOl) starts emitting light.
During this time, the input light emission stops (the light emitting part (F
LOl) stops emitting light, and this light emitting stop signal also reaches t.
= Sent to the OC display circuit (INF). J3 In this modified example, both
The light emitting parts of the two light up at the same time, so 3il! Work range is both
The total amount of light emitted from the light emitting parts! 14 It is necessary to display
be. The above is about the flash shadow system to which this invention is applied.
Next, we will explain a modification of this system.
. When shooting with multiple lights, one of the 7 lash devices automatically adjusts the light.
One mode, the other mode is automatic when in manual setting mode.
The FDC table is displayed on the camera body when using light control mode.
is displayed, but with a flash device in manual configuration mode.
FDC display will no longer be performed. To prevent this
A variation below j:l can be considered. 1. Sequential emission mode (“'01”, “10”),
Pit-1+6 with No. 13 in simultaneous flash mode (“11”)
．． When reading with b7, it is in manual setting mode.
Set to automatic dimming mode even when In other words, if multiple lights are emitted
HandWhrA constant mode is prohibited. 2. Reserved pins 1-b4. Using b5,
Auto dimming mode shows manual setting mode in Zubitri 4
The flash device outputs a signal, and the flash controller 1~〇
-Ra reads. And in the flash controller,
It is determined that multiple flashes are being emitted, and one of the flashes
determines that only the first device is in manual configuration mode.
, the flash device is in manual configuration mode.
Sends a prohibition signal with l-b15. And this prohibition signal
The device will be in automatic 8 dimming mode. Immediately
When using multiple flashes, only one of the lights will be in manual setting mode.
Prohibit both from automatic dimming mode or manual setting mode.
521 possible. 3. When firing multiple flashes, use both flash controllers.
When F D CfH is input from the flash device
The CC signal is output at bit b15. Also, data from the flash can be stored on the camera body (V).
All of them are ``old gl + °° (g g, 1, that is, this example
Traditional formats that do not have the functionality to fit into
When it is determined that a flash device is attached, the camera
The flash photography display and exposure control are not performed on the camera body.
Display and Exposure IIJ lit for natural light photography.
Flash devices that are not compatible with this system cannot be used.
You may choose not to do so. Or, if all the signals are
What mode is the camera body in when it is read?
and set the exposure time to 1/(iosec) and the aperture to [5, 6].
Fixed 1) Please only use the lowest flash photography! ! I'
rjruJ, sea urchin °("b good. Whether each flash device emits light in a fully charged state.
In addition to this, this signal can also be sent and received when the camera body is in the release state.
The terminal (ES) of the mode discrimination circuit (T, IC)
When becomes ``l-l right'', each
Complete with M8 output device and controller (M8 output type)
Create a timing signal to read the timing signal No. 1g, and use this.
I read based on timing No. 18 of [Full completion signal]
Let them decide whether or not to emit light based on the
You can also do this. In the above embodiment, power-on reset at power-on
In order to avoid complication of explanations and drawings,
Although omitted, the Ministry of Industry can easily add 1 degree.
It is possible. In the above embodiment, the main capacitor of the flash device
A signal indicating the charging status of the battery is now output in pulse form.
However, in the present invention, when charging is completed, +-i to
h”, if not completed, “LOW” signal
It can also be applied to flash devices that emit water continuously. Of course, according to the present invention as described above, it is possible to perform multiple flash photography.
All flash devices connected to the device display a fully charged status.
each flash device is ready to emit light.
Therefore, when other flash devices are not fully charged,
The flash device accidentally fires the light J: Unokoto
There isn't. Also, when shooting with multiple flashes, people's flash
If you directly connect the 21st child of multiple devices to each other, it will be possible to
The second terminal of the flash device is low impedance, so
Overall, the impedance is low, i.e. “LOW”,
People's flash devices read this and the pond's
The charging status of the flash device can be determined, so all flash
A special device or
No circuit required. Also, as in the embodiment, the clock pulse from the camera body
If you synchronize with the charging completion signal and send the charging completion signal, the charging completion signal will be sent.
It is only necessary to use only part of the clock pulses for the
, the remaining clock pulses are various data other than the fullness signal.
It can be used to send and receive data, and the data can be sent and received directly.
You can go in line. Also, as in other embodiments, the state of charge of the main = 1 capacitor is
First predetermined time from input of release signal from camera body
Outputs a fullness signal during this time, and emits light after the second predetermined time has elapsed.
If the control signal is read, camera exposure 11.
Control is performed according to the state of charge immediately before IJ control starts.
be exposed.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the overall configuration of a flash photography system to which the present invention is applied, and Figure 2 is a microcomputer (
Flowchart 1 for explaining the operation of MCI), FIG. 3 is a flowchart 1 showing a concrete example of the flash status display cell 1 in step #38 of FIG. 2, and FIG. 4 is a flowchart shown in FIG. FIG. 5 is a flowchart showing the operation for the steady light calculation I in step #41, which is the first step, FIG. 5 is a flowchart showing the operation for the flash light calculation in step #42 in FIG. 2, and FIG. Step #43 in Figure 2,
A flowchart showing the operation of the steady light*III and flash light calculation I in #44, FIG. 7 shows a specific example of the input/output controller (IOC) in FIG. 1, and FIG.
The figure is a circuit diagram showing a specific example of the light emission control circuit (FST) in Figure 1, and Figure 9 is the 8th flash position (1) in Figure 1.
FIG. 10 is a circuit diagram showing a specific example of the control circuit (FLCl) in FIG.
11 is a circuit diagram showing a specific example of the light emission amount control circuit (FTCI) in FIG.・A circuit diagram showing a specific example of [), FIGS. 13 and 14 are 7O-charts for explaining the operation of the microcomputer (MC2) in FIG. 9, and FIG. 15 is a circuit diagram showing a specific example of the flash v device ( 1), (1)
Figure 16 is a circuit diagram showing a specific example of the main parts of the control circuit (FLC2) and (ELC3) in Figure 15.
Fig. 17 is a circuit diagram showing a specific example of the internal circuit (CNC) of the flash controller shown in Fig. 1. , Figure 19 shows the light emission of the parent and child strobe (1) $'J 9
11 is a circuit diagram showing a modification of part 11 ([Tc1). FIG. ■: Camera body, I, I, ■: Flash device. ■: Flash controller, LM: tllll optical circuit. FST: Flash emission control circuit, IOC: Input/output 1
lllJi11 circuit, FLC1, FLC2, FLC3:
Control circuit, FLO1, FLO2, FLO3, F
'LO4: J? i Optical section, CI, C2, C3, C4: Main condenser 1, C1-IDI, Cl-ID2, CNC
3, CNC4: Charging completion detection circuit, 1VLc1, M
C2, MC3: Microcomputer, including 1: Synchro switch/-
Opening signal transmission line, u2: Line for data exchange. See 3: Clock pulse transmission line, See 4: Earth line, TIC: Mode discrimination circuit. Figure 16 Figure 17 5j4-555 June 25, 1980 Commissioner of the Japan Patent Office Gakudono Shiga 1, Indication of the case 1984 Patent Application No. 48435 2, Title of invention Flash photography system and flash device 3, Amendment Applicant Address 2-30 Azuchi-cho, Higashi-ku, Osaka Osaka Kokusai Building Name (607) Minolta Camera Co., Ltd. Voluntary Amendment 5 Subject of Amendment (1) Detailed Description of the Invention in the Specification Column. (2) Figures 1, 2, 5, and 10 of the drawings.匈f admiration 1nl foot 1-to! )−yN hl,' 1
(1is11-・Mini]ゝ”]÷=≦zuichimura=;nishiba;=6 Contents of amendment (1) “Microcomputer (MCt)” on page 15, line 9 and 10th j of the specification ``Circuit (LM). (AF), (1!, CC), (RL), (FS-r)J
Change to. (2) "Fludge signal" on page 45, line 5 to line 8 of the specification is changed to "signal b8 to bzs from the flash device to the flash controller as is." This signal is sent to the camera body through the camera body. (3) "Ireha" on page 48, line 15 of the specification will be changed to "oriwa, and". (Delete "L/C mode" on page 49, line 15 of the specification. (5) r 5 m5e on page 84, line 12 of the specification.
First, change c J to "2 m sec J." (6) Change the first flash in the first line of page 114 of the specification to "later flash." (7) In the case of 1 on page 114, line 5 of the specification, □
Change it to "When and." (8) [λλl-1i on page 125, line 9 of the specification
g Change h//J to ““Low 〃J l”. (9) Figures 1, 2, 5, and 10 of the drawings. Figures 11 and 15 have been corrected in the attached sheet.
Figure, corrected figure 2, corrected figure 5, corrected figure 10, corrected figure 1
Figure 1 has been changed to Figure 15. Continued from page 1 0 Inventor Takashi Futomaki 2 Azuchi-cho, Higashi-ku, Osaka-shi Camera Co., Ltd. Uchi-chome 3 @ Osaka Kokusai Building Minolta

Claims (1)

[Claims] 1. In a flash device used in a flash photography system in which one flash device or a plurality of flash devices are connected to a camera, a main capacitor that is charged by the output of a booster circuit and stores the light emission energy of the flash light emitting section; , a first terminal for inputting the jump signal of the X contact of the camera body; a means for determining whether the main capacitor has been charged to a predetermined level at which the flash light emitting section can emit more than a predetermined light m; If it has been carried out to a specified level, then
h”, and “High” if the charging has not reached the specified level.
A second terminal that outputs a "LOW" signal with an output impedance lower than that of "l+" and a signal indicating the charging state from the second terminal of the flash device connected to the camera are all High. “Confrontation”
'l-1-1i', if any one is LOW'
A circuit reads a light emission control signal of "LOW", and when the reading circuit reads a signal of "+-t +gh", a light emission start signal based on an opening signal of the X contact from the first terminal is sent to the flash light emitting unit. Sending, ”Low
The present invention is characterized by comprising a light emission control means that does not pass the light emission start signal and the flash light emission unit even if the signal u1 of the X contact S@ is input from the first terminal when the signal `` is read. Flash device. 2. The flash device further includes a third terminal that inputs a clock pulse from the camera body, and the second terminal outputs a signal indicating the charging state from the rising edge of a predetermined clock pulse to the rising edge of the next clock, and the reading circuit 3. The flash system according to claim 1, which reads the state of the second terminal at the falling timing of a predetermined clock pulse. 3. A release signal from the camera body indicating that an exposure control operation is to be started. means for outputting a signal indicating the state of charge of the main capacitor to the second terminal for a first predetermined period of time when the release signal is input; 4. A flash system according to claim 11, further comprising means for reading the light emission control signal after a second predetermined period of time shorter than the period of time has elapsed.4. The flash device includes a main capacitor that is charged by the output of the booster circuit and stores the light emission energy of the flash light emitting section, and a first terminal that inputs the 11-component signal of the X contact of the camera body. , a means for determining whether or not the main capacitor has been charged to a predetermined level at which the flash light emitting unit can emit a predetermined amount of light or more;
i", if the charge has not reached the specified level" l-1i
a second terminal that outputs a LOW signal with an output impedance lower than that of the ``gl+''; a circuit that reads the state of the second terminal that outputs a signal indicating the charging state; -1-1i" signal is read, a light emission T/j3 signal based on the X contact closing signal from the first terminal is sent to the flash light emitting section, and "L O
The camera body is equipped with a light emission control means that does not send a light emission start signal to the flash light emitting unit even if a closing signal of the X contact is input from the first terminal when a signal of "W" is read. means for outputting a predetermined number of clock pulses at a predetermined period to a third terminal of the flash device; means for reading a signal output to a second terminal of the flash device at the falling edge of the clock pulse output to the third terminal; The signal read from the second terminal of the device is 'H
igl+”, flash shooting mode, LOW”
A flash system characterized by comprising a mode switching means for switching an exposure control system of a camera to a natural light shooting mode when 5. Connected to multiple flash devices, all signals indicating charging status from the second terminal of each flash device °')(
When one of the flashes is "low", the reading circuit of each flash 812 uses the light emission control signal as a charging signal. 5. The flash system according to claim 4, which is read as a signal indicating a state.