JPS59219734A - Flash photographing system - Google Patents

Abstract

PURPOSE:To accurately control the light emission ratio between two flash devices by controlling the light emission of the 1st and 2nd flash devices with a light emission start signal and a signal which is outputted a prescribed time after said start signal, and so forth. CONSTITUTION:By a light emission signal by means of a light emission start outputting means 1 and light emission signal outputting means 2, the light emission by means of the 1st flash section 7 is performed and, at the same time, an integration means 3 starts integration. When the photometric output of the means 3 reaches a prescribed value, a light emission stop signal is outputted from a comparison means 5 and monostable multivibrator 6 and the light emission of the flash section 7 is stopped. On the other hand, another light emission signal is outputted by means of a timer 8, light emission signal outputting means 8, etc., after a time which is sufficient to the flash section 7 to make full emission has passed from the output of the light emission signal from the means 2, and the 2nd flash section 14 emits lights. The photometry and light emission stoppage of the flash section 14 are performed in the same manner. In such a constitution, the photometry by means of the light emission section 14 is not influenced by the afterglow of the light emission section 7 and the light emission ratio between the two flash devices can be controlled accurately.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a flash photography system that performs photography by sequentially causing two flashlight emitting devices to emit light at a tentative light emission ratio.

Prior Art Two flash light emitting devices (hereinafter referred to as flash devices) are used, and the flash devices are arranged so that the light emitted from the second flash device hits the subject from different directions,
The amount of light emitted by each flash device is set to a predetermined ratio (for example, 7:3).
) A photographed circular image with a three-dimensional effect can be obtained by emitting light and performing all photographing. An apparatus for photographing this building is disclosed in, for example, Japanese Patent Laid-Open No. 56-94339.

This conventional device includes a means for integrating reflected light from a subject due to flash emission, a first reference signal having a constant ratio with respect to proper exposure, and a second reference signal 1d corresponding to proper exposure. and when the integration level of the integrating means reaches the first reference number 1n, a first light emission stop signal is output to completely stop the light emission of the first flash, and this first light emission stop signal is output.
Start the next flash based on the first flash stop.

The integral value of the integrating means is the second base! When the $ information signal is reached, the second light emission 1￥stop No. 11 is outputted to stop the light emission of the subsequent flash.

By the way, a flash device generally does not stop emitting light immediately when a light emission stop signal is input to the flash device, but starts to emit light from the moment when the light source 1 moe stop No. 16 is applied. The light emission stops after the foot of the foot, which is said to be the remaining mouse, is recovered.

On the other hand, when using such a flash device,
In the above-mentioned conventional photographing system 2, even if a flash signal is sent to the flash device that is firing first, the two flashes will open an extra amount by the amount remaining in the above-mentioned eye 11. A frequent problem was that the ratio of the luminescence Ji of the device could not be controlled accurately.

Furthermore, in extreme cases, the flash that fires in the front may fail to reach proper exposure, and the subsequent flash will not fire, making it impossible to take a flash photo with the light distribution that the photographer had envisioned. Sometimes they even disappeared.

Purpose The purpose of the present invention is to provide a flash photography system in which the flash of the fJL series emits light directly and continuously for a long time, and also to provide a flash photography system in which a flash device that emits light later always emits the button and the light emission ratio is accurate and constant. If you are using a flash camera, we will provide all flash equipment.

Summary The flash photography system IICw according to the present invention includes:
means for outputting a light emission start signal for starting the flash light; a first light emitting means for starting light emission based on the light emission start signal; A second light emitting device starts emitting light when the light is emitted, and a signal '? corresponding to the light reflected from the temporary object by flash light emission based on the above light emitting start signal. j: a first integrating means for distributing the signal; a means for outputting a first light emission stop signal to the first light emitting means when the output of the first integrating means reaches the reference value; and a means for outputting a first light emission stop signal to the first light emitting means; When one hour has elapsed since the output of the first signal, a second detector integrates the first signal corresponding to the above-mentioned temporary shot reflected light, and the output of this second integrating means is the second one.
When the reference value is reversed, the second light emitting means stops emitting light.
Heisei and '? outputting u issue? In addition, in the camera for the above-mentioned flash 1rlQ shadow system according to the present invention, there is a flash light start 1-
means for outputting the light, first and second integrating means for integrating information corresponding to temporary exposure and autopsy light caused by the flash light emission, and a first light emission start signal sent from the flash device. operating said first integrating means and said first integrating means;
means for operating the second integrating means based on a second light emitting start signal "I'j' tentatively sent from the flash device for a certain period of time after the first light emitting start signal is output; and the first integrating means means for outputting a first element stop No. 16 when the output reaches the level of the first reference signal; and when the output of the second integrating means is reversed to the level of the second reference signal 1d+j-, a second This can be supplemented with a means for outputting a light emission stop signal.

Furthermore, in the flash device 2 for the above-mentioned flash sickle system according to the present invention, when the light emission start point 11 of the flash light emission is manually operated in the first mode, the first light emission point is immediately outputted, and in the second mode, the first light emission point is outputted. A means for manually outputting a second light emission signal after a certain period of 116 seconds has elapsed when the light emission starts No. 11, and a first integrating means on the camera side at the same time as the output of the first light emission signal. body)y
At the same time, the second light emitting signal is outputted and the second integration means on the camera side causes the flash to emit light. means for causing a subject to perform an integration operation of a signal corresponding to one-shot different light; means for inputting first and second flash light emission 1-stop signals; and in a first mode, a first light emission stop signal; means for outputting the full signal and outputting a second light emission stop signal in the second mode; and means for starting light emission according to the first or second light emission signal and responding to the first or second light emission stop signal; It is also a light emitting means to stop the light emitting.

Furthermore, in the above-mentioned flash photography system according to the present invention, in the first mode, the first light emission information is output immediately when the previous light emission start signal is input, and in the second mode, the first light emission information is outputted. Then, a means for manually outputting a second light emission number 1 after a certain period of time has elapsed after the light emission start signal is input manually, and a means for manually outputting the first and second light emission number 11 of the flash emission; In the first mode, the first light emission is outputted at 1.0%, and in the second mode, the second light emission is outputted at 1.
°? means for outputting ``stop+i4 +;'kl'';
Or start emitting light by the second emitting first sign, and the above! 81
Alternatively, a light emitting means that stops emitting light according to a second light emitting stop signal can be installed.

Embodiment FIG. 1-1 shows the 4481 fire control method of the present invention. just 4
It may be regenerated.

(1) starts flash emission/Komeno No. 11 outputs full output @signal output Sennari, (2) starts flash emission / Kome no 11 outputs full output signal output Sennari, (2) starts the first flash emission and outputs the 7ζth signal Light emission signal output means (7) is xenon V (not shown)
This is a light-emitting part that eliminates flash exposure caused by flash lights. This light emitting unit (7) performs the first light emission with the output 1d of the first light emission 1H output means (2). is a photometry circuit which inputs a signal from the light receiving means US and outputs a signal corresponding to the intensity of the reflected light from the object. The photometric circuit (1
Integrate the output of the phrase. (4 is the first standard 1u corresponding to the first amount which is a predetermined ratio to the appropriate exposure level.
(5) is a comparison means that compares the output of the integrating means (3) with the output of the signal source (4); (6) is a one-shot circuit; The first integral of
When the reference signal reaches the reference signal, the output of the comparing means (5) is inverted, a pulse is output from the one-shot circuit (6), and the light emitting section (7) stops emitting light.

(8) is a timer, and this timer (8) starts counting the time when the light emission start signal is outputted from the light emission start signal output means (1). (9) is a second light emission signal output means that outputs a signal for emitting the second flash according to the signal from the timer (8), and qΦ is the output 1 of the second light emission signal output means (9). This is a light emitting section that emits a second flash using xenon (not shown). The timer (8) counts the time t sufficient for the light emitting section (7) to emit all light. The integrating means uO is connected to the second light emission signal output means (
The total output of the photometric circuit section is integrated using the second light emission number 1M from 9). ul is a signal source that outputs a second reference signal corresponding to a second firefly at a predetermined ratio with respect to the appropriate exposure level;
Q'4 is a ratio collecting means for comparing the output of the integrating means 00 and the output of the signal source Uυ, and Q4 is a one-shot circuit. When the output of the integrating means α0 reaches the second reference signal, the output of the comparing means V4 is inverted, a pulse is output from the one-shot circuit, and the light emitting section H stops emitting light with this pulse.

When the light emission start number 100 is output from the light emission start signal output means (1), the first light emission signal is outputted from the first light emission signal output means (2), and the light emission section (7) starts to emit light. , the integrating means (3) starts integrating a signal corresponding to the intensity of the light reflected from the object by the l-th light emission from the photometric circuit QQ. Further, when the light emission start signal is output, the timer 8 starts counting the entire time. The integral value of the integrating means (3) is the signal source (
When the first criterion 1d of 4) is met, the output of the comparison means (5) is inverted, a light emission stop signal is output from the one-shot circuit (6), and light emission of the light aperture part (7) is stopped. .

A timer (
8) counts up, a second light emission signal is output from the second light emission signal output means (9) in response to a signal from the timer (8), and the light emission section 1:14) starts to emit light. Integration of a signal corresponding to the intensity of the object reflected light caused by the second light emission from the taunting optical circuit uQ is started. When the integrated value of the integrating means 00 reaches the second reference signal of the signal source dυ, the output of the ratio 1 shielding means Q4 is inverted and the one-shot circuit ! A light emission 1 stop signal is output from the light emitting section 0Φ to stop light emission.

Since the sum of the above-mentioned first reference signal and second reference signal is set to a value corresponding to the appropriate exposure level, the sum of the light emission amounts of the first and second light emission becomes appropriate, and the light emission The ratio of the amount of light emitted by the portion (7) and the light emitting portion σY is equal to the ratio between the first reference number 1d and the second reference number IH.

Figure M41-2 shows an example of this invention comprising a camera and two flash units (100).
is the camera price, and (200) and (400) are the flash devices, respectively. (20) and (40) are flash devices (200).

(400) (Each D light emission mode is two flash devices (2oo), (400) A light emission mode signal output means that outputs a number 1 that determines the light emission order when in the sequential D light mode that causes the light emission sequentially. The light emission mode No. 11 output means (20) outputs the output means (20) when the flash device (200) emits light first in the sequential light emission mode.
output No. d, and sequentially turn on the flash device (20
0), outputs a Low' belief. Similarly, the light emission mode signal output terminal FiC40) is
When the flash device (<400) is made to emit light first in the sequential light emission mode, a High signal is output in full, and when the flash device (400) is made to emit light later in the sequential light emission mode, a Low signal is output.

(21) and (41) are timers similar to the above-mentioned timer (8), and start counting the short time in response to a light emission start signal from the camera body (100). (22) outputs a light emission signal to the terminal c23) based on the light start signal from 9, and emits light 1d and l! based on the 1 word of the timer (21). i: This is a 1st gear output means which outputs to the terminal (25) and roughly outputs an integral control signal to the terminal c2 in response to the signals from the light emission start number 16 and the timer c21). Similarly, (4) outputs a light emission signal to terminal C43 based on the light emission start signal,
The light emitting signal is sent to the terminal (4) based on the 1g signal of the timer (41).
5), and furthermore, the light emission start number 1d and the timer (41
) output means outputting an integral control signal to a terminal (44).

1. When the flash device (400) fires first in the sequential mode, when the flash start signal is output from the flash start signal output means (1) of the camera body (100), the source light of the flash device (200) Mode count −υ・Output means Cω
Since outputs a Low signal of 100, the gate of the AND circuit (26) is closed and the light emission signal from the terminal (23) from the signal output means c22) is blocked. On the other hand, the light emission mode signal output means (4ω) of the flash device (400)
Since outputs the first signal of "High", the gate of the AND circuit (46) is opened and the light emitting signal of the terminal (43) from the signal output means (moderate) is output to the AND circuit (46) and the OR circuit ( 51) It is input to the light emitting section (14) through t-, and the light emitting section (141) emits light.
Terminal (44) goes High at the same time as it goes up to "High".
h and this signal is the camera base salary (100)
is applied to one input terminal of the AND circuit (19).

1, signal output hand 6 of flash device f (200)
(22) terminal (24)lfi ``gh''VC rising 'l)''), the output terminal of AND circuit (19) is H
igb", this signal is outputted to the terminal (171) by the switching means (17), and the integrating means (3) starts the full integral operation.

The temporary light generated by the light emitted by the light emitting unit 04) passes through the 4Jυ shadow optics (LE) and (AP) by 1 [11 and then the light receiving unit 05).
When the light is received by the photometering circuit (16) and the temporary image (y) is reversed to the first standard of the value source (Φ), the ratio 1 set means (
The output of 5) is inverted, a pulse is output from the one-shot circuit (6), and this pulse is used as a light emission stop signal to the AND circuit ( 48). At this time, the gate of the AND circuit C48) is open, so the -light emission stop signal is input to the light emitting section (1) via the AND circuit (hu) OR circuit (50), and the light emission of the light emitting section 04 is stopped. do.

On the other hand, when the timer (21) that performs time gaunt counts up due to the output of the light emission start signal, a High signal is output from this timer (21).
This code is output from the signal output means C22) to the terminal G25). At this time, the light emission mode signal output means Cω
Since the gate of the AND circuit (27) is opened by the output u Low, the output of the AND circuit c27) becomes Hi.
gh becomes K, this signal is input to the light emitting part (7) via the OR circuit (31), and the light emitting part (7) emits light.Furthermore, the rise of terminal C25) to Higb' at the same time as 9. Terminal C becomes High', and this signal is applied to one input terminal of the AND circuit (19). 1, the terminal ■ of the flash device (400) is set to High', and the output of the AND circuit 09) is High.
and the terminal (170) of the switching means (17) becomes 'High.
h'', and the integrating operation of the integrating means 0■ becomes possible.

The light reflected from the light emitting unit (7) is reflected by the photographic optical system (
t, E), (AP) and is received by the light receiving system (15), and a signal corresponding to the intensity of the light reflected by the subject is output from the photometry circuit (16). Photometric circuit (
16) Integrate the output. When the output of Shinbunte Pi (1ω is applied to the second reference No. 18 of the signal source (11)), the output of the comparison means (12) is inverted, and a pulse is output from the one-shot time wr, and this pulse is It is given to one input terminal of the AND circuit (29) of the flash device (200) as stop No. 1H via the terminals (JB13) and (JF13).At this time, the gate of the AND circuit (c29) is open, so The light emission stop signal is an AND circuit (29
), is input to the light emitting part (7) via the OR circuit (3ω,
The light emitting section (7) stops emitting light.

FIG. 2 is a block diagram showing the overall configuration of a flash system to which the present invention is applied. The circuit surrounded by the dashed line (II
I) or the circuit on the camera body side (hereinafter referred to as the camera body)
The camera body (III) has two connectors for connecting a flash device. One connector (CN1) is provided at the bottom of the camera, and this connector (CNI) can be connected to the flash controller connector (CN2), which is the circuit (I) surrounded by a broken line. The connector (CN6) for the capacity of the camera body (III) is provided on the hot shoe on the top of the camera, and the circuit (circled by a broken line) which is the flash device (
II).

(m, (V))+9 ter (CN8), (CN9)
, (CN11), respectively. A power battery (BA9) and a power switch (MSl) are provided inside the camera body (III).
Power is supplied to the control circuit (BOC) via the SI).

Furthermore, there is a photometry switch (S) inside the camera body (III).
l), a release switch (Sl), a reset switch (S3), and an X contact (S The release switch (Sl) is closed on the 2vith press of the release button. When the photometering switch (Sl) is opened, the control circuit (BOC) repeats the operations of data transfer, metering, and E51-1 display, and when the release switch (Sl) is closed, the control circuit (BOC) repeats the operations of data transfer, measurement, and display. Perform control operations.

When the travel of the shutter tip '14 (not shown) is completed, the X contact (S
4) is closed and the operation of the control circuit (130C) is stopped. Specific examples of the control circuit (BOC) will be described in detail in FIGS. 3 to 9.

The circuit (I) surrounded by the broken line is the 7-wire controller, and is connected to the connector at the bottom of the camera body (III).
CNI) and the connector (CN2). Inside the flash controller (1),
Power supply (BAI), power supply control timer circuit (CTC),
A control circuit (CNC) for multiple light emission is provided. Then, the power supply connector (CN4) for supplying power to the 7. rush device ff (I
1) and a connector (CN5) connected to the flash device (V). The timer circuit (CTC) in the flash controller (1) is shown in Figure 13, and the control circuit (CTC)
Specific examples of NC) are shown in FIG. 14. Also,(
DI)l) is a booster circuit.

The circuit (II) surrounded by a broken line is the flash device, and the connector (CN3) of the flash controller (I).
is connected with the connector (CN8), and the controller (
The power supply connector (CN4) in I) is the connector (C
N7). In addition, jiil surrounded by a broken line
The path (I'll) is a 7-lush device with the same configuration as the flash device (11), and this flash device (n) is connected to the hot shoe connector (CN6) on the top of the camera body (III) and the connector (CN , ), and the power supply connector (CN 10) is not connected to anything.

7 Rush device 1i (II), (IV) f: t-; ite, (13A3>, (r3A7) is the power supply battery, (FSI
), (FS5) are the main switches, (FLCI)
, (FLC3) is the hunt roll circuit of the 7-lanoshu device. This Huntroll circuit (FLCI), (FLC3
) will be described in detail based on fjS Figs. 10 to 13. (D D3) and (D D7) are booster circuits, (FLP
1), (FLP3) is a 7-inch light emitting circuit.

The circuit (V) surrounded by a broken line is a flash device, and is connected to the connector (CN5) of the flash controller (I) and the connector (CN9). This flash device (V) is equipped with a power battery (13A5), and when the main switch (FS3) is closed, the external pressure circuit (DD
5), the main capacitor (MC3
) is charged with a high voltage via the diode (1) 21). Then, when a light emission start signal is input from the 7-lane controller (I) through the line (L21), the tricycle circuit (T R) operates, the cannon tube (XE) starts emitting light, and the thyristor (SC) ) conducts. and,
When the amount of light emitted from the cannon tube (XE) reaches a predetermined value, the strike occurs.
/P circuit (STC) stops the cannon tube (XE) from emitting light.

Next, the operation of this 7 runcie system will be explained.

First, the 7-inch device (n) is attached to the main body (III).
The explanation will start from the case where only one is attached. 7. In the control circuit (IV), when the power switch (FS5) is closed, the i terminal (ES) of the control circuit (FLC3)
P) becomes “l(igl+)” and the transistor (BI3
) becomes conductive, and the boosting circuit (DD7) starts the boosting operation. This transistor (BI3) automatically becomes non-conductive after a certain period of time (for example, 20 minutes) if the flash device does not operate. In addition, the power supply Sui Nochi (FS5
) is closed for a certain period of time, and when the switch (APS5) is closed while the transistor (BI3) is in a non-conductive state, the transistor (BI3) becomes conductive for a certain period of time again. Also, if the switch (APS5) is closed or data is exchanged with the camera body while the transistor (BI3) is in a conductive state, the transistor (BI3) will be in a conductive state for a certain period of time from that point on. There is. In addition, when the transistor (BT'5) becomes conductive, the light emitting diode (LD5) lights up to indicate that it is in the operating state.6 The diode (B
The main capacitor (I9) is charged with high voltage via
When the charging voltage of MC5) reaches a predetermined value, a high signal is output from the terminal (CI-IC) of the flash light emitting circuit (FLP3).
This terminal (CHC) outputs a signal of "Lou+" when the charging voltage of the main capacitor (MC5) has not reached a predetermined value.

On the camera body (Ill), press the metering switch (Sl)
When the control circuit (BOC) is closed, the control circuit (BOC) reads data from the French device (IV). First, a "High" pulse (hereinafter referred to as FLCA signal) for a certain period of time (for example, 50 microseconds) is output to the line (L3), and then eight clock pulses are output.Then, this signal The flash device (1■)'s load control circuit (FLC3) is connected via the terminals (BF23) and (FF23).
), and in synchronization with the clock response from the control circuit (FLC3) and the line (L3), an attachment signal (attached) indicating that the nosch device is attached to the camera. When the main capacitor is fully charged, a charging completion signal (if charging is completed and ν is "Higll"), a multi-flash signal indicating that the flash device is using multiple flashes. (“Hi8h” when not multiple lights), F indicating that dimming has been performed
A DC signal (Loud''- when dimming is performed) is output from the line (L2).

After reading the data from the line (L2), the control circuit (BOC) calculates exposure control values for constant light and for 7-run shots with one light based on the photometric value and set value. *
Then, line (L3) outputs a "Higb" pulse (hereinafter referred to as CAFL signal) for a certain period of time (for example, 100 microseconds), and then outputs 1 and 28 clock pulses on line (L3). At the same time, in synchronization with this pulse, the exposure control mode (hereinafter, aperture priority exposure time automatic control mode is set to A mode, exposure time priority aperture automatic control mode is set to S mode, aperture and exposure time) is output on line (L2). The control circuit (FLC3) outputs the data of the automatic control mode (P mode, the manual setting mode of print and exposure time (H1 mode)) and the set film sensitivity, and the control circuit (FLC3) outputs the line (L mode).
3) based on the clock pulse from line (42)
Read data from. Subsequently, the control circuit (BO
C) outputs 8 clock pulses from the line (L3), and uses the same clock pulses to provide aperture value data for flash photography and to ensure proper exposure of the secondary subject during flash photography. A signal indicating whether the Fill
-In signal "HiHk") is output from the line (L2), and the control circuit (FLC3) outputs the line (L2).
3) Read this data in synchronization with the clock pulse from.

The control circuit (FLC3) calculates the interlocking distance range based on the read data and the maximum and minimum light output data in the automatic light control mode, and calculates the interlocking distance range in the manual setting light emission mode (in the automatic light control mode (° or less) If the dimming mode is auto mode and the manually set light emission mode is manual mode), the interlocking distance is calculated based on the set light emission amount and the read data. Then, the read aperture value, film sensitivity, Fill-111 mode, calculated interlocking distance range or interlocking distance, and further the charging completion state and auto or manual mode are displayed.

The control circuit (BOC) again performs data reading, photometry, calculation, and data transfer operations, and switches the photometry switch (S
This operation is repeated while l) is open. At this time, the exposure control mechanism (not shown) is charged and reset.
When the switch (S3) is open, the photometry switch (
The above operation is repeated for a certain period of time (for example, 5 seconds) even if the SL) is opened, and furthermore, in the flash device (IV), even if no data is input after 5 seconds, the operation is repeated for a certain period of time (for example, 1 second). remains displayed. Furthermore, the conduction of the trannostar (Br3) is maintained for 20 minutes after no data is input. On the other hand, in the camera body (Ill), if the reset switch (S4) is closed when the exposure control mechanism has completed its operation, the above operation will stop immediately when the metering switch (Sl) is opened. However, for the flash device (■■), the photometry switch (Sl
) is released, the display continues for one second and then turns off.

When the release switch (Sl) is closed with the reset 7F switch (S3) open, the control circuit (BOC) again reads data from the 7 lash device (IV). Then, based on the read data, it is determined that the flash device (IV) is attached and the main capacitor has been charged,
The exposure control value calculated for 7 run shots is used as exposure control data.

On the other hand, if the flash device is not installed or the charging completion signal is not input even if it is installed,
The exposure control value calculated for steady light photography is used as exposure control data. Then, a pulse of a certain period of time of 11 J (for example, 50 microseconds) is sent from the line (L3) to the flash device (IV) to start an exposure control operation. When the camera's shank-front curtain travel is completed, the X contact (Sx) is closed, and this closing signal is input to the control circuit (FLC3) through the line (Ll).

The control circuit (FLC3) sets the line (Ll) to “HiBb” except when data is being exchanged.
However, when the closing signal of the X contact (Sx) is input from the line (Ll), the line (Ll) is set to "1-04". Also, if the 150 microsecond pulse at the time of release is not input, the X contact (
The closing signal of Sx) is not accepted.

When the opening signal of the X contact from the line (Ll) is accepted, a light emission start signal is output from the terminal (STR) based on this signal, and the cannon tube (not shown) in the flash light emission circuit (FLP3) is output. begins to emit light. In addition, a light emission amount measurement circuit (described later) is provided in the control circuit (BQC) of the camera body (Ill), and this light emission amount measurement circuit performs integration when the line (Ll) becomes "L". When the flash starts operating, the light emitted by the flash is reflected by the subject, passes through a controlled photographic aperture, and is reflected on the film surface.Then, when the integral value reaches the appropriate exposure level, the line ( L3) from 'Lou+' to 'Hi
gh”.

This signal is sent to the controller (F) of the 7 lash device (IV).
When LC3) is input, a light emission stop signal is output from the terminal (STI') to stop the flash light emission. Then, prepare the FDC signal and use "'L" for the next data transfer.
This FDC signal outputs an FDC signal of
The signal is output for a certain period of time (for example, 2 seconds) from the time when the contact (Sx) is opened (for example, the time when the shutter trailing curtain completes its travel). Then, when the aforementioned 150 microsecond IJ pulse (hereinafter referred to as a release signal) is input during these 2 seconds, this FDC signal is reset. Further, while the FDC signal is being output, a display indicating that the light has been automatically adjusted is displayed on the flash device (IV).

When the flash device (Iv) is in the manual mode, the light emission stop signal from the line (L3) is not received, and the flash device emits light up to the manually set light amount and then stops emitting light. At this time, no FDC signal is output, and no display indicating that automatic light adjustment has been performed is performed. In addition, if P mode data is input from the camera while the flash unit is in manual mode, automatic flash control will be performed within the range from the manually set flash output to the minimum flash output. Automatically switch to auto mode 1) and operate in auto mode.

The camera body side is also provided with a display means for displaying the status of the flash device ('IV), and it turns off when the flash device attachment signal is not input, and when the attachment signal is input and a charging completion signal is input. It blinks slowly when there is no charge, lights up when the attachment signal and charge completion signal are input, and blinks quickly when the attachment signal and FDC signal are input. Note that when the FDC signal and the charge completion signal are input, the FDC signal is given priority.

Here, the calculation contents in each mode for flash photography will be explained. In addition, the photometric value is Bv, and the film sensitivity is S.
v, and the exposure control value is Ev. First, in P mode, the set film sensitivity Sv is ISo 100 (Sv=
5) Calculate how much it deviates (Sv-5=△
Sv). Then, 6+ΔSv is set as the limit aperture value. In other words, if ISO100, F8 is, and if ISO400, F16.
However, at ISO50, the maximum aperture value is F5.6. Next, the calculation Bv+Sv+1-Tvfl=Avf2 is performed. Here, Tvfl corresponds to 7 (17250 seconds), which is the exposure time at the tuning limit during independent light emission. here,
The calculated Av "2" corresponds to an aperture value under iEv for the photometric output. This is done because calculations are performed for 12111 In7 lash photography in backlight situations, etc. In other words, The light receiving element for photometry uses center-weighted metering even if it is average metering, and the way the metering comes out is strongly influenced by the main subject in the center (which is illuminated by the flash light). For a sub-subject to which no irradiation contributes, there is a high probability that the exposure will be over IEv based on the photometric amount J, and if exposure control is performed based on the exposure value of Ev+1, there is a high probability that the exposure will be appropriate.

Next, it is determined whether Avf2 is within the range of 3≦Avf2≦6+△Sv, and if this is the range, Tvfl
and Avf2 to control exposure. At this time, the flash light emission amount control is such that a light emission stop signal is output when the amount of light emitted by the IEv adder is reached. This is Fill
When photographing in Franche, the main subject is also heavily illuminated by constant light, so if 7 lashes of light are irradiated to the appropriate exposure level, there is a high probability of overexposure. If 3>Avf2, (3 is F2.8
) Exposure control is performed with an aperture of F2.8 and an exposure time of 1/125 seconds. At this time, the Franche light is emitted until the appropriate exposure level is reached. That is, in the range of Ev less than 10, normal 7-lash photography is performed without considering the exposure of the sub-subject. Note that the reason why the aperture is not set wider than F2.8 is to prevent the depth of focus from becoming shallow. Also, the exposure time is 17250
The reason for switching from second to 1/125 second is to minimize the amount by which the secondary subject is underexposed.

When Avf2>△Sv+6, △Sv+6 and 1
Exposure is controlled at /250 seconds, and the flash light is emitted at a level of IEv Angoo rather than the proper exposure. Δ the pattern
The reason why the aperture is not made smaller than Sv+6 is to prevent the amount of light emitted from being insufficient. In this case, the secondary subject will be overexposed, but if it is a normal subject other than the sky or the sun, Bv=9 in incident light metering, so the amount of overexposure is small, so no overexposure warning is displayed. On the other hand, when 3>Avf2, the sub-subject will be underexposed, but the underexposure warning will not be given because it is in the normal 7-ray shooting condition. These over- and under-exposure warnings are issued when it is determined that over-exposure and under-exposure will occur during constant light photography. In addition, 3≦A
The range of v f 2 is the area for Fill In flash photography.

Explain to your dog what S mode is. In this S mode, calculations are performed in the entire area as Fill-In7 rush photography. First, open at the set exposure] ゛v3 is Tvs>
When Tvfl is set, I”vN is set to Tvs.
Then, calculate Ev+1-Tvs''Av. Then, it is determined whether Av is between the maximum aperture value Avm and the open aperture value Avo, and if it is within this range, the calculated aperture value and Control is performed by exposure time.On the other hand, when it is out of this range, Ev+1-Avm=Tv or Ev+1-Av.

= Tv is calculated, and if Tvo≦Tv≦Tvfl, exposure control is performed using the exposure time calculated as Avn+ or Avo, and if Tv>Tvfl, Avm and Tvfl are used,
If Tv<Tvo, exposure control is performed using Avo and Tvo. Note that when Tv>TvrI, an over warning is given, and when Tv<Tvo, an under photograph is given even if the sub-subject performs Fill-In7 lash photography, so an under warning is given. Further, the flash light is emitted so that the entire area is under IEV.

Next, the case of A mode will be explained. In this case, the normal 7-lash shooting mode is used in all areas regardless of the brightness of the subject, and the controls are the set aperture value Avs and the synchronization limit exposure time Tvf.
Exposure control is performed at I, and the flash device emits light to a proper exposure level. Also, Ev+1>Avs+Tvr1
When this happens, a warning of overexposure is issued.

Note that in the case of this A mode, the under warning is not given because it is a normal 7-lash shooting mode.

In the case of M mode, the normal 7-ray shooting mode is used in all areas regardless of the brightness of the subject, and the set exposure time Tv
When s is Tvs>TvfI, Tvfl is set as the set exposure time. Then, the set aperture value Avs and the set exposure time Tv
Exposure control is performed in s, and the flash device emits light to a proper exposure level. Also, in this M mode, Ev
When +1>Avs+Tvs, an over warning is given and an under warning is not given.

Next, the operation of the 7 lash controller (I) and the 7 lash device (11) attached to the camera body (III) will be explained. 7 Runcie Controller <I
) and 7 lash device (II) are connected, the connectors (CN3) and (CN8) are connected, and the connector (C
N4) and connector (CN7) are connected. In this state, press the main switch (FSI) of the 7 lash device (■1).
When closed, the line (L5) drops to ground potential.

In other words, the line (L
5) is lowered to "Lou+". Timer circuit (
CTC) for a certain period of time (
At the same time, the transistors (BTI) and (Br2) are turned on. When the transistor (BTI) becomes conductive, the flash controller (I) removes the voltage from the flash controller (I) from the source battery (BAI) to the transistor (BTI).
TI), line (L7), connection terminal (CF27), (F
F17), and supplies power to the control circuit (FLCl) via the diode (D5). Also, the line (L
7) also supplies power to the mount control circuit (CNC) via the diode (Dl). In addition, the transistor (
When BTI) becomes conductive, the light emitting diode (LDl,)
lights up to indicate that the flash controller (I) is in operation.

When power is supplied from the line (L7), the control circuit (FLCI) receives a “High” signal from the line (L7).
h" signal is input, the transistor (Br3)
It is controlled independently of the timer in the control circuit (FLCI) and remains conductive as long as power is supplied from the line (L7). Further, since the closing signal of the second inch (APS3) is invalidated when power is being supplied from the line (L7), the timer in the control circuit (FLCI) is not reset. In addition, a power supply battery (B
Even if A3) is not attached to the 7 lash device (II),
The control circuit (FLCI) operates because it is supplied with power from the line (L7). In this case, the external pressure circuit (DD3) does not operate because it is not supplied with power from the line (L6), and the light emitting diode (LD3) is turned off.

Due to the conduction of the transistor (Br2), the external pressure circuit (DD
I) is activated and the line (L8) and connection terminal (CF28
), (F F 18), which is photoelectrically coupled to a high-voltage capacitor (MCI) via a diode (1) 9).

In this case, the power battery (BAI) of the flash controller (I) is the power battery (BAI) of the flash device (11).
3), so the main capacitor (MC
The time it takes for I) to be charged to a predetermined value can be greatly reduced, making it suitable for high-speed continuous flash photography.

The switch (APSl) connects the flash devices t(II), (
This is a switch with the same function as the switches (APS3) and (APS5) in
3) is closed in a conductive state, this switch (APs
When transistors (Tl of B) and (Br3) Q4 are kept in a conductive state for 25 minutes from the time of opening i), and transistors (BTI) and (Br3) are closed in a non-conducting state, transistors (BTI) and (Br3) are closed. ) becomes conductive, and this conductive state continues for 25 minutes. Note that when the main switch (FSI) of the flash device (11) is open, the timer circuit (CTC) does not operate even if this switch (APSl) is closed, and the transistors (BTl) and (B
r3) is not conductive. In addition, the control circuit (CNC
) to line (C3), while data is being transferred from the camera body (III) to the flash device.
” signal is output. This signal is also output from the switch (APSI
) has the same movement as the closing signal of the flash device (II
) is closed, the timer circuit (CTC) is activated or updated to the hour l'l1 (25 minutes). Further, when 25 minutes have passed and the transistors (BTl) and (Br3) have become non-conductive and the switch (APS3) of the flash device (II) is opened, only the transistor (Br3) becomes conductive. Shikaru,
When the photometry switch (Sl) of the camera body (1!1) is closed and data is exchanged, the control circuit uP
t (CNC)1. From the power battery (BA3) of the t7 lash device (II) to the connection terminal (1/F1B), (CF26
) It is operable because it is supplied with power via the diode (D3). Therefore, when the photometry switch (Sl) of the camera body (III) is closed and data is exchanged, a "Hi8b" signal is output to line (c3) and the timer circuit (CTC) is activated. Transistor (B
Tl) and (B T2) become conductive. This is the same even when the transistors (BTI), (Br3), and (BT3) are all non-conductive. Note that if the main switch (, FSl) is not closed, the line (C3
), the timer circuit (CTC) is not activated and the transistor (B Tl),
(B T2) and (B T3) remain non-conductive.

7. Power supply battery (BAl) for rush controller (I)
is not installed, the control circuit (CN, C
) is supplied with power from the power supply battery (BA3) of the flash device (TI), so only the control function described later is maintained, and the function of shortening the charging time (power-up) of the flash device is eliminated.

The above is an explanation of the power supplies for the flash controller (I) and the 7-lash device (11). Next, data transfer and light emission control will be explained. In this case, when sending data from the 7 lash device (II) to the camera body (Ill), the 7 lash device (II) is sent from the camera body (III).
), the control circuit (CNC) only passes the data as is, and the camera body (
The data necessary for opening the 7-latch device (II) and the 7-latch device (II) is exchanged as is via the lines (L2) and (L12). Further, the signal on the line (L3) is directly exchanged between the camera body (III) and the 7 lash device 1 (II). Furthermore, the X contact (S×
) is transmitted to the flash device (ri) through the line (Lil), causing the flash device 01) to emit light. Then, with the start of light emission, a line (L
12), (L2) decreases to II l-all, and the light emission control integration circuit of the camera body (Ill) operates, and when the proper exposure is reached, the line (1,,,3) becomes 1"
At this rise, the 7 lash device (II) stops emitting light. As mentioned above, the controller (I) and 7 lash device f are connected to the camera body (III).
f (II) is attached, the camera body (I
Perform the same operation as when only the 7 flash unit @(m) is installed in the flash controller (Il).
) Flash device (II) powered by battery ('BAI)
) The charging time of the main capacitor (MCI) of the main capacitor (MCI) is shortened (power-up).

Next, the operation when all the devices shown in FIG. 2 are installed will be explained. The flash controller (I) has a switch for switching between simultaneous multiple flash emission mode and sequential multiple flash emission mode (hereinafter referred to as simultaneous mode and sequential mode). First, the case where the sequential mode is selected will be explained.

7 ranshu outfit ff1 (11), (IV) color ly l
When sending data to the flash device (H), (I) in synchronization with the first clock (bo bit),
A mounting signal "Higl+" is output from V). At this time, the flash controller (1) launches a signal from the flash device (I1.) and outputs this signal to the camera body (III). At the next clock (bl bit), there are also 7 runcies (II), (
A mounting signal is output from m. At this time, the 7-runshu controller (I) does not output a signal to the line (L2), but latches the attachment signal from the flash device (IV).

Therefore, it is determined whether there are multiple lights at the (+31) bit. Next, in the (b2) bit, the flash device (II) and (n) simultaneously receive a charge completion signal "Higl+".
”, and the flash controller (I) determines whether charge completion signals are input from both lines (L2) and (Li2).
) means that it is determined whether multiple flashes are being emitted and whether both 7-lash devices are fully charged, that is, whether both are fully charged. If both are in the full state, a light emission start signal can be transmitted to the flash devices (II) and (IV).

In the (b3) bit, the controller (I) is connected to the line (L2
) outputs the multi-flash signal “High” to the flash device (
1v) reads this signal and connects the line (1=1
), the light emission is started at the rising edge of the stop signal from the line (L3), and the light emission is stopped at the falling edge of the stop signal. Thereafter, no signal is output to line (L2) for bits (1)4), (b5), and (bl). (1) For 4) bits, the controller (I) is connected to the line (
1, 2) outputs a both fullness signal “l-1iHII” indicating that both are full, and the flash device (IV)
is in a state where it can emit light. Note that unless both are in the full state, the 'Higl-' sign is not output, so the flash device (IV) does not emit light. In the (+)5) bit, when the controller (1) determines that there are multiple flashes, the output of the line (L2) is set to 'Lou+', and the camera body (III) outputs the output of the line (L2) as 'Lou+' if the line (L2) is 'Loud'. It is determined that there are multiple flashes. If there are not multiple flashes, the flash device (m outputs a "Higb" signal, and the camera determines that there are no multiple flashes. With the ('+36) bit,
The controller (I) does not output a signal when there are multiple lights,
If the flash device (IV) has an FDC signal, the line (
L, 2) is “LOIIII”, H if there is no FDC signal.
igI+". Therefore, in the sequential mode, the camera (III) determines whether the flash device (IV) has dimmed or not. In the (bl) bit, the camera (III) determines whether both flash devices are dimmed or not. “H” appears when charging is complete.
If not, a signal of +1 LowI+ is output, and the camera determines whether or not to perform exposure control in flash photography mode.

Bits that are not necessary for the camera body (III) in the mode of sending data from the above 7 flashes to the camera
In (bl) to (b4), the flash controller (
Data is exchanged between the flash controller (I) and the flash device (m), and the flash controller (I)
Internally, it is determined whether multiple lights are used, whether light emission is possible or not, and the light emission mode is switched.In the flash device (1v), the light emission mode is switched and whether light emission is enabled or not.

During this time, no data is sent from the controller (I) to the 7-lash device (II) through the line (L12), so the flash device (II) is in the same state as in the case of independent light emission. . In addition, the camera body (I
In ll), when it is determined that the mode is multi-flash mode, the exposure time at the tuning limit is made longer by a certain value than in the case of single light emission. (For example, 1/250 seconds for single light emission is 1/125 seconds for multiple lights). This is to prolong the time the shutter is fully open.

When the camera body (III) determines that it is in the sequential mode, when the amount of light emitted from the flash device (IT) reaches 7/10 of the appropriate exposure level, a light emission stop signal is sent from the line (L3). 'Hi Hh'.This causes the flash device (11) to stop emitting light.
When a certain period of time has elapsed since the flash device (11) started emitting light, the flash device (IV) starts emitting light. Then, when the amount of light emitted by the flash device (IV) reaches 3/10 of the appropriate exposure level, the light emission stop signal from the line (L3) rises to "Higl+" again, and the light emission of the seven runcie devices (IV) stops.

Therefore, the ratio of the amount of light emitted by the 7 flash devices (II) and (IV) is controlled to 7:3, and the ratio of the amount of light emitted by the flash devices (11) and (n
) gives the appropriate exposure. Note that even if the flash device (11) emits all the light, it may not reach a level of 7/10 of the proper exposure. At this time, the time required for the flash device (IV) to output a light emission start signal from the line (Ll) and for the flash device (II) to emit all light is counted, and when this time has elapsed, the flash device (Iv) starts emitting light. In this case, the flash device (II).

Although the ratio of the amount of light emitted in (1) is not 7:3, the total exposure can be made appropriate. The reason for such a light emission ratio is that if the subject is irradiated with light from different directions and the light emission ratio is 7:3, the subject will be 7:3 including the part illuminated by both 7 lash devices. This means that the light is irradiated with a light intensity ratio of tO:3, which provides illumination with a three-dimensional effect in photographing portraits and the like. The integral control signal from the line (Ll) sent from the flash to the camera is to output "HiFih" for a certain period of time to perform the first integration, and then output a signal of "LoII+" for a certain period of time to perform the first integration. The first integration is reset and the second integration is performed by outputting a Hi8h" signal again. Then, in the camera, based on the signal from the line (Ll), the first integration period is based on the 7/10 standard. The signal and the integrated output are compared to output a light emission stop signal, and in the second integration period, the 3/10 reference signal and the integrated output are compared to output a light emission stop signal.

In the controller (I), a light emission start signal is input from the line (Ll), and 2. 7 lash device (II).

(IV) is counting the time sufficient for each to fully emit light. Then, after this time has elapsed, the flash device (V) is made to emit light. If this flash device (V) is of a type that independently performs automatic light adjustment and is arranged so that only the background is irradiated, the background can be properly exposed.

Next, a case where the controller (I) is in the simultaneous mode will be described. In this case, even if the controller (I) determines that there are multiple lights, it does not output a multiple lights signal using bits (1) and 3). Therefore, the flash device (IV) is in the same state as in the case of independent light emission. Further, if a charge completion signal is input from either the flash device (II) or (IV), the controller (1) transmits the light emission start signal from the line (Ll) to the flash device (II).
). In addition, the camera body (III) is (b5
) Higl+ from the tear lash device (Iv)
Since the signal "" is output, the calculation for the single light emission mode is performed.Therefore, in this case, only multiple light emission is performed.

Next, attach the controller (I) to the camera, and the flash device (
When the flash device (II) or (1v) and the 7 lash device (V) are attached, when the flash device (II) or (m is fully charged, the 7 lash device (II) or (IV) will receive a light emission start signal. The information is transmitted from the controller (1), and the flash device (11) or (IV) emits light.At this time, the flash device (V) does not emit light.In this case, the camera body (11)) emits light independently. This operation is performed whether the controller (I) is in simultaneous mode or sequential mode.

Next, when the controller (I) and the 7-runchie device (V) are installed, the controller (1) does not output a light emission start signal whether in the simultaneous mode or the sequential mode. Further, the camera body (III) remains in the constant light photography mode.

Table 1 summarizes the operations in each state described above.

In the following, specific examples of the camera body (III), flash units (11 (II) and (IV)), and flash controller (I) shown in FIG. 2 will be explained.

FIG. 3 shows a specific example of the camera body (III). (MC
OB) is a microcomputer (hereinafter referred to as μmcom) that controls camera operations and performs exposure calculations. This μmcom (MCOB) is the main switch (MSI)
Power is directly supplied from the power supply battery (BA9) via the power supply battery (BA9).

All circuits other than the above are transistors (BT
Power is supplied from the power supply line (VB) via II). (PORI) is a power-on reset circuit, and when the transistor (BTll) becomes conductive and power supply from the power line (VB) starts, an initial reset signal (POB) is generated.
Output. (IOC) is a connector (CN1), (
7. Exchanging data with the flash device and flash controller via the connector (CN6)
20), and a specific example of this input/output control circuit (IOC) is shown in FIG. μmcom(
MCOB) terminal (SCKB) is a terminal that outputs a synchronizing clock pulse during input/output of serial data, and (SOUTB)
) is a terminal for outputting serial data, and (SINB) is a terminal for inputting serial data. A circuit example of this serial data input/output section is shown in FIG.

Input/output control circuit (IOC) lines (Ll), (R2)
, (R3) are connected to a data output circuit (LEC) on the lens side via connectors (CN20) and (CN21). Line (Ll) sends a synchronizing clock pulse to the data output circuit (LEC), and line (R2) sends a "Hi8h" signal from the camera body to the data output circuit (LEC) while reading data. Also, line (R3) 1
．． This is a terminal through which data is sent in series from the 11 data output circuit (LEC) to the camera body. Data output circuit (LE
A specific example of C) is shown in FIG.

(STPC) is a light emission control circuit including a photometry circuit for controlling light emission of a flash device. This light emission control circuit (
A light-receiving element inside the STPC is provided at a position to receive object light that passes through a controlled aperture and is reflected from the film surface. The light emission control circuit (STPC) is connected to the line (I
When the light emission start signal "Loud" is input from S'rR), integration of the output current of the light receiving element is started, and when the integrated value reaches a predetermined value, the line (FSTP) is set to "Higb".

A specific example of this light emission control circuit (STPC) is shown in FIG.

(LMC) is a photometric circuit for ambient light, and the output of the photometric circuit (LMC) when the lens aperture is open is used as the photometric output. This photometric output is μ−〇〇Ill(MC
OB) is input to the analog input terminal (ANI), and the output of the reference voltage source in the photometric circuit (LMC) is μ-c.
Reference voltage input terminal (VRI) of oIII (MCOB)
) is being manually powered. and μmco1o (MCOB)
performs AD conversion of the photometric output input to the analog input terminal (ANI) based on the reference voltage of the terminal (V RI ). In addition, the analog output terminal (ANO) of μmcom (MCOB) also serves as a D-A converter used in the A-D converter in μmcom (MCOB), and outputs digital data corresponding to the film sensitivity. is converted into an analog signal and output to the light emission control circuit (STPC).

Since the specific example of the photometric circuit (LMC) is well known, a description thereof will be omitted. Note that the light receiving element of the photometric circuit (LMC) and the light receiving element of the light emission control circuit (STPC) are the same,
Furthermore, each circuit may also be used in common.

(ALDB) is over the condition of the flash photography device! This is a display section for under warning. This display section (ALDB) will be explained based on FIG. 4. First, I will explain about flash. The output terminals (08) and (010) of μmcom (MCOB) output the signals shown in Table 2 depending on the status of the flash device, and the light emitting diode (FLD)
displays accordingly.

That is, if the flash device is not installed or if the flash device's power switch is not closed even if it is installed, the AND circuit (ANl) - (ANO)
All outputs become “Loud” and the light emitting diode (
FLD) is off. When the flash device is installed and the power switch is open, the charging completion signal is also F.
In a situation where no DC signal is input, an AND circuit (AN
The output of I) becomes “High” and the AND circuit (AN
4) Counter (Cot) via OR circuit (OR5)
A 287° clock pulse is output from the terminal (R3), and the light emitting diode (FLD) blinks at 2 Hz.

Next, when the charge completion signal is input and the FDC signal is not input, the outputs of the AND circuits (A N2), (A N4), and the OR circuit (OR5) become "High" and the light emitting diode (FI- D) lights up. When the FDC signal is input, the output of the AND circuit (AN3) is “
Hi8I+” becomes AND circuit (ANO), OR circuit (
An 8Hz clock pulse from the terminal (El) of the counter (COI) is output from OR5), and the light emitting diode (FLD) blinks at 8l-lz.

Next, over and under warnings will be explained. First, in the ambient light shooting mode, when the exposure time and aperture value for control are set to exposure 7\-,
The terminal (012) becomes “Higb” and the AND circuit (A
4.N7) from the terminal (E2) of the counter (Cot). A light emitting diode (OLD) blinks at 4 Hz when a Hz clock pulse is applied.

On the other hand, if the exposure time and aperture value for control are underexposure due to constant light, the terminal (014) will be "1.-1".
lgb". This makes the AND circuit (AN8)
4H2 from the terminal (E2) of the counter (COt)
The clock pulse is output and the light emitting diode (UL
D) blinks at 4Hz. In addition, when exposure with constant light is appropriate, terminals (012) and (014) are “
Low” and the light emitting diode (OLD) t(
tJLD) remains off. On the other hand, in flash photography mode, when the exposure due to ambient light becomes overexposure, the light emitting diode (OLD) blinks at 4Hz to warn you of overexposure, but when the exposure due to ambient light becomes underexposure, the light emitting diode (OLD) blinks at 7 Hz. Since the probability of proper exposure is high with light, light emitting diodes (OLI)) are used as in the case of proper exposure.

(ULD) remains off and no under warning is given. In addition, when the exposure control operation starts and the 7-resop/70-tube (RF3) is set (Fig. 13), the 77
~ The outputs of circuits (AN4) ~ (AN8) are "L 011
1", and the light emitting diode (1"]-D), (01-
D), (ULD) Lamp light.

The switch (LLS) is a switch that is closed when the interchangeable lens is mounted and locked, and is opened when the interchangeable lens is not mounted and locked. μ-Coin (MCOB > is the closing signal of this switch (LLS) “” I-(i gb)
is input to the terminal (I4), the data from the data output circuit (LEC) of the lens is read, and an aperture photometry calculation is performed based on the read data.

On the other hand, the closing signal of this switch (LLS) is transmitted to the terminal (I4
), data from the lens will not be read and actual aperture photometry will be calculated based only on the photometry output. Also, when the closing signal of the switch (LLS) is input to the input terminal (I4), u-coin (M
COB) causes the automatic focus adjustment control circuit (FCO) to perform automatic focus adjustment operation, but the switch (L
LS) is open and the opening signal is not input to the input terminal (I4), the automatic focus adjustment control circuit (FCO)
automatic focus adjustment operation is not performed.

The decoder (DECI) uses μ-coin (M COB
) output capo) Based on the data from (OP), one of the terminals (ao)-(a7) is set to "l-1"
i Hh”.

Then, an external data bus (OD
Data is exchanged through B). Decoder (1
)E C1) Table 3 shows the relationship between the input and output selected blocks and the contents of the data bus (ODB). -(MO
S) is a block that outputs data on the set exposure control mode, (AP'S) is a block that outputs data on the set aperture value, (ETS) is a block that outputs data on the set exposure time, (FSS) is a block that outputs data of set film sensitivity.

The automatic focus adjustment control circuit (FCO) is μmeolfl
(MCOB) output terminal (020) is “l-1iHb”
During this period, the automatic focus adjustment operation is performed, and when the 1'-J moving point adjustment operation is completed, μmcoma (M CO1
3) Outputs a "Higb" signal to the input terminal (I6). The automatic focus adjustment control circuit (FCO) converts the subject light that has passed through the photographic lens into a light receiving element (
MLM) (consisting of a CCD, for example).
Based on this output, the defocus direction and defocus amount of the subject image are calculated. Then, μmcoai (MCOf3) reads from the data output circuit (LEC) of the lens and latches it in the latch circuit (1-Act) via the data bus (ODB).
The photographing lens moves by the rotation of the motor (M), and when the subject image moves due to the movement of this lens, the external motor (
The amount of rotation (V) of the motor (LDM) to the in-focus position is calculated based on the defocus amount coefficient for the rotation amount of the LDM) and the above-mentioned defocus amount. Then, the motor (4 to LD) is rotated in the direction corresponding to the defocus direction, and the photo sensor detecting the rotation of the motor (Ll)
Count the output pulses from the coupler (PHC2),
When the count value matches the calculated rotation amount value, the rotation of the motor (LDM) is stopped. A detailed description of this automatic focus adjustment operation will be omitted.

(DPB) is a display circuit with 7 lips and 70 knobs (
When RF3) is set, the terminal (a5) is set to “1”.
gl+” via the data bus (ODB)
The exposure control mode and exposure control value are displayed based on the display data sent from m (MCOB). Then, when the exposure control operation starts and the 7-lip/70-tub (RF3) goes into the reset state, the display turns off. Note that when using a display means that is not a light-emitting type and consumes less current, such as a liquid crystal display, there is no need to turn off the display even when the exposure control operation starts.

(APCC> is an aperture control circuit. This aperture control circuit (A, P, CC) is a data bus (C) [') I3
) is sent from () to the number of aperture steps for constant light exposure △A
va or number of aperture steps for 7-ranche light exposure △Avf
control the aperture based on the data. μmCOI
II (MOOB) output terminal (018) Cal')
When I-11B11'' NOHARUS is output, the release circuit (R-C) operates and the narrowing down operation starts.Then, from the 7 automatic coupler 7 (PHCI), the narrowing down section 4, 4 ( The aperture control circuit (APCC) counts these pulses, and when the count value matches the aperture stage number data ΔAva or Avf, the magnet circuit (MCI)]
Activate to stop the narrowing down operation. In the manner described above, the aperture is controlled to the planned aperture aperture Ava or Avf.

(ETCC,) is an exposure time control circuit. This exposure time control circuit (ETCC) controls the shutter open time based on the data of the regular exposure time Tva or the flash photography exposure time Tv4 sent from the data bus (Or)B). When a pulse of "! (iBb") is output from the output terminal (018) of μmco11+ (MCOB), the flip 70 tube (RFI) is turned on and the magnet circuit (MGD2) operates, causing the shank to
Locks the running of the rear curtain. Reflection mirror (not shown)
When the first rise is completed and the shutter front curtain starts running, the switch (S3) is closed and the exposure time control circuit (ETCC) is closed.
) counts the time based on the sent data Tva or Tvf, and when the count ends, outputs a pulse of ""I-11811" from the terminal (TIE). This pulse is passed through the OR circuit (01<+). to reset the 7 lip and 70 knob (RFI), and then reset the magnet circuit (MCI) 2.
) becomes inactive and the rear shutter curtain starts running.

In addition, the Q output of the 7 limp flop (RFI) is input to a delay circuit (DLL), and this delay circuit (DLL)
The output of the light emitting control circuit (STPC) is inputted to the light emission control circuit (STPC). The delay time of the delay circuit (DLR, ) corresponds to the time from when the shutter trailing curtain starts running until it starts covering the film surface, and this time allows photometric integration for controlling the amount of light emission.

Next, specific circuits of each part in FIG. 3 will be explained.

Figure 5 shows the serial data input/output section of μmcon (M CO!3), and shows the μmcon (M CO!
(It has the same configuration as the serial data input/output section of 2 o+n (M COF). 7 limp/70 limp (I]'+
7) ~ (+) Fl, O), (D F27) ~ (DF20
) consists of shift register 1, and flip flop 7
The 0 pins (DF27) to ([)F20) capture and output the data from the 1st focus at the rising edge of the clock, and the 7/70 pins (DL17) to (DFIO) capture and output the data from the 1st focus at the falling edge of the clock. It takes in data from bits and outputs it. Also, 7 rip 70
Knobs (DLl7) to (DFIO) are terminals (+107) to (1)00) from the internal data bus (II)B),
By being set and reset by the signals from (+117) to (+310), the output data is set and the terminal (
internal data bus (ID) via b27) to (+320)
Output the read data to B).

lNCl0UTC is a state signal for selecting whether to use the internal clock or the external clock as a synchronization clock for input/output. If this signal lNCl0UTC is "IIigh", the internal clock INcLK is used as the synchronization clock. With the AND circuit ()A
This clock is outputted to the terminal (SCK) via the terminal (Nl5), and is also provided to external circuits as a synchronization clock. On the other hand, the signal lNCl0LJTC is II l-oII+11
If so, data input/output is performed using the clock manually input from the terminal (SCK) as a synchronization signal.

If there is a serial input/output instruction 5l110, 71 no.mp.7
The 0 knob (1'?-1" 5) is set, and the AND circuits (ANIO) and (ANIL) become active,
Synchronization clock is counter (co3) and flip 7
0.mp (DFl7) ~ (I) FIO), (D F2
7) to (DF20) are given. Then, each time the clock rises, the data set from the 7-rip 70 amplifier (DF20) to the terminal (SOUT) is sequentially output from the lower bit node, and each time the clock falls, the data set to the terminal (SOUT) is sequentially output from the lower bit node.
The data input to the 7-lip/70-tub (DF17) is taken into the 7-lip/70-tub (DFl7), and is sequentially transferred to the 7-lip/70-tub of the lower bits. 8 on the counter (CO3)
If the second clock pulse is manually generated, 1. Re-terminal (
When CY) becomes “HiHh” and these 3;11 clocks fall and become “Loud”, the AND circuit ()
The output of AN12) rises to "Higb". As a result, the counter (C03) is reset and the data output operation becomes f+.
At the same time, the "Ij iHh" pulse from the AND circuit ()AN12) becomes the signal l10END indicating that the serial data input/output operation is completed. Then, when this A word l10END is output, the terminal -(
The data can be read via the terminal l+27)-(+)20). Also, if you want to output a new data, use 4
r(1+07)~(boo), (b17)~(b
lo) via Furi, Bu, 70°p (DFl, 7) ~ (
DFIO) can be set or reset. Figure 6 shows the data input/output circuit (IOC) and the light emission control circuit (S
l']" C) branch body example, and the light emission control circuit (STPC) is surrounded by a broken line. When the terminal (02 pin is Higl+" and the terminal (04) or "'l-9w" is , the data from the data output circuit (L, EC) of the lens is read.In other words, at this time, the AND circuits (AN15) and (AN17) are in the operable state, and the data is read from the terminal (SCKB). The clock pulses of . .
) The data from the data output circuit (LIE C) that is manually input from
7) Manually input to the terminal (SINF3) of u-coin (MCOB). Also, terminal (02)
Lens' selection signal (C3LE) from 1. i:, terminal (
The signal is sent to the data output circuit (IEc) via the BL3), and the data output circuit (LEC) is put into an operational Hf-enabled state.

Next, data exchange with the 7 runcie device will be explained. In this case, the terminal (04) becomes "'High" and the flash selection signal (C3FL) is output, and the AND circuit (ANl, 9), the can 12 circuit (NAI), (NA3
) is ready for operation. First, from terminal (06), F L CA signal (50 microsecond pulse), CAP
When the I-signal (100 microsecond pulse) and release number 4M (150 microsecond pulse) are output, these signals are sent to the NAND circuit (NAI) via the OR circuit (OR5).
), the transistor (HTI5) conducts and the terminals (B F13) and (B F23)
gI+” pulse is output. Also, the terminal (SCK
The clock pulse from B) is also sent to the OR circuit (OR5
), NAND circuit (NAI), transistor (BTI5)
It is output from terminals (B F13) and (B F23) via.

Data from the flash device is sent to the terminal (B F12), (
13F22), the data will be “Hi EI
11”, the transistor (BT19) is conductive,
When the data is “°1.(drama)”, the transistor (BT1
9) becomes non-conductive. "I-1i g l+",'L due to conduction/non-conduction of this transistor (BT19)
The owl signal is inverted by an AND circuit ()AN19) and input to a terminal (SINB) via an OR circuit (OR7). Note that at this time, the transistor transistor (BT19) remains conductive, so
7. When reading data from the rush device, before reading the data, set the flip-flop 70 tube (1) in Figure 5 to '17) = (1
)Flo) and reset it, then connect the terminal (SOUT
The output from B) is always L, ou+”, and the NAND circuit (
NA3) output 'Higl+', !:) 27ji
(BTI7) is always kept non-conductive. On the other hand, when sending data from the camera body to the flash device, use the data output terminal (SOUT B) color "I-l-1".
When the "i+" signal is output, the output of the cuff 1 circuit (NA3) becomes "Loud", the transistor (BT17) becomes conductive, and the "'HigI+" signal is output from the terminal (BF12).
), (B F22), and the terminal (SOUTB)
When the signal "LouI" is applied, the output of the NAND circuit (NA3) becomes "Hi811" (1), and the transistor (B'r17) becomes non-conducting.
The ull signal is connected to the terminal (B F12), (B F22)
is output from. The human output section for exchanging data between the flash device, controller and camera body is the flash device,
The data output side of both the controller and camera body is PNP.
) transistors, and the data input terminal is composed of NPN) transistors. Next, the light emission control circuit (S'"PC
) will be explained below. (PDI) is a light-receiving element that receives reflected light from the film, and this light-receiving element (PI]) is the 2-input terminal 1 of the operational amplifier (OA2).
11j, and a logarithmic compression diode' (1
)30) are connected. An analog signal corresponding to the apex value of the film sensitivity is input from the analog output terminal (ANO) to the non-inverting input terminal of the operational amplifier (OA2) via a buffer that goes up to the operational amplifier (OA+). Therefore, the operational amplifier (OA2) outputs a potential corresponding to the sum of the 7 benx value of the object light intensity reflected from the film surface by the 7 ranciture device emitted and the apex value of the film sensitivity, and the 1 ranister ( BT23)
By extending this potential to a current by a number of months, the collector current of the transistor (B1'23) corresponds to the value obtained by multiplying the object light intensity by the film sensitivity. Also, at this time,
Since the aperture is controlled to a ten constant aperture, aperture information is also included in the object light. Therefore, when the value obtained by integrating the collector current of this transistor (BT23) reaches a predetermined value, it means that the 7-runcie device has emitted light by an amount that provides proper exposure.

As mentioned above, the 7 lip and 70 lip (1<F
l) is the terminal (01
When the release pulse is output from 8), the camera is activated.
When the exposure time count is complete, 3) will be displayed.

Therefore, the output of the delay circuit (DLI) is "I-(igb") from a certain period of time after the release pulse is output until a certain period of time after the shutter trailing curtain starts running. The AND circuit (AN21) is in the operable state.When the front curtain of the shutter completes running and the X contact (Sx) closes and the flash device starts emitting light, the The line (F2) is
O...'', the transistor (BT19) becomes non-conductive, and the output of the AND circuit (AN2j)
The transistor (13T52) becomes non-conductive. As a result, integration of the collector current of the transistor (BT23) by the capacitor (CIO) is started.

From the analog output terminal (ANO), Fil is emitted independently.
When in l In7 rush mode, S, v − (1
, 5+1 signals are output, and hereafter Fill is performed by individual light emission.
-When not in 1n7 rush mode, Sv-〇, 5,
In the sequential mode, when the F"ill In7 flash mode is selected, Sv+1 is output, and when the sequential mode is not in the Fill-I+1 flash mode, the Sv "A" is output. ) is reset by release pin 11 from the terminal (018), and at first the transistor (BT51) conducts and the resistor (
R31) is in the active state. And the line (F
2) falls to “LoIIl”, flip 7
The output of the 0tube (TFI) is inverted and the output of the transistor (BT
50) becomes conductive and the resistor (R30) becomes active. Constant current 'm (CI 10) resistance (R3), J:
') The circuit that does this has a value of 70.7, which corresponds to proper exposure.
The circuit consisting of a constant current source (CIHI) and a resistor (R30) outputs a potential signal of 2%, which corresponds to the proper exposure.
Outputs a signal with a potential of 9.3%. In addition, 2'-0°5
There is a relationship: /2sv==o, 707. Therefore,
First of all, when flashing independently and not in Fill In flash mode, the analog output terminal (ANO) outputs 3V.
Since the signal of O,5 is output, the capacitor (CIO)
When the integrated potential of the resistor (R30) matches the output potential of the resistor (R30), the amount of light emitted by the 7 runs has reached an appropriate level, and at this time, the output of the comparator (AC20) is inverted to "Lo". The transistor (BT13) becomes conductive and the line (R3) goes to "Higb", and this signal causes the flash device to stop emitting light.

Next, when in the lower 1ll-1n7 rush mode with individual light emission, the analog output terminal (ANO) is 5v-0, 5+
1 signal is output. Therefore, in this case, the integrated potential of the capacitor (CIO) is 1 lEv below the proper exposure (50% of the proper exposure), and the resistance (I(3
0), and at this time the comparator (AC20
) is reversed to "Loud" and the flash device stops emitting light.

When the sequential mode is not the Fill-In7 runtime mode, the Sv signal is output from the analog output terminal (ANO). In this case, the capacitor (CIO)
When the integrated potential matches the output potential of the resistor (R30) and the output of the comparator (AC20) is reversed to 1゜oIII゛, the first 7-lanoshu device emits light up to 70.7% of the proper exposure. The output of this comparator (AC20) is inverted and the line (
Light emission is stopped at the rising -1- signal of L3).

After a certain period of time has elapsed from the start of light emission, the line (1=2)
is reversed to 11 L oIII and 7 limp 70
The output of the knob (1゛F1.) is inverted and the resistor (R3) becomes active. Then, the line (R2) is “Lou
d", the transistor (BT52) becomes conductive and the charge in the capacitor (CIO) is discharged. Then,
After a certain period of time, the line (L 2 ) returns to I-1i 8
1+'', and the integration by the capacitor (CIO) starts. Then, at the same time as the line (R2) becomes ``High'', the 7 lash device of 2nd 1] starts emitting light.The capacitor (C10) When the integrated potential reaches the output potential of the resistor (R30), the 7 runshot device emits light by 29.3% of the proper exposure.At this time, the output of the comparator (AC20) is inverted to "LoII+", The transistor (BTI3) conducts again and the line (R3)
is inverted to "l-1iBI+". Then, the flash device that emitted light later was connected to the "'High" on this line (R3).
The light will stop emitting light when you press the "h" button. In other words, in this case, the first flash device emits 70.7% of the light and the latter 7 flash devices emit light by 29.3% of the proper exposure, resulting in a ratio of approximately 7:3, and the total amount of light is equivalent to the proper exposure. Become. - power, sequential light emission mode and Fill-In 7 lash mode, a signal of Sv+1 is output from the analog output terminal (ANO). Therefore, the first flash device to emit light is 70.7÷2=3 for proper exposure.
It stops emitting light when it emits only 5.35% of the light, and the 7 lassoie device that emits light later stops emitting light when it emits only 14°65%. Therefore, in this case as well, the ratio of luminescence amount is approximately 7:3.
Therefore, the total amount of light is 5()% of the proper exposure. The independent light emission mode also includes a simultaneous light emission mode.

Table 4 summarizes the operation of the above light emission amount control circuit (STI) C).

FIG. 7 shows four examples of data output circuits (LECs) for interchangeable lenses, and this example is for a zoom lens.

(COD) surrounded by a broken line is a code board that outputs data corresponding to the set focal length. (FPO)～(
FP4) is an electrode pattern provided on the "code plate", and these patterns (+-"F'0) ~ (FP4)
is connected to the power supply terminal (LLI) via a pull-up resistor.

Further, (COP) is a single co-tracing pattern connected to ground. The sliding member (V i' ) has an electrode pattern (l・PO
) to (FP4), and outputs data corresponding to the positions via inverters (INIO) to (IN+4).

#-com (MCOB) output terminal (02) in Figure 3
When the C3LE signal becomes "High" and the C3LE signal is output, the counters (CO5) and (CO7) in FIG. Then, when a clock pulse is input from the terminal (LL2), the counter (CO5) changes the outputs (C2) to (CO) in synchronization with the rising edge of the clock pulse, as shown in Table 5. Then, the outputs (dO) to (dl) of the decoder (DE5) become "'Hi81+" one by one. As a result, the AND circuits (AN30) to (AN37) to which the output terminals (dO) to (dl) of the decoder (DE5) are connected are sequentially connected to 1
It gradually becomes operational. AND circuit (AN3
The output data (ro) of the ROM (RO) connected to the other input terminal of 0) to (AN37), respectively.
β7) is an OR circuit (
OR9) is output from terminals (LL4), (BL4) (
Figure 3), μmcom via the input/output circuit (IOC)
(MCOB) is applied to the serial data input terminal (SINB) and is sequentially read at the rising edge of the same clock pulse as the clock pulse output from the terminal (rscKB).

The carry-1 terminal of the counter (CO5) changes the output to "High" when the 8th clock pulse rises and falls to "Loud" when the next 1st clock pulse rises. ) outputs (C3
) to (C6), the decoder (D E7)
As shown in Table 6, the output (β8)−(dl2) is changed according to the output of this counter (CO7). The data selector (DSI) is the decoder (DE7)
The output terminal (dl2) of the decoder (DE7) outputs the data from the human power section (β0) as the address data of the ROM (In) between II l and owll, and the output terminal (cll, 2), when it becomes "I-l-1i", the taper from the input section (β1) is output as the address data of the ROM (RO). Therefore, ROM(RO
) is the count of the counter (C07).
) to (S8), the addresses in which the fixed data is recorded are specified in sequence, and in the steps (S9) to (SB), data that changes according to the focal length set by the zoom lens is stored. addresses are specified in order.

In the (SO) step, address ゛' 11 +l I
I" is specified, and check data is output from the ROM (RO). This data is sent to the data output circuit (L
EC), the same data is stored in this address "OO11". In the step (Sl), the address "'01 II" is designated, and the data of the open aperture value AvO of the lens is output from the ROM (RO).

Note that in the case of a zoom lens whose aperture value changes depending on the focal length, data of the open aperture value (smallest value) at the shortest focal length is stored at this address "01 II". In the (Sl) step, the address ``0''
2 II" is specified, and the data of the maximum aperture value A vm (aperture value at the minimum aperture) is output. In this case as well, in the case of a lens whose aperture value changes depending on the focal length, the minimum focal length In the step (S3), the address "03 II" is specified and focal length data is output.

In this case, if it is a zoom lens, the data of the longest focal length is stored at this address "'03+1".

In steps (S4), (S5), and (S6), open photometry error data is output. The aperture photometry error is caused by the difference in the exit pupil position of the interchangeable lens and the position of the light receiving element of the camera body relative to the film surface, so this value will differ for different types of camera bodies even with the same interchangeable lens. Therefore, the interchangeable lens has three types of data for the camera body at addresses "04+1" and "051" in the ROM (RO).
1", °"06+1", and the camera body adopts the data suitable for the camera body from among the read data. In the step (S7), the address "'0711" is stored. is specified, and a data indicating whether automatic focus adjustment is possible is output.Next, in step (S8), ADULTS "0811" is specified, and the rotation speed of the motor and lens used during automatic focus adjustment are specified. A value is output as a conversion coefficient between the amount of movement and a value of .If the zoom lens has a variable K value, for example, a value of - at the longest focal length is output.

The above is the fixed data sent from the lens.

When the output of the counter (CO7) becomes "1, (month)", the terminal (dl, 2) of the decoder (DE7) becomes l-11.
Fil+", the data selector (DSI) outputs the data from the input section (β1).The input section (
The third three bits of β1) are manually output from the decoder (1) E7), and the lower five bits are input with data from a code board (COD) that outputs data corresponding to the set focal length. Therefore, in step (S9), '001
One of the addresses from "00000" to "001 11111" is specified, and data indicating the set focal length is output.Next, in the (SIO) step, "oi
o One of the addresses from "oooooo" to "010111.11" is specified, and the amount of change Δ from the aperture value at the shortest focal length at the set focal length is specified.
Avz is output.

Then, in step (S11), “01101300
One of the addresses from 0'' to 01111111 is specified, and the value at the set focal length is output.

Next, μmco in Figures 8-1, 8-2, and 8-3
The operation of the camera body (Ill) in FIG. 3 will be explained based on 70-diaert indicating the operation of n+(MCOB). Fig. 8-1 shows the operation when the photometric switch (Sl) is closed, Fig. 8-2 shows the operation for 5 seconds after the photometric switch (Sl) is opened, and Fig. 8-3 shows the operation for 5 seconds after the photometric switch (Sl) is opened. The figure shows the operation when the release switch (S2) is closed.

When the photometric switch (Sl) is closed, μmcom (M
An interrupt signal is input to the interrupt terminal (ita) of the COB),
μmcom (M COB ) starts operation from a specific address. First, by setting the flag MSF to “1” and setting the terminal (00) to “High”, the inverter (IN
S) makes the transistor (BTll) conductive, and fi-coln (M C
Starts power supply to circuits other than O13). Additionally, by starting this power supply, the power-on reset circuit (POR
]) operates, a reset signal (PoB) is output, and μ
Various circuits connected to mCOIo (MCOB) are set to an initial state. And in step #3,
The switch (LLS) is closed and the terminal (14) is connected to “l-”.
By determining whether the signals 1igl and 11 are input, it is determined whether the lens is attached. If the terminal (i4) is "HigI+", the lens is attached, so the process moves to the operation of reading data from the lens in steps #4 to #11, and the terminal (i4)
) is "Loiu", the lens is not attached, so in step #12, the contents of the register D'NR for specifying input data are set to "'0C11" and the process moves to step #15.

Here, Table 7 shows the relationship between the contents of register DNR, the data taken in corresponding to the contents, and the memory register M(DNR,) to which the taken data is set. .

In step #4, the terminal (02) is set to "Higb" to output the lens selection signal (C3LE), and the contents of the register DNR are set to 0011 to perform serial data input/output operation in step #6. When the output operation is completed, the captured data is stored in memory register M (DNR
). Then, the contents of register DNR become °“
Determine whether the status is “OCI+” and select “OCI+”
If not, return to step #6 and read data from the next lens. Repeat this operation until the contents of register DNR are changed to “OCH” in step #10.
”, the memory register Moo-MoB +? has been set with all the data from the lens shown in Table 7. Then, in step #10, the contents of the register DNR are set. °When it is determined that the value has become “0C11”, the terminal (0C11) is determined in step #11.
2) is set to "LO-", the lens selection signal (C3LE) is removed, and the process moves to step #15.

In step #15, the terminal (04) is set to "Higb" to output the flash selection signal (C8FL), and the terminal "06" is set to "High" for 50 microseconds to send the FLCA signal to the flash device. Then, "'0011" is written to the series input/output shift transistor (Figure 5).
Set to perform serial input/output operation. When the input/output operation is completed, the data indicating the status from the manually input flash device (installation signal, charging signal, FDC signal, multi-flash signal) is set in the memory register Moc, and 1 is added to the contents of the register. Set it to “ODH” and step #25
The process moves on to the data capture operation set on the camera side in ~#30.

In step #25, the contents of register ABR are set to “OOH”.
”, and in step #26, the contents of Renstar ABR are output. Then, as shown in Table 3, output capo) (
Setting data selected in accordance with the output of the OP) is output to the external data bus (ODB), and this data is taken into the memory register M (DNR). And register DN
Add 1 to R and the contents of register ABR, and register AB
It is determined whether the content of R is 4, and if it is not 4, the process returns to step #26 and the next setting data is imported. When it is determined in step #30 that the contents of the register ABR are 4, an A-D conversion operation is performed in step #31, and the output of the photometric circuit (LMC) is A-D converted. .

Then, in step #32, the flag MSF is “1”
Determine whether or not. This flag MSF is "1" when the photometry switch (Sl) is closed and reaches this step #32, and when the timer interrupt (5 seconds after the photometry switch (Sl) is opened) comes to this step #32, the flag MSF is set to "1". When I came to I32, it was "O". And since automatic focus adjustment operation is not performed outside of the operation by timer interrupt, #
In step 41, add 1 to register ABR to change the contents to 5.
After that, proceed to step #38.

On the other hand, if it is determined that the flag MSF is "1" in step #32, data indicating that the lens is attached and automatic focus adjustment is possible from the lens is manually input in step #33. Determine whether the If data indicating that automatic focus adjustment is possible is not input, the process proceeds to step #38 via step #41. On the other hand, if data indicating that automatic focus adjustment is possible is input, the data for automatic focus adjustment (K value, maximum aperture value, etc.) is output to the input/output capo (IOP) in step #34, and the register Output ABR contents 4) (OP
). Then, as shown in Table 3, the terminal (a4) of the decoder (DECI) in Figure 3 becomes "l-1iHh".
At this rising edge, the automatic focus adjustment data is latched into the latch circuit (LACI). Then, after adding 1 to the contents of the register ABR to make it 5, the terminal (020) is set to "Higl+" to operate the automatic focus adjustment circuit (FCO), and the process moves to step #38. Step #38 is an exposure calculation step, and calculations for 7-lash photography and constant light photography are always performed. This specific example is shown in FIGS. 9-1 and 9-2. When the exposure calculation is completed, the terminal (1
2) becomes “High” and the reset switch (S
4) is closed. If it is determined that the reset switch (S4) is closed, the exposure control mechanism is not in a state where exposure control is possible, so the process directly proceeds to step #45.

On the other hand, if it is determined that the reset switch (S4) is open, the exposure control mechanism is in a state where exposure control is possible, and the exposure control data has been calculated, so step #40 Enables interrupt to terminal (iLb) by closing release switch (Sl) #45
Move to the next step.

In step #45, it is determined whether a charge completion signal is input from the flash device based on the data from the 7 flash device stored in the memory register Moc. When the charging completion signal is input, the contents of the register A L R1 are transferred to the terminal (012).
By outputting to (014), an over/under warning signal for 7-lash photography is output, and display data for flash photography (exposure control value, mode, Fill-In, etc.) is output from the input/output boat (rop). External data bus (OD
B).

On the other hand, if it is determined in step #45 that the charge completion signal has not been input, the contents of register A I-R2 are output to terminals (012) and (014), thereby allowing overloading for constant light photography. In addition to outputting an under warning signal, display data for constant light photography is sent to an external data bus (O
DB). Transfer display data to external data bus (OD
After outputting to B), the contents 5 of register ABR are then output to output port) (01?).

Then, as shown in Table 3, the display data is displayed on the display section (D
PB). Then, in step #50, output a "Higb" pulse to the terminal (01B), set 7 lip/70 knob (RF3), and output the "HIGb" pulse to the terminal (ALD).
is set to “High” and the display section (ALD), (D-PB
) is displayed.

In step #51, it is determined whether the lens is attached and check data has been input, and if the check data has been input manually, the process goes to step #52.

move to In step #52, the calculated aperture value Avr for flash photography is set in bits b6 to bo of the input/output shift register, and then, in step #53, it is determined whether or not the Fill In7 rush mode is selected. If it is Fill In7 rush mode, set the b7 bit to 1, and if it is not Fill In7 rush mode, set "0" to bit 1), bit 7, and bit 2. on the other hand,
If the check data is not input in step #51, the aperture value has not been set to nm, and the aperture value is not set in nm in step #56.
“78H” is input/output shift register 1)7 to 1)0
bit, and move on to step #57. And #57. #58. In step #59, connect the terminal (06
) as “HigI+” for 100 microseconds.
The signal is sent to the 7-lush device, a serial data input/output operation is performed in step #60, and this data is sent to the 7-lush device. When the data input/output operation is completed, next, in step #62, the exposure control mode data is transferred to 117. of the input/output shift reno star. ' Set the b6 bit, then set the film sensitivity data bv to 1) 5 to bO
Set the bit to perform serial data input/output operation,
Send this data to the flash device.

When the sending of this data is completed, the terminal (04) is set to "Lou+" in step #6, the flash selection signal (C3FL) is removed, and the process moves to step #7(). Here, data sent to the flash device C is shown in Tables 8 to 14.

At step 70, the terminal (io) is “l-1i gI
+", that is, whether the photometric switch (Sl) is closed. When it is determined that the photometric switch (Sl) is closed, the process returns to step #:). Data reading and calculation operation are performed again.On the other hand, if the photometry switch (Sl) is not closed, #71
In the step, set the terminal (020) to the soil (temperature) to prevent the automatic focus adjustment operation, and set the flag MSF to "°
Determine whether it is 1. When the flag MSF is "1", it means that the photometry switch (Sl) is open. In this case, the flag MSF is set to 0, and it is determined whether the terminal (12) is "Hi gb", that is, whether the set switch (S4) is closed. If the reset switch (S4) is set to 1fiIt and the exposure control mechanism is not in a state where exposure control is possible, the terminal (iLa) is enabled to receive an interrupt signal, and the terminal (00) is Loud”, the power supply from the line (VB) is stopped, and the state becomes CEND. In this case, C.E.
The way to get out of the state of Nl) is to connect the terminal (iLa)
It only provides an interrupt signal by closing the photometer input inch (Sl).

In this CEND state, μmcom(MCOB)
is in a low power consumption state, with only the internal counter in operation.

When it is determined in step #74 that the reset switch (S4) is open, data fetching and calculation/display operations are repeated for 5 seconds from this point.

Therefore, in step #75, the terminal (ita), (iLl
+), and the timer interrupt signal generated by the count up of the counter in μmcom (MCOB) can be accepted, and the data 5S[) for counting 5 seconds is stored in the register T I. Set to RO and enter the CEND state. Furthermore, if it is determined in step #72 that the flag MSi is 0, this means that this step has been reached by a timer interrupt, and in step #79, the terminal (ita) (
itb) and timer interrupts.
I) become a state.

FIG. 8-2 is a 70-chart showing the operation by timer interrupt. This timer interrupt is, for example, 250 mi I7
An interrupt signal is generated every second, and if μmcoro (MCOB) is in the timer interrupt enabled state, the operation from step #85 is performed every 250 milliseconds.In step #85, the terminal (iLa ), (iLb), and in step #8G subtract a constant value aO from the contents of register TIRO.Then, it is determined whether the contents of register TTRO is O or not. , if it is not 0, the timer interrupt is enabled and the process returns to step #3 in Figure 8-1, where the data acquisition, exposure calculation, and display operations described above are performed.Meanwhile, in step #87, the register (TI
When it is determined that the content of RO) is O, 5See
has passed, so set the terminal (00) to "Low" to stop power supply from the original line (VB), and then
It becomes DAk state. In this case, switch the photometry switch again (
sl) is closed and an interrupt signal is input to the interrupt terminal (iLa), μmco+o(M COB ) is CE
It remains in the ND state.

FIG. 8-3 is a 70 chart showing the operation of μmcom (MCOB) when the release switch (S2) is closed. When the release switch (S2) is closed and the interrupt signal from the interrupt terminal (itb) can be accepted, the operation from the step 95 is started. In the #95 steering knob, the terminal (020) is set to "'Lou+" to stop the automatic focus adjustment operation.

Then, when an interrupt signal is input to the terminal (itlx),
Since μmcoin (MCOB) may be performing serial data input/output operation, it is determined whether data input/output operation is performed, and if input/output operation is performed, this operation is completed. wait for. Then, as soon as an input/output operation is performed (if not), or as soon as this operation is completed if an input/output operation is performed,
] Move to step 7 and set the terminal (02) to “LouI”
(In case you are reading data from the lens)
, set the terminal (04) to "H1Fib", output the 7 U.2 selection I X-1 (C3FL), and I99. ．． #10
0. In step #101, the terminal (o6) is connected for 50 microseconds to send the FLCA signal to the 7 lash device.Then, set "0011" in the input/output shift register to serially Performs data input/output operation and waits for this operation to complete.Then,
When this operation is completed, data indicating the state of the 7 lash device of exposure control operation start type i1+j has been read into the shift register.

In step #105, the contents of register ABR are set to 6, and in step #106, @ i l) 3.

It is determined whether a charge completion signal is input based on the data from the 7 runciture device read during step #104, and if the charge completion signal is input manually, the data ΔAvf of the number of aperture stages for flash photography is determined. Also, if the charging completion signal is not input, input/output capo) (IO
P) to the external data bus (ODB). Then, by outputting the contents 6 of the register ABR to the output capacitor (OP), as shown in Table 3, the aperture control circuit (AP
Data ΔAva or ΔAvr of the number of narrowing stages of the external data bus (ODB) is taken into the external data bus (ODB).

In step 110, it is determined whether the automatic focus adjustment operation has completely stopped and the terminal (i6) is "Loud", and if the automatic focus adjustment operation has not stopped, the terminal (i6) is determined to be "Loud".
6) Wait until “LouI” becomes “LouI”. Terminal (i6) is L
oud”, set the terminal (06) to “High” for 150 microseconds in steps #111.#, 112.#113.
b”, send a release signal to the flash device, and #
In step 114, the terminal (04) is set to "LouI" and the flash selection signal (C8FL) is removed.

In step 115, a high pulse is output to the terminal (018) to operate the release circuit (RELC), start the aperture operation, and also
Reset the knob (RF3) and turn off the display. Then, after adding 1 to the contents of register ABR to make it 7, #
In step 117, it is determined whether a charge completion signal has been input. When the charge completion signal is input, the data Tvf of the exposure time for flash photography is output from the crowd capo (IOP) to the external data bus (ODB). The exposure time data Tva for optical photography is output from the input/output capo (IOP) to the external data bus (ODB), and in step #120, the contents of register ABR (7) are sent to the output capo (OP).
Output. As a result, the exposure time data Tvf or Tva is changed to the exposure time control circuit (
ETCC).

Subsequent exposure control operations are performed using μmcoin (
1,17-com (MCOB)
C0B) waits until the exposure control operation is completed, the reset switch (S4) is closed, and the terminal (12) becomes "High". When the terminal 2) becomes "High", the photometric switch (Sl) is closed in step 122, and it is determined whether the terminal (io) is ``HigI+'', and the terminal (io) is ``L''. -1iHh”・That is I1
At step 23, the flag MSF is set to "1" and the process returns to step 3 in FIG. 8-1 to restart data reading, exposure calculation, and display operations. On the other hand, the photometric switch (Sl) is opened at step 122, and the terminal (i) is opened.
o) is determined to be “Low”, the well 124
Enable only interrupts to the terminal (iLa) in step ,
Set the flag MSF to "0" and set the terminal (OO) to "'Lou".
+”, the power supply from the power supply line (VB) is stopped, and then the CEND state is entered.

9-1 and 9-2 are specific examples of the exposure calculation operation in step #38 of FIG. 8-1. The exposure calculation operation will be explained below based on the chart 70 in FIGS. 9-1 and 9-2. In step #130, the terminal (i4) is “
Determine whether the terminal (i4) is "High" or not.
If it is not “Hi Hb”, the lens is not attached, so move on to step #135. If the terminal (i4) is Hi
gb”, memory register M in step #131.
11 is determined whether specific data, that is, check data is captured in OO.

If the check data is not input, exposure control by open metering is impossible, so the process moves to step 135. On the other hand, when it is determined in step #131 that check data has been captured, exposure control using open metering is possible, so the process moves to step #132.

In step 132, memory registers Mol and M
Based on 1 piece of data to O, Avo+ノ＼vz=A
voz is calculated, and the open aperture value A voz at the set f.
A voz. In step #132, the maximum aperture value A va+z at the set focal length is similarly calculated by calculating Avm+ΔA vz =A vmz. In this case as well, if the lens has a fixed focal length, AvIll=A vmz. Next, well 13
In step 4, the open aperture value Av is determined from the photometric value By-Avoz Bvc.

#13 to remove 2 and 7 actors of open photometry error.
A voz calculated in step 2 and open photometry error data B vcl , B vc2 . loaded into memory registers MO4, MO5, MO6. Of Bvc3, the data Bvc of the open photometry error suitable for this camera body is added to calculate By (data of subject brightness only), and the process moves to step 135.

Steps #135 to #144 are display and preparatory operations based on data indicating the state of the flash device stored in the memory register Moc. First, well 13
In step 5, it is determined whether the mounting signal is input or not, and if the mounting signal is not input, the terminal (O8),
(010) is set to ``Lou+'', and as shown in Table 2, the light emitting diode (FLD) in Figure 4 is turned off.When the attachment signal is input, it is determined whether the FDC signal is input next. If there is an FDC signal, the terminal (08), (
01,0) to HigI+'' and blink the light emitting diode (FLD) at 8Hz as shown in Table 2.#
If it is determined in step 137 that there is no FDC signal, then in step 139 it is determined whether there is a charge completion signal. If there is a charging completion signal, set the terminal (08) to "Loud" and set the terminal (010) to "H".
i8h” and the light emitting diode (
FLD), and if there is no charging completion signal, the terminal (0
8) to 'Highb' and terminal (010) to 'Loud.
” to blink the light emitting diode (FLD) at 2I-1z. When the output of the display signal for the flash is completed as described above, next, it is determined whether the multi-flash signal is input, and the multi-flash If the signal is manually supplied, the time required for all three flash units to fire in sequence is the maximum exposure time with the shutter fully open, 1/125 seconds (Tv = 7
) is the tuning limit exposure time Tvfl. On the other hand, if a multi-flash signal is not input, the time required for one 7-lash device to fully emit light is the minimum exposure time of 17,250 seconds (Tv=8) when the shutter is fully open, and the tuning limit exposure time TvrI. shall be. And #145. In step #146, it is determined whether exposure control using aperture metering is possible, and exposure control using aperture metering is possible (aperture control is possible).
If so, move to step 70- of the calculation starting from step 171, and if exposure control by aperture metering is impossible and only exposure control by actual aperture metering is possible (aperture control is impossible).
Then, the operation starts from step 150 and moves to step 70-.

Steps #150 to #166 are operations in exposure control mode using actual aperture photometry. In step #150,
Exposure time TvL is calculated by adding film sensitivity data Sv to photometric value Bvt. This is because the photometric value also includes the element of the photographic aperture, so adding the film sensitivity to the photometric value will calculate an appropriate exposure time. Next M
mode, and if it is M mode, it is determined whether the set exposure time Tvs is shorter than the exposure time of the synchronization limit, and if Tvs>Tvfl, Tvf
Let l be the exposure time Tvf for 7-lash photography, and Tvs≦T
If it is vfl, set Tvs to Tvf and step 1 of I156
This transition will take place. On the other hand, if it is determined in step 151 that the mode is not M mode, in step 155 the synchronization limit exposure time Tvfl is set to 7 lash photographing exposure time Tv[, and the process moves to step 156.

In step #156, during Fill In7 rush shooting, the exposure time Tvt+1, which has a high probability of properly exposing the secondary subject, is compared with Tvf, and 1"vL+]>-
If it is 1'vf, there is a high probability that the sub-subject will be overexposed during Fill-In7 rush photography, so the register ALRI is set to "10" so that an overexposure warning is issued. On the other hand, if Tvt+1≦1'vr, T
When vt+1=Tvf, there is a high probability that the sub-subject will be correct, and when Tvt+1<Tvf, there is a high probability that the sub-subject will be underexposed, but in this case, normal 7-ranche shooting will not take into account the exposure of the sub-subject. Since this corresponds to the above case, there is no need to issue an exposure warning in either case, and the register A L R1 is set to 0°00''.

In the case of exposure control mode using actual aperture metering, the normal 7-ray shooting mode (hereinafter referred to as 7-ray shooting mode) uses 7-ray light to properly illuminate the main subject without considering the exposure of the secondary subject in all areas regardless of the brightness of the subject. Normally, the flash device emits light up to a proper exposure level. Therefore, in step #159, the flag PIF is set to 1101+. When the content of this flag PIF is 0, an analog signal is output from the analog output terminal (ANO) to make the flash emit light up to the proper exposure, and when the flag PIF is 1, the flash is set to IEv below the proper exposure. An analog signal is output from the analog output terminal (ANo) to emit light by the follower (half of 1% of light emission for proper exposure).
At step 60, the number of refinement stages △Avr is set to 0 and #
The process moves to step 161.

In step #161, an exposure control value for constant light photography using actual aperture metering is calculated. In M mode, this calculation takes the set exposure time Tvs as the constant full exposure time Tva,
If you are not in M mode, calculate Tv in step #150.
If t is the longest limit exposure time Tvo and the shortest limit exposure time Tvm, if 1゛vo≦Tvt≦Tvm, then T
Let vt be Tva, and Tvt<Tv.

If so, Tvo is set to Tva, and if Tvt>Tvm, Tvm is set to Tva. And the number of aperture steps for steady light photography △
Ava is set to 0 in both cases. Next, in step #162, it is determined whether Tvt>Tva, ]
>Tva, overexposure will result, so set "10" to the warning register ALR2 during constant light photography.

On the other hand, if Tvt≦Tva, then it is determined whether TvL<Tva, and if Tvt<Tva, it will be underexposed, so set 101" to AlH3 and 1'vL<Tv
If it is not a, proper exposure will be achieved with Tvt=Tva, so set register ALR2 to "00" and
Move to step 8.

Next, the exposure calculation in the open metering mode from step #171 will be explained. In step #171, Bv+5v=
Exposure value Ev is calculated by calculating Ev, and it is determined whether the mode is P mode or not in step #172. In P mode, it is determined whether the open aperture value Avoz is larger than Av=3 (F2.8), and if Avoz≧3, Avoz is set to the maximum aperture value on the open side when shooting with 7 lashes. is defined as Avof, and when AVO7°<3, 3 is defined as the limit aperture value Avof. In step 176, the difference between the set film sensitivity and Sv=5 (ISOloo) is 5v-5=△
Calculate Sv and set Av=6 (F8) in step #177
ΔSv is added to ΔSv, and this value 6+ΔSv is set as Avfl.

This aperture value AvfI is the maximum aperture value Av of the lens.
+nz, and determine whether Avmz<Av
If fl, Avmz is set to Av+nf, which is the limit aperture value on the fine pattern side during 7-laser shooting, and if Av+nz≧Avfl, Avl'l is set to AMr. In step #181, it is determined whether A vmf < A vof. This is a special lens (e.g. mirror lens)
If Avmf < Avof, then Avo
Let f be Av+Ilr.

In step #183, Ev+ 1-Tvf1=Avf
2 is performed to calculate the aperture value Avf2 at which the sub-subject is appropriate at the exposure time of the tuning limit. And well 18
In step 4, determine whether AMr2>Av+of or ゛. If Avf2>Avmf, set Av+nf as the control aperture value Avf, calculate Avf-Avoz=ΔAvf, and calculate the number of aperture stages ΔAvf.
is set as the control exposure time Tvf and the process moves to step 196. If it is determined in step #184 that Avf2≦Avmf, AMr2<
Determine whether it is Avof. And Avf2≧Av
If it is determined that it is of, ＼vf2 is set as the control aperture value Avf, Avf-AVO7,=ΔAvf is calculated, Tvfl is set as the control exposure time Tvf, and the process moves to step #196. In step #196, the mode is Fill-1n7 rush, so 7
Set the lag PIF to "1". When AMr2<Avof is determined in step #188, the control aperture value Avf is set to Avfo, and the number of aperture stages △Avf=Av
By calculating f-Avoz, the exposure time 'I''vf is 7 (1
/125 seconds) and sets the flag PIF to "0".

As mentioned above, in the case of P mode, Ev+1−Tvfl
-AMr2 calculated by AMr2 is Av+nr≧Avf
If 2≧Avof, Tvfl, Fill-In7 lash mode that performs exposure control with AMr2, AMr2>A
When v+nf, Tvfl and Avmf are used to control exposure, Fill-1n7 lash mode, AMr2<Av
When off, exposure control is performed with Avor and Tv=7N
It becomes the or111a17 rush mode. Therefore, E
Fill-In in the range of v≧10, N in the range of Ev<10
The 7 of orn+a l becomes Shemode. #197
In step , the warning register ALRI contains “'00.
" is set so that no warning is issued in any case, but this means that if EV<10, the mode becomes Nor+na17, so there is no need to issue a low-brightness warning, and exposure control is performed using Tvfl and Avmf. When performing Tvf
l=8, Av+of=6 (Sv=5),? (Sv=
6) Since it is, the sub-subject will be overexposed if By>9. However, when measuring a normal subject using the incident light method, there is no subject for which By > 9, and in fact, even if it is overexposed, it is within the latitude of the film, so there is no overexposure warning. Don't do it. In addition, when in P mode, the photographer can shoot with the flash without thinking too much, and can take 7 shots of Fill-In or Normal depending on the exposure value, resulting in photos with natural exposure. This mode does not give any warnings, so as not to make the photographer think unnecessarily.

Furthermore, the reason why the exposure time is set to TV=7 when the Norma 17 rush mode is entered is to reduce the amount by which the sub-subject is underexposed as much as possible.

The reason for setting the limit aperture value Avof on the wide open side is to prevent the aperture from opening too far to the wide open side, resulting in shallow depth of focus and out-of-focus photos. The reason for providing the value Av+ is to prevent the aperture from becoming too small and the amount of light emitted by the 7 runcie device becoming insufficient.

#-corn (MCOB) sets the register ALRI to "Oo" in step #197, then performs program calculations for constant light photography in step #198, and sets the exposure time Tva and aperture value for constant light photography. Ava and the number of refinement stages ΔAva are calculated, and the process moves to step #262.

Note that since the program calculation is well known, the explanation will be omitted. In addition, #212. which is the following A, S + M mode constant light calculation. Well 229. Since the specific example of step 261 is also well known, the explanation will be omitted.

If it is determined in step #172 that the mode is not P mode, then in step #200 it is determined whether the mode is A mode or not. Then, if it is A mode, in step #201
Determine whether voz > Avs, and
If VO7, > A vs, change AvoZ to Avf. On the other hand, if Avoz≦Avs, then in step #203 (7), it is determined whether l\ν+112 < Avs. Then, if A vmz < A vs, Avn+z is Avf, and A v+nz < A v
If not s, Avs is Avf and Avf-Avoz-
ΔAvf is calculated and the process moves to #206, X step. #
In step 206, the exposure time TvH at the tuning limit is set as the control exposure time Tvf.

In step #207, A vr+ T v4 = E
vf is calculated, and Evf is calculated in step #208.
Determine whether <Ev+1. And Evf<
If Ev+1, there is a high probability that the secondary subject will be overshot, so set the register ALR+ to "10" and set Evf≧Ev+
1, N or+na % does not require an under warning, so set the register ALRI to 00, set the flag PIF to 0, and perform the steady filling operation in l\ mode at the #21 scarcity step. Afterwards, the process moves to step #262.

In this A mode, the aperture is controlled to a set value AVS and the exposure time is controlled to a tuning limit Tvf1, regardless of the subject brightness. Therefore, in this mode, Nor+oa is always
The mode is set to 17 lashes and does not take into account the exposure of the sub-subject, and only makes the main subject proper by the light emitted by the 7-lash device, and only warns when the sub-subject becomes over-exposed. It is now possible to do this.

If it is determined in step #200 that the mode is not A mode, then in step #215 it is determined whether the mode is M mode. Then, in the M mode, at the X step of #216, it is determined whether the set exposure time Tvs is shorter than the open Tvfl at the synchronization limit exposure, and Tvs>Tvfl.
If Tv[1, if Tvs≦Tvr1 then Tvs is Tvf
shall be. Next, the set aperture value Avs is Avoz≦Ays≦
If Av+nz then Avs, if Avs<Avoz then Av
If Avmz<Avs, then Avr++z is set to Avf, Avf-Avoz=ΔAvf is calculated, and the process moves to step #224 t7'. #22.
In step 1, Avf+Tvf=Evf is calculated from the aperture value Avf and exposure time 'rvf for 7 run shots, and as in the case of A mode, when Ev+1>Evr, register ALRI is set to issue an over warning.
If lEv+1≦Evf, the lips will not issue a warning, so set the register ALI (1 to 00).Then, in the X step of #228, the flash will fire until the proper exposure, so the flag PIF is set to 0, M mode steady light calculation is performed in step #229, and the process moves to step #262.

In the case of the M mode, basically both the aperture and the exposure time are controlled by Φ-set values, and the flash is emitted until the appropriate exposure level is reached.

If it is determined in step #215 that the mode is not M mode, the process moves to step #235 in FIG. 9-2 to perform exposure calculation for S mode. In step #235, Tvs
>Tvfl, and if Tvs>Tv[I, TvrI is set as Tvs and the process moves to step #237. #237 Ste Nobu I:.

Perform the calculation v+1-Tvs=Avf3 and get 1-'Ro1
- Calculate the aperture value Avf3 that makes the secondary subject appropriate in the In flash mode. Then, in step #238, A
Determine whether voz>Avf3, and
If voz>Avf3, the process moves to step #239 and calculates Ev+1-Avoz=Tvf2, and recalculates the exposure time Tvf2 at which the subject is properly exposed according to the aperture value A voz. And I゛νr2<T
Determine whether or not vO, “Evf2 < i’ vO
Thereafter, TvO is set to Tvf, and when Tvf2≧TvO, Tvf2 is set to ]vf, and the process moves to step #243. And, at the step of well 243, Avozt-A
vf, then ΔAvf is set to 0, and the process moves to step #254.

On the other hand, if A voz≦Avf3 in step #238, the process moves to step #245 and Avf3>Avm
Determine whether zh. And Av[3>AvIn
If z, move to step #246 and Ev+I A
Perform the calculation v+nz=Tvf3, and the aperture value is A v
Exposure time Tv at which the sub-subject is properly exposed when +nz
Calculate f3, and in step #247 Tvf3>TvN
If Tvf3>Tvfl, Tv
Let fl be Tvf, and if Tv43≦Tvfl, Tvf3
is Tvf, Avmz is Avf, and Avf −Avoz is ΔAvf in step 253. #254
Move to the next step. On the other hand, A at step 245
If vf3≦Av口1z, then in step #251, Tvs is set to Tvf, Avf3 is set to Avf, and #253
#25 with Avf-Avoz as △Avf in step #25
Move on to step 4.

In step 254, the calculation Tvf+Avf=Evf is performed, and if Ev+1>Evf, "1" is set in the register ALRI to issue a warning that the sub-subject is over.
0", and if Ev+1<Evf, set the register ALRI to "01" to issue a warning that the sub-subject will be under-shot.
``1'' is set When LEv+1=Evf, no warning is issued, so set the register ALRI to ``00'', set the flag PIF to 1, and move to step 261. Then, in step 261, S mode is activated. Perform steady light calculations.

In step #262, Eva is calculated from the constant light Ava and Tva calculated in each mode, and Eve>Eva
Then, set 10” to register AL and R2 for over warning.
If Ev<Eva, register ALR2 is set to '01' for an under warning, and if Ev=Eva, there is no need for a warning, so register ALR2 is set to '00'.

In S mode, the filter is set regardless of the brightness of the subject.
It becomes l-In flash mode. Therefore, in this case, over and under warnings are given.

In steps #268 to #274, depending on the contents of the 7-lag FIF and whether or not a multi-flash signal is input, an analog signal based on the film sensitivity shown in Table 4 is output from the analog output terminal (ANO). , return to step #39 in FIG. 8-1.

Figure 10 is a circuit showing a specific example of the 7 run control circuit (FLCI) of the flash unit (11), and the run control circuit (FLC3) of the flash unit (IV).
has a similar circuit. Data sent from the terminal (FF12) to the camera or controller is output via the transistor BT21). Also, the data sent from the camera or controller to the flash is sent from the terminal (FF1.2) to tone y')sj/ (13
T22)+Int<9 (IN16). Also, when data is not being exchanged, the transistor (BT21) is conductive and the terminal (F
When the "HiH1+" signal is outputted from F12) and the 7-layer starts emitting light, the transistor (BT21) becomes non-conductive. As described above, this signal is used on the camera side as an integration start signal for controlling the amount of light emitted. Terminal (FF1
．． 3) is a terminal that receives the synchronization clock pulse for transmitting and receiving data from the camera, the signals FLCA and CAFL indicating the camera status, the release signal, the light emission stop signal for controlling the amount of light emission, and the light emission start signal in sequential mode. FF13)
The signal from the transistor (BT23), inverter (
It is input to the signal line via IN17). Terminal (F
F11) is a terminal that receives the closing signal of the X contact (S'X) from the camera, and the X contact (SX) is connected to this terminal (FFII).
When the closing signal is input, the transistor (BT24) becomes conductive. The transistor (BT25) is a transistor (
Even if the X contact (SX) chattering occurs, the transistor (B
T24) is provided to maintain continuity.

(POR3) is a power-on reset circuit that outputs a reset signal to the terminal (POF) when power supply to the power supply line (VF) starts via line (L6) or line (L7). (FTC) is a timing signal output circuit that outputs a timing signal for data exchange and a signal for switching the operating state of the flash according to the camera state based on the signal from the signal line (F3),
A specific example of this circuit is shown in FIG. (MCF)
is a u-con that reads data from the camera, calculates and displays display data based on the data from the camera, controls the display time of the display section, and controls the operating time of the booster circuit (DD3). (FDP) is II −
The interlocking range or interlocking distance of the flash device calculated in coin (MCF) and the common terminal (C
This is a display section that performs display based on signals from the segment terminal (SEG) and segment terminal (SEG).

Next, based on FIG. 11, the timing signal output circuit (F
A specific example of TC) will be explained. The AND circuit (AN67) is in a state to output a signal from the signal line (F3) when the flip 70 tube (RF6) (FIG. 10) is in the reset state. 7 lip/70 tube (RF6) has a certain period of time (3
The AND circuit (AN67) outputs a signal from the signal line (F3) except when the flash is emitting light. It has become. While the output of the AND circuit (AN67) is "Higl+", the reset state of the counter (CO15) is released and the output terminal (CPF) of the μmcom (MCF) is released.
) counts clock pulses from Decoder (D
El5) sequentially outputs "Higb" pulses to terminals (go) to (83) based on the output of the counter (c'ots'). The output of this decoder (DEl, 5) outputs a pulse from the terminal (Fio) after 45 microseconds have elapsed since the counter (CO15) started counting.
When 95 microseconds have elapsed, a pulse is output from the terminal (gl). When 145 microseconds have elapsed, a pulse is output from the terminal (gl), and when 155 microseconds have elapsed, a pulse is output from the terminal (g3).

Therefore, when the FLCA signal (50 microseconds "Higb") is input from the camera to the 7th pulse, the pulse is output only from the terminal (go) and the 7th lip/70th pulse (RFl
l) is set. Then, at the falling edge of the signal line (F3), the one-shot circuit <0810) outputs “High”.
At the time when the pulse of "h" is output, 7 rip/70 tsub (D F25), (D F26), (D F27) are 7.
Lip 70 tube (RFil), (RF12), (RF
13), the output (FCT) of the 7 lip/70 tube (DF25) becomes 'Higb'.

When the CAFL signal (100 microseconds "igb") is input, a pulse is output from the terminal (gO), and then a pulse is output from the terminal (gl). As a result, the 7-rip, 70-tub (RFII) is set by the pulse from the terminal (80), and then reset by the pulse from the terminal (gl) via the OR circuit (OR23), and the 7-rip, 70 knobs (RFll) are set. Therefore, when the signal line (F3) falls to "Loud", 7 lip/70 knob (RFll) is set, so 7 lip/70 knob (+)F26)
The output (CFT) becomes 'Higb'. Also, when the release signal (150 microseconds 'Higl+') is input, pulses are sequentially output from the terminal (gO) r (glL (gl), 70 pumps (RFil)
, (RF12) are set and then reset, and 7 lip/70 lip <RF13) is set at the time the signal line (F3) falls. Therefore, flip 7
The output (RLT) of the 0 tube (DF27) is “HiFil-”
becomes. Also, when a loud signal of "'Higl+" which is longer than 155 microseconds is input from the signal line (F3) by mistake, the terminals (go) and (gl) are input.

Pulses are sequentially output from (gl) and (g3), and by the time the signal line (F3) falls, all flip 70 tubes (RFII) to (RF13) are in the reset state, so the terminal (FCT) , (CFT), (RL
T) will never become 1 (iHh).Also, even if a synchronization clock pulse is output to the signal line (F3) for transmitting and receiving data from the camera, this pulse (1) will never become 1 (iHh). Since it is shorter than a microsecond, the decoder (DE
There is no force applied from the terminals (go) to (g3) of l5), and the flip is 70 degrees (DF25).

The outputs of (DF26) and (DF27) do not change.

Table 15 shows the number of clocks and count values input to the counter (CO15) and the “l(igll)” of the decoder (DEl7).
” shows the relationship between the terminals.

When the output terminal (FC1゛) of the flip 70 tube (DF25) becomes "Higb", the counter (CO17) is released from the reset state via the OR circuit (OR2B).
Sarani, Ant times m (AN70) - (8N77)
ilF: 7-ri (DEl7) output (fo') - (1
7') can be output to the terminals (rO) to (7). Then, the counter (CO17) counts the synchronization clock pulses for data exchange sent from the camera, and each clock pulse Terminals (fO) to (F7) are set to “High” one by one during the rising of
At this time, since the terminal (CFT) is "Lou+", the AND circuit (AN65) is in the active state, and when the terminal (1+3) becomes "Higl+", the AND circuit (AN65) and the OR circuit are activated. The output of the (OR27) becomes "l (high"), and the output of the NAND circuit (NA5) becomes "'Lou+". Then, when the 8th clock pulse falls to "Lou+", the output of the NAND circuit (NA5) becomes "'Lou+".
) rises to "HiHb", and at this rise, a pulse for a certain period of time is output from the one-shot circuit (O313). And this one-shot circuit (O8
13) One-shot circuit (O31)
'Hi Bh' pulse is output from 2), and 7 limp/70 limp (RFI
I) and (DF25) are reset, the terminal (FCT) becomes Lou+'', and the counter (CO17) also enters the reset state.

On the other hand, the output of 7 lip/70 tube (DF26) (CFT
) is “HigI+”, the AND circuit (AN66)
is in a state where it is possible to output a signal from terminal (1+4). The terminal (1+4) of the counter (CO17) is connected to the AND circuit (AN) as shown in Table 15.
When inputting the 16th clock pulse from 67), °
.

Therefore, after a certain period of time determined by the output of the one-shot circuit (O313) after the 16th clock pulse falls, the 7th lip-flop (DF26) is reset and the counter (CO17) is in the reset state. , the terminal (CFT) becomes “LO, II”. That is, the terminal (CFi') 7"'HiBh" is connected between the rails through which the 2-byte data mentioned above is sent from the camera to the 7-lash device.

Release signal from the camera (“HIg” for 150 microseconds)
h") is input, the terminal (RLT) becomes 'I-1i
becomes H1+”.

When the flash device starts emitting light, the terminal (X
A “Higb” pulse is input from the one-shot circuit (O811) at the falling edge of this pulse.
A pulse of “high” is output, and the pulse of
F13) and (DF27) are reset and the terminal (RLT
) becomes “Low”. The OR circuit (OR22) also connects the output (1) OF) of the power-on reset circuit (ROR3) (Fig. 10) and the μmcom (MCF) described later.
) When the signal at the output terminal (034) falls, the bird -
The output of the one-shot circuit (◯S7) is inputted, and a reset signal for resetting the entire flash device is outputted to the terminal (FR).

The flash device will be explained based on the vS10 diagram again. When the FLCA signal is input to the signal line (F3),
Below, the terminal (fO) of the timing signal output circuit (FTC)
) to (F7), "Higl+" signals are sequentially output in synchronization with eight clock pulses from the signal line (F3), and the terminal (FCT) becomes "Higb".

When the terminal (FCT) goes high, the NOR circuit (N
O2), the output of the AND circuit (AN44) is “Lou+”
become. On the other hand, the signals at terminals (fo) and ([1) are output as they are from the OR circuit (ORII), so there is a beep) (
bO), (1) During 1), the transistor (BT21.) conducts through the NOR circuit (NOI), and “'High
+” signal is output from the terminal (FF12).

The terminal (FCT) is a flip 70 tube (DF23).

It is connected to the clock input terminal of (DF24), and when the signal of this terminal (FCT) rises, 7 rip and 7
Latch the 0 manpower of 0 knobs (DF23) and (DF24). If the charge completion signal (CHC) from the light emitting part is input to the D input of the 7-lip/70-tube (DF24), the 7-lip/70-tube will start from the time the terminal (FCT) goes to "Higb". (DF24) Q output is “High”
” At this time, the output terminal (034) of μmcoIn (MCF) is “Higl+”, so the AND circuit (AN
56) becomes “High” and the light emitting diode (
CI-IL) displays the completion of charging. Furthermore, as will be described later, the FDC signal is input to the D input of the 7-rip/70-tub (DF23) from the AND circuit (AN58), and when the signal at the terminal (FCT) rises, the FDC signal changes to 7. It is latched to the lip °70 knob (DF23). In the bit (b2), the terminal (F2) is “High”.
b”, the AND circuit (AN40) outputs a charge completion signal from the D7 lip/70 tube (DF24), and if the charge is completed, the transistor (BT21) becomes conductive and the terminal (FF12) outputs a charge completion signal. A signal of “trl1g1+” is output. At bits (b3) and (b4), the transistor (BT21) becomes non-conductive and turns off according to the signal input to the terminal (FF12).
T22) becomes conductive or non-conductive, and the inverter (I
A signal corresponding to the input signal is output from N16). When the clock pulse from the signal line (F3) falls at bit (b3), 7 rip 70 amp (DF2
1) latches the signal from the inverter (IN16). At this point, in the multi-flash sequential mode, the "HiHI+" signal is input from the controller (I).
Therefore, in sequential mode, flip 70 tubes (DF
The calculation power of 21) becomes "'l-1iBh".

(1] 4) In the pin F, when the clock pulse from the signal line (F3) falls, a flip occurs.
F22) latches the signal from the inverter (IN16). At this point, when the charging completion status is output from the two 7-inch devices, the controller (I)
;gI+l+ signal is input. Therefore, if both 7-rush devices are fully charged at this timing,
The calculation power of flip-flop' (DF22) is 'Hi'
gh”.

In bit (b5), 7 is input from the AND circuit (AN41).
The calculation power of the lip flop (DF21) is output.

Therefore, if it is in multi-light sequential mode, a signal of "Loud" is output, and if it is not in sequential mode, a signal of "l-1-1i" is output.
The calculation power of 0tsubu (DF23) is AND circuit (AN42)
is output from. Therefore, 1. If dimming has been performed, a "Loud" signal is output, and if dimming has not been performed, a 'HigI+' signal is output.

(b7) In Bi-7F, if it is not sequential mode, the calculation power of 79-tubu and 70-tubu (DF24) is the AND circuit (AN4
3) is output. Therefore, the signal “Charge completed and ready” is sent to the terminal (FF12) instead of sequential mode.
When in the sequential mode or when the light 7i is not completed, a "Loud" signal is output from the terminal (FF12). Table 16 summarizes the above operations.

When the CAFL signal is input, the terminal (CFT) becomes “H”.
igl+", and the AND circuit (AN55) becomes active. Also, the input terminal (i2
0) becomes It)l igl, 11, so that u −
com (MCF) is the inverter < I N in synchronization with the clock pulse input from the signal line (F3).
16) and the data inputted via the AND circuit (ANS5) are sequentially read. Also, during this period, the outputs of the NOR circuit (NO2) and AND circuit (AN44) are “L”.
ou+", the output of the NOR circuit (NOI) becomes "HiFlh" and the transistor (BT21) remains non-conductive.

When the release signal is input, the terminal (RLT) becomes “HIgI”.
+”, the reset state of the counter (CO9) is released, and the AND circuits (A N46) and (A N4
7) becomes active. Furthermore, OR circuit (OR16)
When the 7-rip/70-rip (FF9) is reset via the FDC display and the FDC display continues, this display is stopped. This is a measure to be taken when flash photography is performed continuously at high speed.

When the terminal (RLT) becomes "High'" and the X contact (Sx) on the camera side closes, a pulse of "l (igb") is output from the one-shot circuit (O34), and this When the battery is fully charged, 7 rips and 70 rips (DF2
If the calculation power of 4) is II)l i gl,II, then
This pulse is output from the AND circuit (AN47) and the flip 70-tub (FF6) is set. At this time, since the output of the AND circuit (AN148) is "Low" if it is not the sequential mode, the pulse from the one-shot circuit (O84) is output from the AND circuit (AN52), and this pulse is transmitted to the 17 circuits ( The light emission start signal is output from the OR circuit (OR15) to the terminal (STR) via the OR circuit (OR14) to start light emission.
) through the timing signal output circuit (F''i'C)
is also input to the terminal (XON), and as mentioned above, the terminal (RLT) becomes "Lo, +1. Furthermore, the OR circuit
The light emission start signal from OR15) is 7 lip/70 tube (
It is also applied to the set terminal of FF8), and the calculated output of the flip 70 tube (FF8) becomes "Low" and the transistor (BT28) becomes conductive. This transistor (BT2
8), the light emission amount limiting circuit starts operating.

The light emission amount limiting circuit will be explained. Block (HLA)
is a circuit that outputs a light emission mode signal, and outputs the signals shown in Table 17 according to each light emission mode.

Here, IvF is light emission amount data when full light is emitted, and has a relationship of IvF>IvH>IvL. e))
The transistor (PT) directly detects the amount of light emitted, and the output current of this phototransistor (PT) is connected to the terminal (H
), (L) output is “11” (AN54)
) becomes “High” and the transistor (BT2
7) becomes conductive, the signal is integrated by the capacitor (C7). On the other hand, if the outputs of the terminals (H) and (L) are "10", the output of the AND circuit (AN53) becomes ""Higl+", the transistor (BT26) becomes conductive, and the output current of the phototransistor (PT) is transferred to the capacitor. (C5). The capacitance of capacitor (C7) is
) is larger than the capacity. When the integral value of the capacitor (C5) or (C7) reaches the value determined by the constant current source (cB) and the resistor (R5), the comparator (AC7)
) is inverted to "High", a pulse of "Hi81+" is output from the one-shot circuit (O35), and a light emission stop signal is output to the terminal (STP) via the OR circuit (OR19). At this point, if a light emission stop signal has not been inputted from the camera side in the automatic light control mode, the flash light emission is stopped by the output of the one-shot circuit (O35). Also, the terminal (HL (L) is “'00”
If so, the output of the AND circuit (AN66) is High”
The transistor (BT29) becomes conductive [7, and the output of the comparator (AC7) remains at "LOLI+". Therefore, if a light emission stop signal is not input from the camera when full light is emitted in automatic light control mode, full light is emitted and light emission is stopped.

When the terminal (AM) is “0” and the terminal (032) of μ-coin (MCF) is “0”, the OR circuit (○RIS)
The output becomes “Lou+”. Then, as described later, the u-coIII (MCF) terminal (0
34) is 'HigI+', the AND circuit (
The output of AN63) becomes "High" and the light emitting diode (FML) for manual light emission display lights up.

Furthermore, the AND circuit (AN61) becomes disabled,
The light emission stop signal from the camera side is an AND circuit (AN61)
will no longer be output. When data indicating P mode is input from the camera side, μmcom(M
CF) terminal (032) becomes "I (i gb"). Therefore, even if the manual mode is selected on the flash side and the terminal (AM) is +1 Lo,, 11, the OR circuit (OR14) The output becomes ``I(iBl+'') and the output of the AND circuit (AN62) becomes l)j i 81
．． I+, the light emitting diode (FAL) lights up to indicate automatic dimming mode, and the AND circuit (
AN61) can output a light emission stop signal from the camera side. Note that when automatic dimming mode is selected, the terminal (A M
) is High", the operation is similar to the case where the output terminal (032) of μmcom (MCI) is "l1i)(1+").

“I-1i gI+ from the AND circuit (AN47)
" pulse is also sent to the set terminal of the flip-flop (FF7), and the 7 flip-flop (FF7) is set. As a result, the output of the AND circuit (AN150) becomes 'Hi gl+", and the output of the AND circuit (AN44) becomes 'Hi gl+'. ) becomes "Lou+", the output of the NOR circuit (Not) becomes "High", the transistor (BT21) becomes non-conductive, and the "LoIII++" signal is output from the terminal (FF12).This signal becomes the integration operation start signal for controlling the amount of light emitted on the camera side.

Furthermore, “Higl+” from the AND circuit (AN47)
With this pulse, 7 rip/70 rip (FF6) is set, and the reset state of the counter (Coil) is released.

The output of this counter (Coil, ) is the decoder (1) R
20), and the output terminal of the decoder (DE20) outputs the i8. Outputs I, ++ pulses, and these pulses pass through the OR circuit (OR13) to 7.
Reset the lip-flop (FF6) and counter (
Coil, ) also enters the reset state. Therefore, the Q output of the 7 rip-flop (FF6) has the X contact closed,
The fixed time (the time required for the two flashers and the seven-shot devices to fully emit light) is "I(i 81+").

Further, the output terminal (Pl) of the decoder (DE20) becomes "Higl+" after the time required for one flash to fully emit light when the X contact (SX) is closed, and becomes "Low" again after a certain period of time.

When the camera determines that the amount of light emitted has reached a predetermined value, the signal line (F3) rises to "High".
A “Higb” pulse is output from the one-shot circuit (O3I). At this time, the flash was firing and
If the Q output of the Lip 70 tube (RF8) is “Higb”, the pulse from this one-shot circuit (O3l) is output from the AND circuit (AN152), and in automatic light control mode, this pulse is output from the AND circuit (AN152). It is output from the circuit (AN61), and is further output from the OR circuit (OR19) to the terminal (S
TP).

This stops the flash from emitting light.

Further, 7 rip/70 rip (RF9) is set by a pulse from the AND circuit (AN61). The 7-rip-flop (RF7) is reset via the OR circuit (OR14) by the pulse output from the one-shot circuit (O83) when the X contact is opened, so automatic dimming is performed. , and when the X contact is opened, the output of the AND circuit (AN58) becomes "Higb" and the counter (CO13) state is released. Then, the counter (CO13) is output from the AND circuit (AN59).
) is output from the terminal (flo), and the light emitting diode (FDL) blinks, indicating that dimming has been performed. This display is carried out for about 3 seconds, for example, and after 3 seconds, the 7 lip/70 tube (RF9) is reset via the AND circuit (AN57) and the OR circuit (OR16) and the display stops. Note that when a release signal is input during this display, as described above, 7 rip/70 lub < RF9) is reset via the OR circuit (OR16) and the display is stopped. Further, as described above, the output of the AND circuit (AN58) is latched by the 7-lip/70-tub (DF23) and transmitted to the camera side as the FI)C signal.

The release signal is input from the camera and the terminal (RLT) is “
When it becomes "highly", the counter (CO2) starts counting, and after a certain period of time (enough time required for the exposure control operation to start, the X contact to close, and for the two flashes to fire fully), the carry terminal is becomes "Higb", a clock pulse is output from the AND circuit (AN45) and is output to the terminal (XON) via the OR circuit (OR12), and the terminal (RLT) becomes "Lotu". Therefore, the release signal becomes "Lotu". Light emission does not start unless the closing signal of the X contact is input within a certain period of time after the input.

Therefore, unlike the camera body shown in Figure 3, if it is attached to a camera that does not output a release signal, it will not start emitting light, and when the film is attached, it will automatically take an aerial shot and take three frames. Even if the release signal is not output and only the X contact is closed when the film is pre-winded for about a minute, the flash device will not emit light inadvertently.

Next, sequentially light-emitting mode 7 lip / 70 lip ((DF21
) is in the Q output ``High''), and both 7 lash devices are in a fully charged state (flip-flop (DF2
2's Q output is "High") (therefore, the output of the AND circuit (AN148) is "HiHb"), the previously emitted flash will emit 7/10 of the proper exposure, and the signal line (F3) will be When it rises to “HiHb”, a “Higb” pulse is output from the one-shot circuit (O3I), but since the 7-lip/70-tub (RF8) is in the reset state, this pulse is not output from the AND circuit (AN152). . Then, when the terminal (Pl) of the decoder (DE20) becomes ``I (igl+)'', the AND circuit (
The output of ANl, 49) becomes 1L LoLIII, the output of the AND circuit (AN150) becomes "Higb", and the transistor (BT21) becomes non-conductive. This resets the integration on the camera side, as described above.

When the terminal (Pl) of the decoder (DE20) falls to ILo, II, the one-shot circuit (O370) outputs IH.
i gl, TI pulses are output, and at this time, the output of the AND circuit (AN148) is ")ligl+", so
The pulse from the one-shot circuit (O870) is output from the AND circuit (AN15]), and this signal is output to the terminal (STR) as a light emission start signal, and further, 7 rip and 70 rip (RF8) are outputted to the cellar. . Thereafter, the light emission is stopped by a pulse from the one-shot circuit (O81,) in the same manner as described above.

(BOD) outputs a "High" signal when it enters a bounce state. (MDP) is 7 rip, 70 rip (
When the light emitting mode signals are sequentially read by the DF22),
Displays that the mode is to emit light later, and issues a warning if a bounce condition occurs in this state.

This is controlled so that the flash device that fires later when firing sequentially is used as a frontal light source during ballast photography, and even if the amount of light emitted by the flash device that fires earlier is insufficient, it will fire later. The flash device only compensates for proper exposure.

However, if the flash device that emits light later becomes in a bounce state, there is a high probability that the amount of light emitted will be insufficient, so a warning is given.

When the sequential mode is read on the 7 lip/70 lip (DF22), the μmcom (MC
If the output terminal (034) of F) is "HigI+", the output of the AND circuit (AC3) is "'HigI+",
If it is not in the bounce state at this time, block (BDO)
Since the output of is 'Low', the output of the NAND circuit (NA50) becomes 'High', and the output of the AND circuit (AGl) becomes 'igl+' and the light emitting diode (MDL)
lights up. This allows the light to be emitted from behind in sequential mode. That is, for bounce photography, it is displayed that it should be used as a front light source.

On the other hand, when the light is emitted later in the sequential mode, if the bounce state occurs, the NAND circuit (NA50) outputs a pulse with the opposite phase of the pulse from the frequency divider (DVIO), and this ) and the light emitting diode (MDIj) blinks to give a warning.Also, if the sequential mode signal is not read, the output of the AND circuit (AC3) is L.

...The light emitting diode (MDL) is turned off.

Figure 12 shows μmco'11+(MCF) in Figure 10.
3 is a flowchart showing the operation of FIG. Below, this 12th
Figure 70- Based on the chart μmcoIn (M CF
) operation is explained. When the power switch (FSI) is closed, power supply to μmcoto (MCF) starts,
ll −cob+(MCF) is terminal (itA)=(it
To enable interrupts to B) and interrupts by the counter, data 20MD for maintaining power for 20 minutes is set in the timer register ``IRI'' and the CEND state is entered. At this time, in Fig. 10, the power-on reset circuit (POR3) operates when the power is turned on, and the flip 70 tube (RF"lO) is set by the reset pulse from the terminal (POF) via the OR circuit (OR20). The output of the terminal (ESP) becomes High via the OR circuit (OR2]).
”, and the booster circuit (DD3) starts operating as described above. Also, when the switch (APS3) is closed while power is not being supplied from the line (L7), the AND circuit (AN64 ) to one-shot circuit (O8S)
The pulses from the 7 lip-flops (RFI
If O) is in the reset state, 7 rip/70 rip (RF
l, O), and flip-flop (RFI
If O) is in the set state, this set state is maintained.

Further, the pulse from the AND circuit (AN64) is input to the interrupt terminal (itB), and .mu.-com (MCF>) performs the same operation as when the power is turned on.

Therefore, the power switch (FSI) is opened and the switch (FSI) is opened with the terminal (ESP) in the "' Hi gl+" state.
When APS3) is closed, the terminal (ESP) remains in the "Higl+" state for 20 minutes from that point. On the other hand, if the terminal (ESP) is “Lou+”, the switch (
When APS3) is closed, the terminal (
ESP) is set to “'Higl+”.

When power is being supplied from the line (L7), the output terminal (ESP) of the OR circuit (OR21) is "1i8b"; when power is being supplied from the line (L7), this terminal (ESP) is "1i8b". It is "I-1i gl+".

Further, at this time, since the AND circuit (AN64) is in a disabled state, no interruption is made to the terminal (ii[), and the opening operation of the switch (APS3) is disabled.

If there is a counter interrupt, in step S5 the terminal (itA
Let L(itB) and the interrupt by the counter be iij' function,
A constant value α1 is subtracted from the contents of register TIRI and set in register TIRI. And register 'rIR1
It is determined whether the contents of register TIRI are "0" or not, and if it is not "0", the state goes directly to CEND. On the other hand, if it is determined in step S7 that the contents of register TIRI have become II (l II), the power supply 20 minutes have passed since the switch was turned on or the switch (APS) was closed, and the terminal (030)
Output a “Higl+” pulse to 7 rip/70
Reset the knob (RFIO) and set the terminal (ESP) to “L”
ou+”, counter interrupt is disabled, and the CEND state is set.

When the FLCA signal is input from the camera, the terminal (FCT)
becomes “High” and “H!” appears on the interrupt terminal (itA).
gl+" signal is input and the operation starts from step S15. In step S15, the terminal (034) is set to "Higl+" to enable display of the charging state and light emission control mode, and then the block (AC8 ), (HLA)
Data from terminal (ilo), (i12) = (i14
), (i16), and (i18). block(
HLA) outputs the data shown in Table 17 as described above. On the other hand, the block (ACS) outputs data corresponding to the attached accessory, and has the relationship shown in Table 18.

In step S17, the amount of light emitted is set to a low level.
If it is limited to ``LoIll'', IvL is set to the maximum light emission amount I v + nax.If the light emission amount is not limited to ``Low'', it is set to the next highest level. It is determined whether the limit is set to "High". Then, if it is limited to "High", set lvH to Ivmax, "l-1i g b
”, the total light emission amount IvF is set to Ivmax.
shall be. Here, IvF>IvH>IvL. Next, in step S22, it is determined whether a telepanel is attached or not. If a telepanel is attached, the effective light emission amount is doubled, so Iv+naλ+1 is set as Ivmax, and Iv+nin+1 is set as Ivn+i.
o. Here, Ivmin corresponds to the minimum amount of light emission. If it is determined in step S22 that a telepanel is not attached, then it is determined whether a wide panel is attached. If a wide panel is installed, the effective light emission amount will be 1/2, and Ivmax
-1 is Ivmax, Iv+n1n-1 is Iv+ai
Let it be n. On the other hand, if the wide panel is not attached, the effective light emission amount remains the same, so Jv+nax, Iv+
Leave nin as is and proceed to step S28.

In step 828, data 1'SD for sustaining the display for 1 second is set in the timer register TlR2, and the terminal (CFT) becomes "'Higb" and the terminal (i20)
“II(igl, determine whether it is +1 or not. Then,
If the terminal (i20) is not “Higb”, then S3
Light emission starts at step 0, and flip 70 tubes (
RF7) is set and the terminal (i22) is set to “I-1ig”.
Determine whether the terminal (i22) is “
If “High”, the terminal (i22) is
Wait until “LolIl” becomes “LolIl”, and the terminal (i22) becomes “LolIl”.
11. When it becomes owII, the process moves to step S59.

On the other hand, if the terminal (122) is "Low" in step S30, a constant value α2 is subtracted from the register TIR2, and it is determined whether the contents of the register TIR2 are "()". If it is not "0", the process returns to step S29, and if it is "0", the process moves to step S63, and the display is turned off.

When the terminal (i20) becomes 'High' in step S29, the CAFL signal is input from the camera, and data is sent from the camera to the 7th row.Therefore, in step S35, a serial input command is executed, and the terminal (SCKF ) based on the clock pulse input to the terminal (SINF).
Read the data you enter into the .

When the input of data is completed, the read data is set in a specific register, and then the next data is read and this data is set in the specific register.

This 2-byte data is the data shown in Tables 8 to 14.

In step S41, based on the read data, it is determined whether the exposure control mode or P mode is active. and,
In P mode, the terminal (032) must be connected to "
If the mode is not P mode, set the terminal (032) to “Lo”.

In step S44, the read film sensitivity data Sv is set in the display register FSI). Next,
Fill - Determine whether the In7 rush mode signal is being captured. Then, when it is determined that it is the Fill-In flash mode, the terminal (03
6) to “Higb” and the light emitting diode (F I L)
lights up to indicate the Fill-In flash mode, and adds 1 to the captured film sensitivity data Sv.
, and set Sv+1 as film sensitivity data Sv.
, move on to step 19.

On the other hand, if it is not Fill-1n7 rush mode, 84
In step 8, set the terminal (036) to “Loiu” and set it to S.
Proceed to step 49.

1 in step S49, the data of the first byte is “7”.
811", and if it is "78+1", aperture control is impossible as described above, so register A F) D R for aperture display and register EDD for interlocking range display.
"IJ OII" is set in R and the process moves to step 358. On the other hand, the data of the first byte is “'7811”
Otherwise, in steps S50 and S51, Iv + nax + Sv Avf is determined based on the film sensitivity data 5v from the camera (Sv+1 in Fill-In7 rush mode), aperture value Avf, maximum light emission amount I v +nax, and minimum light emission amount 1v + nin. = Dv +
naxIv +nin + Sv Avf= Dv
calculate the maximum shooting distance Dv + nax and the shortest shooting distance Dv min at which flash emission is appropriate.
Calculate. Then, the aperture value data Avf is set in the display register APDR, and the process moves to step S54. In step S54, it is determined whether the mode is automatic light control mode, and if it is automatic light control mode, the process moves to step 35G. On the other hand, if it is not the automatic light control mode, then it is determined whether the mode is P mode or not, and if it is the P mode, the process also moves to step 956. On the other hand, if the mode is not the automatic light control mode but the P mode, the process moves to step S57. In step 856, for the mode in which automatic light adjustment is performed, the interlocking range I) vmax to Dv+oi that provides appropriate exposure is determined.
Data or display register for displaying n E D D
I-? is set to On the other hand, in step S57, since the mode is a manually set light emitting mode, data for displaying the photographing distance Dvmax for proper exposure is set in registers ''E and DDR.

In step S70, it is determined whether or not the bounce state is established, and the terminal (i24) is set to ``I-1i gll''.
When it is determined that it is in the re-lance state, the contents of the interlocking range display register EDDR are set to "' 00 II".
Then, the process moves to step 858. Therefore, the linked range is no longer displayed during bounce photography.

In step S58, the film sensitivity, aperture value, and interlocking range (shooting distance) are displayed on the display unit (FDP) based on the data from the display register, and the process moves to step S59. In step S59, interrupts to the terminal (itA) are enabled, data ISD is set in register TIR2, and then a constant value α is set from the contents of register TIR2.
Subtract 3 and get the contents of register T I R2 '0'
Repeat the operation to determine whether the Then, while performing this operation, when the FL CA signal is input from the camera, the operation from step 815 is performed. On the other hand, if no interrupt signal is input to the terminal (iLA) after 1 second, the process moves to step S63 and the terminal (032)
, (034), and (036) as "Lou+" and set registers FSDR, APDR, and EDDR to 0011" to display data and turn off the display section. Then, the terminals (itA) and (itB) Enable interrupts to and by the counter, set 20 minutes of count data 20MD in register T I R1, and CEND.
state. Therefore, even when data is exchanged and a flash is emitted, the terminal (ESI)) is
gh'' time is extended by 20 minutes from that point on.

Figure 13 shows the timer circuit (CT) in the controller (1).
This is a specific example of C). (POR5) is a power battery (BAI)
) is installed, it outputs a reset signal and the OR circuit (O
R31), (OR32) via 7 rip, 70 rip (
RF20) and reset the counter (CO20). When the power switch (FSI) of the flash device is closed, the line (L5) becomes “Low” and the inverter (I) is turned on.
The output of N25) becomes "High" and a "High" pulse is output from the one-shot circuit (O520). This pulse causes the OR circuit (OR30) to set the 7-rip and 70-tub (RF20), and also resets the counter (CO20) via the OR circuit (OR32). When the 7-lip/70-tub (RF20) is set, the clock pulse from the pulse generator (PGO) is output from the AND circuit (AN73), and when 25 minutes have elapsed since the counter (CO20) starts counting, the clock pulse is output from the AND circuit (AN73). The output of one terminal becomes "High". Then, a clock pulse is output from the AND circuit (AN74), and is passed through the OR circuits (OR31) and (OR32) to the flip/70 tube (RF20) and the counter (CO20).
) is reset.

While the 71 and 70 tubes (RF20) are in the reset state, the terminal (C4) is “Lou+” and the terminal (C5) is “II”.
l (i gl, 11, transistor (13
Power is supplied by Tl) and (BT2).

When the switch (AP, SL) is closed while the power switch (FSI) of the flash device is closed, the output of the AND circuit (AN70) becomes “l (high”) and a one-shot circuit (O821) A “High” pulse is output from. This pulse also sets the flip 70 knob (RF20) via the OR circuit (OR30), and also sets the counter (C02) via the OR circuit (OR32).
0) is reset. Therefore, 7 lips and 70 tubes (R
If the transistor (B T
l), (B T2) conduction state is switch (APSI)
It will be extended for 25 minutes from the time of closing.
Lip 70 tube (RF20) is in reset state Transistor (B Tl), (B T2) is in switch (A
When the PSI) is closed, it becomes conductive, and this conductive state continues for 25 minutes. Also, from the line (C3), the clock pulse from the line (L3), the Fl-CA multiplied signal C
An AFL signal, a release signal, and a light emission control signal are input. Since this signal is also sent to the OR circuit (OR30) (01'<32) via the AND circuit (AN72), the same operation as when the switch (APSI) is closed is performed.

FIG. 14 is a specific example of the control circuit (CNC) in the flash controller (I). Power line (V
When the power supply from C) starts, the power-on reset circuit (POR4) outputs a set signal to the terminal (poc), the timing signal output circuit (FTC) is reset, and the OR circuit (OR36), ( OR37
), a signal is output that resets the 7 lip-flops. Note that the timing signal output circuit (FTC) is
Figure 1 shows a specific example of the circuit. When the FLCA signal is input from the terminal (CF13), the terminal (FCT)
The output of the AND circuit (AN82) becomes "Lou+", and all the inputs of the NOR circuit (N010) become II Lo Ill II, making it possible to output data at each bit.

(bO) bit connects the mounting signal from the 7 lash device (II) from the terminal (CF22) to the transistor (BT36).
), inverter (IN33), AND circuit (AN75)
, a NOR circuit (NOIO), and a transistor (BT30). Furthermore, at the falling edge of the clock pulse output from the AND circuit (AN90), 7 rip and 7
The attachment signal from the flash device (II) is latched to the 0 knob (CF31). For the (bl) bit, the terminal (CF1
2),) Run E) star (BT31), inverter (I
The mounting signal of the flash device (IV) outputted through the AND circuit (AN87) is outputted via the AND circuit (AN87) at the falling edge of the clock pulse outputted from the AND circuit (Ar188).
It emits and latches with 7 rip and 70 knob (CF30). Here, the switch (MC3) is closed when the simultaneous light emission mode is selected, and the output of the inverter (IN34) is "High". Therefore, no attachment signal is output from the AND circuit (AN87). On the other hand, if sequential light emission mode is selected, switch <MC8)
is open, and the output of the inverter (IN34) is “
The AND circuit (AN87) outputs a mounting signal when the output is “Low”. Therefore, the output of the AND circuit (AN89) is “Low”.
When it becomes 'High', it means that two 7 lash devices (II) and (IV) are installed in sequential light emission mode.

At bit (b2), at the falling edge of the clock pulse from the AND circuit (AN93), a signal indicating which of the 7 rush devices is in the fully charged state is sent from the OR circuit (OR3S) to the 7 rip-flop (CF23). latched and further, both 7 from the AND circuit (AN92)
The signal indicating that the latching device is fully charged is 7.
It is latched into the lip-flop (DF'32).

At bit (b3), in the sequential mode of the AND circuit (AN89), a multi-flash signal indicating that both 7 lash devices are installed is output from the AND circuit (AN7G) to the terminal (CF12). This signal is read by the flash device (1), and as described above, the mode is set to mode C, in which light is emitted at the rising edge of the signal on line (L3). (b4) bit has 7 rips and 70 rips (DF
The signal from 32) indicating both charging is sent to the AND circuit (AN7
Output from 7). This signal is connected to the flash device (1v
) is read and sequentially enabled to emit light in the light emitting mode. For bit (b5), if both 7-lash devices are installed and in sequential mode, the output of the AND circuit (AN78) is set to "Loll", otherwise, the "High" signal from the flash device (II) is set to "Loll". AND circuit (AN
78). This signal is read by the camera body and calculates 7 flashes for multi-flash mode and 7 flashes for simultaneous flash mode.
The calculation for rush is switched.

(b6) bit is in sequential mode with an AND circuit (AN8
If the output of 9) is “Higb”, AND circuit (AN79)
The output of the AND circuit (AN8
If the output of 9) is “Loll”, the flash device (rr
) is outputted via an AND circuit (AN79). Therefore, in the sequential mode, the camera body determines the FCC signal according to the signal from the flash device (1v). On the other hand, when the mode is not sequential, the FDC signal from the flash device (II) is sent. At this time, even if the flash device (IV) is attached,
In the simultaneous light emission mode, different signals ("High" and "Loll") are not output as FDC signals, so there is no problem for the camera body.

(b7) bit: 7 rip/7 in sequential mode
Both fullness signals from the 0 tube (DF32) are connected to the AND circuit (
AN80). On the other hand, when the mode is not sequential, a fullness signal from the flash device (11) is outputted via the AND circuit (AN81). Table 19 summarizes the above operations.

Next, when the CAFL signal is input, the terminal (CFT) goes high.
igl+'', the data from the camera body is output from the NAND circuit (NAIO) via the inverter (IN30), and the data from the camera body is output via the transistor (BT35) to the terminal (C
This data is output from F22). Also, MH-(
The clock pulse from the transistor (BT
32), Inverter (IN31), Inverter (IN3
2), terminal (CF2) via transistor (BT37)
3). Therefore, data from the camera body is directly sent to the flash device (II) via the controller (I). Also, at this time, the terminal (CF
T) becomes “HiH1+”, the AND circuit (AN8
The output of 2) becomes “Lou+” and the transistor (B
T30) is non-conductive.

Next, the operation of light emission control will be explained. When the release signal is input, the terminal (RLT) becomes "Higb" and the reset state of the counter (CO22) is released.

Similarly to the counter (Co9) of the flash device, when the closing signal of the X contact (Sx) is not input even after a certain period of time has elapsed, a clock pulse is output from the AND circuit (AN83). is an OR circuit (O
R35) to the timing signal output circuit (FTC), and the timing signal output circuit (FTC) terminal (R
LT) becomes “Lou+”. Therefore, from now on, the terminal (C
Even if FII) falls to "Lou+", the light emission start signal is not output. When the transistor (BT33) becomes conductive by closing the X contact (Sx) while the terminal (RLT) is “Higl+”, the one-shot circuit (O323) outputs a high signal.
l+" pulse is output and this pulse is output from the AND circuit (AN84). This pulse is output from the OR circuit (O
R35) to the timing signal output circuit (FTC), and the terminal (RLT) becomes Lo111II. In addition, the pulse from the AND circuit (AN84) is 7 rip.
It is also sent to the 70 tube (RF22), the flip-flop (RF22) is set, and the transistor (BT34) is set.
) becomes conductive, and furthermore, the AND circuit (AN67) in the timing signal output circuit (F'l''C) shown in FIG.
) becomes disabled, and the signal from the terminal (CF13) is no longer input into this circuit (FTC). Furthermore, when the flip-flop (RF22) is set, the reset state of the counter (CO24) is released, and the two 7-lash devices sequentially emit full light, similar to the counter (Coil) in Fig. 10. Start a click for a certain period of time longer than the required time.

When a "High" pulse is output from the AND circuit (AN84), at least one flash device is in a fully charged state and the Q output of 7 lip/70 tube (DF33) is "
Simultaneous light emission mode at ``High'' mode and circuit (AN86
) outputs the pulse from the one-shot circuit (O323) and sends it to the 7-rip circuit via the OR circuit (OR'39).
70 tube (RF23) is set, transistor (B
T38) becomes conductive, and a light emission start signal is sent to the flash device (II). Also, both fullness signals are output and 7
The Q output of Rip 70 tube (DF32) is 'Highly
”, the AND circuit (AN95) outputs “Higl+
" pulse is output, 7 lip/70 knob (RF23) is set via the OR circuit (OR39), the transistor (BT38) becomes conductive, and a light emission start signal is also sent. Then, the terminal (CF13) A light emission stop signal is sent from the terminal (CF23) to the 7 lash device (II), and light emission is stopped at the rising edge of this signal.

When the carry terminal of the counter (CO24) becomes "High", a clock pulse is output from the AND circuit (AN85), and the flip signal is sent through the OR circuit (OR36).
The 0 knob (RF22) is reset and the counter (C02)
4) becomes a reset state. Furthermore, an AND circuit (AN
The clock pulses from
”), it is output from the AND circuit (AN91), 7 lip/70 tube (RF24) is set, the transistor (BT39) becomes conductive, and a light emission start signal is sent to the flash device (V). When (SX) is opened, the one-shot circuit (O324) is '111g1+
” pulse is output and the 7 lip/70 knobs (RF23) and (RF24) are reset via the OR circuit (OR37), and the light emitting signal is no longer sent and the 7 lip/7
0 knobs (DF30) to (DF33) are also reset.

Note that both terminals (FCT) and (CFT) are II L
.

, II, the signal from the terminal (CF22) from the flash device (II) is output to the terminal (CF12) via the AND circuit (ANS2), so the camera body performs an integral operation to control the amount of light emitted. is controlled in the same way as if there was no controller (1).

Table 8 Table 9 Table 10 (Av integer part) Table 11 (Sv integer part) Table 12 (Av decimal part) Table 13 (Sv decimal part) Table 1
4 (Exposure Control Mode) As explained above, in the present invention, there is a first light emitting means that emits flash light, and a second light emitting means that starts emitting light after a certain period of time has elapsed from the start of light emission of the first light emitting means. and second integrating means @1 and second integrating means that respectively integrate signals corresponding to the light reflected from the object due to the light emitted from the two source means, and the integrated value of the first integrating means is When the first level is reached, the first light emitting means stops emitting light, and when the integral value of the second integrating means reaches the level @2, the second light emitting means stops emitting light. It is possible to reliably emit light sequentially and to appropriately control the ratio of the amount of light emitted by the fourth and second light emitting means. It is possible to reliably perform flash photography having the light distribution characteristics intended by the person in the shadow.

[Brief explanation of the drawing]

Fig. 1-1 is a block diagram showing a schematic configuration of a first embodiment of the present invention, Fig. 1-2 is a block diagram showing an embodiment of the invention composed of two 7-lashes and a camera, and Fig. 2 is a block diagram showing the overall configuration of a flash system to which this invention is applied, FIG. 3 is a block diagram showing a specific example of the camera body, FIG. 4 is a circuit diagram of the display section, and FIG. 5 is a block diagram of the serial data input/output section. Circuit diagram, Figure 6 is a circuit diagram of the data input/output circuit and light emission control circuit, Figure @7 is the circuit diagram of the data output circuit, Figures 8-1 to @8-3 are the operation of the microcomputer (MCOB). Figures 9-1 and 9-2 are flowcharts showing the operation of step #38 in Figure 8-1, Figure 10 is a circuit diagram of the flash controller F roll circuit, and Figure 11 is a timing chart. , a circuit diagram of the timing signal output circuit, and FIG. 12 is a microcomputer (MCF)
), Figure 13 is a circuit diagram of the timer circuit, and Figure 14 is a circuit diagram of the control circuit. (1)...Light emission start signal output means, (2)...
...First light emission signal output means, (3)...
@1 integration means, (4)...signal source, (5).
...Comparison means, (6) ...One shot 1
Circuit, (7)... Light emitting part, (8)...
Timer, (9)... Second light emission signal output means, (10)... Integrating means, (11)...
・Signal source, (12)...Comparison means, (13)・
...One digit circuit, (14) ... Light emitting part. Patent applicant: Minolta Camera Co., Ltd. Agent: Hagashi Aoyama (2 people)

Claims (4)

[Claims] (1) first and second integrating means for dividing signals corresponding to light reflected from a subject by flash emission, means for outputting first and second reference signals, and a means for outputting first and second reference signals; means for outputting a light emission start signal; means for outputting a first integration start signal of the first integration means immediately after the light emission start 1i knee signal is output; and a means for outputting a first integration start signal of the first integration means; means for outputting a second integration start signal of the second integration means when the elapsed time has elapsed; and a first light emission means that starts emitting light based on the light emission start signal. A second light emitting means that fully starts emitting light after a certain period of time has elapsed since the light emission start signal is output; means for outputting a first light emitting stop signal; and means for outputting a second light emitting stop signal to the second light emitting means when the output of the second integrating means reaches the level of the second reference signal. A flash photography system characterized by comprising: (2) The first signal that separates the signal corresponding to the light reflected from the subject by flash emission and passed through the copying optical system.
and a second integrating means, a means for outputting first and second reference signals, a means for outputting a light emission start signal for the flash light emission, and a signal transmitted from a flash device that emits a flash light based on the light emission start signal. 1) means for operating the first integrating means at IJ start (+j); and when the output of the first integrating means reaches the level of the first reference signal, the flash is emitted; means for fully outputting a first light emission stop signal, and a means for fully outputting a first light emission stop signal, and a second integration means for controlling the second light emission signal by a second light emission start signal sent from the flash device when a certain time 11A1 has elapsed after the light emission start number 1d was output. The above-mentioned flash is characterized in that the above-mentioned flash is characterized in that all of the above-described features include an operating type zeroing means, and a means for outputting a second light emission stop signal for the flash light emission when the output of the above-mentioned integrating means 82 reaches the level of the second reference signal. Camera for shooting system. (3) a means for determining whether the mode is the first mode or the second mode; a means for inputting a light emission start signal for flash emission;
means for outputting a light emission number 1d, and in the second mode outputting a second light emission number 1d after a certain period of time has elapsed after the light emission start signal is input; Signal 'f corresponding to the reflected light from the object: the first signal that causes the operation of the first integrating means on the camera side to be 11 times
a means for outputting an integration start signal, and a second integration start for causing operations of a second integration means of camera II that integrates a signal corresponding to light reflected from a subject due to flash emission at the same time as the output of the second light emission signal. means for outputting a signal; means for inputting a first flash emission stop signal and a second light emission stop signal; in the first mode, the first light emission stop signal is fully output;
In the second mode, a means for outputting a second light emission stop signal and the first or second light emitting shop name are used to fully start the light emission, and the first or second light emission stop iif+i′ causes the light emission to be completely stopped. A flash device for the above-mentioned Franche photography system, characterized in that it further includes a light emitting means. (4) A means for completely determining whether the mode is the first mode or the second mode, and a means for manually starting the flash emission No. 11;
In the first mode, the first light emission number 100 is output immediately when the light emission start signal 1d-υ· is input, and in the second mode, the light emission start signal is manually input and the second light emission signal is output after a period of 11·r has elapsed.
means for outputting a light emission signal, means for stopping the first and second light emission of the flash, and means for outputting a 10th light stop signal in the first mode; In this mode, a means for outputting a second light emission stop signal, and a light emitting means for starting light emission by the first or second light emission signal and stopping light emission by the first or second light emission stop signal are provided. A flash device for the above-mentioned Franche photography system, which is modeled after Yuzuekokin.