JPS6279433A - Display controller for camera - Google Patents

Abstract

PURPOSE:To decrease the number of components and to simplify a circuit constitution by displaying flash photographic distance information by using a decoder and a display element for displaying diaphragm information on a photographic lens. CONSTITUTION:A maximum interlocking distance value in flash photography is loaded in a register AVR for displaying the diaphragm information on the photographic lens and the data in this register AVR is decoded by the decoder DD for diaphragm information display and displayed by using a segment DE as the display element for the diaphragm information display. Thus, the maximum interlocking distance information as flash photographic distance information in flash photography by an electronic flash device FL is displayed by using the decoder DD and segment DE for displaying the diaphragm information by utilizing the coincidence between the sequence of this data and the data sequence of the stop information. Consequently, the components are decreased in number and the circuit constitution is simplified.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a display device of a camera body that displays aperture information of a photographing lens and flash photography distance information during flash photography using an electronic flash device. The present invention relates to a camera display control device configured.

[Conventional technology]

In recent years, as photographic systems such as cameras and electronic flash devices have become more computerized, various photographic information has been displayed using display devices such as so-called electronic display devices such as LCDs and ECDs that can be electronically controlled. There are many products that have appeared that are designed to do this. Furthermore, in order to make the entire system more compact by consolidating the display and to make it easier for the user to visually check the information, the display of the camera body also displays photographic information from peripheral devices for the camera body, such as electronic flash devices. It is known that the image is displayed using the following method.

The shooting information displayed by these display devices includes the aperture information of the shooting lens, the shutter speed information of the camera body, and the sensitivity of the film, the aperture of the shooting lens, and the electronic There is distance information to a subject that can be photographed with a flash (hereinafter, this information will be referred to as flash photographing distance information), which is determined by the amount of light emitted by the flash device.

Conventionally, in a camera display control device configured to display the above-mentioned aperture information of the photographing lens and flash photography distance information during flash photography using an electronic flash device on a display device of the camera body, each information is displayed on the display device of the camera body. Separate decoders and display elements were used to display the images.

[Problem that the invention seeks to solve]

However, in the conventional configuration described above, a decoder and a display element are provided for each piece of information, which inevitably increases the number of parts and complicates the circuit configuration, resulting in a cost store knob. Met.

In view of the above-mentioned circumstances, an object of the present invention is to provide a display configuration that allows for aggregation and is advantageous in terms of cost.

[Means for solving problems]

A characteristic configuration of the display control device for a camera according to the present invention is such that flash photography distance information during flash photography using an electronic flash device is displayed using a decoder and a display element for displaying aperture information of one darkest lens. It's because I did it.

[Function] In other words, as is well known, the f-number (FN) of the photographing lens is used as aperture information, the distance between the electronic flash device and the subject (LN) is used as flash shooting distance information, and the electronic flash device Guide number (GN), which is information on the amount of light emitted by
The following equation holds true between the three parties.

GN=FNXLN That is, if the amount of light emission is constant, the aperture information and the flash photography distance information will be inversely proportional. The F number (FN) as aperture information is [1,4, [2], [2,8]
]...and so on, it changes by a factor of 1. Therefore, the linked distance information calculated based on the above formula also changes by a factor of five. This means that the data series of aperture information and flash 1 closest shadow distance information is
This shows that both numbers are a geometric progression with 5 as a multiple.

Therefore, when displaying aperture information and flash shooting distance information during flash photography on the display device of the camera body, we utilize the fact that the data series almost matches the data series of the aperture information as described above. Then, flash photography distance information is displayed using a decoder and a display element for displaying aperture information.

〔Example〕

The present invention will be described in detail below based on the drawings.

FIG. 1 is a circuit diagram configuring the entire system.

This system is composed of an interval device (IT) for performing one closest shadow at regular intervals, a camera body (CA), a photographic lens (LE), and an electronic flash device (PL). Interval device (IT), photographic lens (L
E) and the electronic flash device (PL) are connected to the camera body (CA) at the connection parts (JIc) and (JL), respectively.
C).

(JFC).

The interval device (IT) is powered by a battery (BAI).
), a setting section (18), and an interval circuit (1) that transmits and receives signals to and from the camera body (CA) based on the settings of the setting section (18).

In the setting section (18), the shooting cycle, the number of shots, and 1-
It is now possible to set the shadow start time, etc.

The interval circuit (1) sets the output terminal (IT2) to the "off" level at a predetermined shooting cycle set by the setting section (18), and connects the camera body (CA) via the signal line (11).
) sends a release signal (PSS) of "L" level. When the shooting cycle is longer than 1 minute, a shooting operation is performed, that is, a release signal (PSS) is output.
If the shooting cycle is shorter than 1 minute, immediately after the shooting operation is completed, the output terminal (ITl) is pulsed to “L”.
” level. As a result, the photometric amount, 6/(g
(PSS) is sent to the camera body (CA).

When the exposure on the camera body (CA), that is, the shooting operation is completed, the exposure completion signal (EES), which maintains the "H" level for a predetermined period, is sent from the camera body (CA) to the signal line (jl
! This signal (EIES) is sent via (12)
is input to the input terminal (IT3) of the interval circuit (1), and in response to this, the incremental circuit (1) sets the output terminal (IT2) to the "I-(" level).

This completes the one-frame shooting operation by the interval device (IT), and from then on, similar operations are performed in the setting section (18).
) The camera body (
It is configured to perform a photographing operation by exchanging signals with CA).

Next, the configuration of the control circuit of the camera body (CA) will be explained.

The control circuit of the camera body (CA) is powered by a battery (B).
A2), microcomputer (hereinafter abbreviated as camera computer) (2), interface circuit (3),
Display device (4), motor control circuit (5), automatic focus adjustment device (6), photometry circuit (7), film sensitivity setting circuit (
8), exposure control circuit (9), and automatic light control circuit (10)
), etc.

A camera computer (2) controls each part of the camera body (CA) and the operation of the entire system. The interface circuit (3) connects the circuit of the camera body (CA) (mainly the camera computer (2)) and the photographic lens (L).
E) and the electronic flash device (FL). The display device (4) is composed of a segment type liquid crystal display device (D[E), and is decoded by the aperture display decoder (DD) and other decoders (Dd) in the camera computer (2). Shooting information such as film sensitivity information, exposure information, or the number of film frames that have been shot is displayed under direct control from the camera computer (2). The motor control circuit (5) includes a motor (5) that winds and rewinds the film and charges the shutter.
Controls the drive of Ml). The automatic focus adjustment device (6) is
The distance to the subject or the focusing state of the photographic lens (LH) is detected, and based on the detection result, the photographic lens (LE
) to automatically adjust the focus. A photometry circuit (7) detects the brightness of the subject. The film sensitivity setting circuit (8) reads the film sensitivity code (DX
The film sensitivity information is output to the camera computer (2) by automatically reading the code) or by reading the film sensitivity manually set using the film sensitivity setting dial.

The exposure control circuit (9) controls the aperture and shutter speed based on signals from the camera computer (2). The automatic light control circuit (10) is an electronic flash device (FL)
The amount of flash light emitted from the camera and reflected from the subject is detected after passing through a photographic lens (LE), and the amount of light emitted by the electronic flash device (PL) is controlled according to the detected amount of light.

Among the components of the camera body (CA) described above, the camera computer (2), the display device (4), the interface circuit (3), and two AND circuits (ANI),
(AN2) and the inverter circuit (INI) are configured to be supplied with power directly from the power source battery (B^2) at voltage [V 01]. The entire circuit other than these is connected to the voltage [V
11]. This power supply transistor (Tri) is turned on and off by a signal output from an output terminal (OF2) of the camera computer (2) via an inverter circuit (INI).

In addition, the above-mentioned motor control circuit (5), automatic focus adjustment device (6), photometry circuit (7), and exposure control circuit (9)
is connected to the output terminal (CCLK) of the camera computer (2).
), and these circuits (5), (6), (7),
(9) performs each operation control described above based on this clock signal (φ1).

Next, the configuration of the control circuit of the electronic flash device (Doshi) will be explained.

The control circuit of an electronic flash device (FL) is powered by a battery (
BA3), microcomputer (hereinafter abbreviated as flash computer) (12), hardware configuration control section (14), illumination angle detection circuit (13), display section (15),
It is composed of a booster circuit (16), a light emitting section (17), a switch group (23), and the like.

Flash computer (12) and system? ff11 parts (
14) (!: controls the operation of the electronic flash device (FL). As will be explained later, this electronic flash device (FL) satisfies the angle of view according to the focal length of the photographic lens (Lli). The illumination angle can be changed as shown in FIG. A 2-bit flash computer (
12). The display section (15) is displayed on the camera body (C
Completion of dimming by the automatic dimming circuit (10) in A), completion of charging of the main capacitor (C2), and the mode in which the above-mentioned illumination angle is changed by itself are indicated by lighting of the LED. The boost circuit (16) includes a boost control transistor (T
r3), and its operation is controlled by the power supply voltage [VO2
] is boosted to the voltage [V32] required for flashing light. The light emitting unit (17) emits and stops flashing light, and also checks the state of charge of the main capacitor (C2) that stores energy for emitting flashing light. The switch group (23) includes a plurality of switches for setting various data.

In the control circuit of the electronic flash device (FL) described above, a voltage [V12] is applied to the parts other than the control section (14) and the display section (15) through the main switch (SM) and the diode (Dl). It is configured to be powered.

Further, the control section (14) and the display section (15) are configured to be supplied with power at a voltage [V22] via a power supply transistor (Tr2). This power supply transistor (
Tr2) is turned on and off by a signal output from the output terminal (PWC) of the flash computer (12) via the inverter circuit (IN2).

In the figure, (DI) is a reverse charge prevention diode, (D
2) is a rectifier diode, (C1) is a relatively large capacitor that prevents the flash computer (12) from malfunctioning due to a drop in power supply voltage when the booster circuit (16) is operating, and (gate 3) is a capacitor with a relatively large capacity. The motor for changing the irradiation angle (S5) is a switch for test light emission.

The configuration and operation of the electronic flash device (PL) will be described in more detail later.

Next, signal lines (11) to (7!9) for transmitting and receiving signals between the photographing lens (LE) and the electronic flash device (FL) and the camera body (CA) will be explained.

First, the signal lines (15) to (7!9) for transmitting and receiving signals between the photographing lens (LE) and the camera body (CA) will be explained.

The signal line (15) is for feeding power to the lens circuit (11) in the photographic lens (LE), and this voltage is applied to the power feeding transistor (Tri) of the camera body (CA).
It is designed to be supplied from the lower side. The signal line (16) is for transferring a lens data transfer clock signal (LCKS) used for serial data transfer from the camera body (CA) to the layered lens (LIE). The signal line (17) is for serial data transfer, and the lens circuit (7! 11) to the camera body (CA) serially. The signal line (I!8) is an “H” level lens data transfer start signal (L) that is output from the camera body (CA) at the start of this serial data transfer.
DTS). Signal line (2
9) is for grounding.

Next, there are signal lines (β1) to (14) that transmit and receive signals between the electronic flash device (FL) and the camera body (CA).
I will explain about it.

The signal line (11) is a synchronization signal (XTS) for flash light emission.
) is for transferring. This signal line (11
), when the first curtain of the shutter has completed running and the X contact (SX) is closed, an “L” level synchronization signal (XTS) is sent to the camera body (CA) via the CA) to the electronic flash device (PL).

The signal line (β2) is used as a bidirectional bus for data transfer when data is transferred serially between the camera body (CA) and the electronic flash device Z (PL).
During exposure control, it is used to transfer the dimming start signal (ASS) output from the electronic flash device (PL).

In addition, this signal line (12) is connected to an electronic flash device (FL).
) on the display device (4) of the camera body (CA).
) flash display start signal (FDSS)
) and is also used to transfer the flash display end signal (FDES) to the camera body (CA).

Furthermore, this signal line (12) is connected to an electronic flash device (F
When the main capacitor (C2) of L) is fully charged,
This signal (CBS) is used to transfer the H” level charge completion signal (CBS).This signal (CBS) is also used when an electronic flash device (FL) that cannot transfer data with the camera body (CA) is used. Data can also be transferred when it is attached to the camera body (CA).

The signal line (13) is for transmitting a camera mode signal (CMS) indicating the mode of the camera body (CA), and is a mode (hereinafter referred to as When this mode is (abbreviated as FC mode), an “H” level signal is sent to the camera body (FC mode) during [T1] to indicate the start of this mode.
A) is transferred to the electronic flash device (PL). Similarly, when in the mode for transferring data from the camera body (CA) to the electronic flash device (FL) (hereinafter this mode will be abbreviated as <CF mode>), +1 H11 during [T2]
A mode in which the level signal also controls exposure using the aperture and shutter speed during the release operation (hereinafter referred to as
This mode is abbreviated as <EC mode>), [
T3], the “H” level signal is transmitted to the camera body (
CA) to an electronic flash device (PL).

This signal line (13) also receives the Franche data transfer clock signal (FCKS) output from the camera computer (2) during data transfer (in the above-mentioned (FC mode> and <CF mode)). Used for transfer. Furthermore, during exposure control (when in <EC mode> mentioned above), the automatic light control circuit (1) of the camera body (CA)
“H” level dimming completion signal (AE
S).

Note that the signal line (14) is for grounding.

Next, the switch (Sl) provided on the camera body (CA)
) to (S4) will be explained.

(Sl) is a photometry switch for starting photometry. This switch (Sl) is closed by pressing the release button (not shown) beyond the first stroke. When this switch (Sl) is closed, the camera computer (2
), and the operation of the camera body (CA) is started.

(S2) is a release switch. This switch (S
2) is closed by a pressing operation that exceeds the second stroke of the release button, which is longer than the first stroke. Exposure control is started by closing this switch (S2).

(S3) is a switch indicating completion of exposure, which is opened when shutter charging is completed and closed when exposure is completed. Further, (S4) is a switch that indicates the completion of winding one frame of the film, and is opened when the release operation is performed, and the exposure is completed and the winding of one frame of film by the motor (Ml) is completed. It is now closed from time to time.

Note that (25) in the figure is a reference pulse generation circuit equipped with a crystal oscillator (25a).

Next, the operation of the control circuit of the camera body (CA) configured as described above will be explained based on the flowcharts of FIGS. 2 to 9.

The camera described in this embodiment has only a program mode in which the camera computer (2) automatically determines the aperture and shutter speed during exposure. Also, before entering the flowchart in Figure 2, the battery (BA
It is assumed that the camera computer (2) is powered on by attaching the camera computer (2). At that time, it is assumed that the camera computer (2) is stopped after the reset terminals of each register are reset.

In this state, the photometry switch (St) is closed, or the release signal (PSS) output from the interval device Z (IT), or the photometry start signal (pulsed to "L" level) that precedes it ( PSS) is the camera body (CA
), the output signal from the AND circuit (ANI) falls from the "H" level to the "L" level. This signal is transmitted to the interrupt input terminal (CI) of the camera computer (2).
NTI) and the camera computer (2)
is configured to execute the flow shown in FIG. 2 when this terminal (CINTI) falls.

In addition, a flash display start signal (FDSS) output from the electronic flash device (PL) that displays flash photography information on the display device (4) of the camera body (CA) is transmitted to the camera body (CA).
CA), the interface circuit (3
) outputs an interrupt signal (IN). Similarly, when this interrupt signal (IN) is input to the interrupt input terminal (CINT2) of the camera computer (2),
It is configured to execute the flow shown in FIG.

Any of the interrupt input terminals (CINTI or CI
When an interrupt to NT2) occurs and this flow starts, the camera computer (2) first prohibits interrupts to the two interrupt input terminals (CINTI) and (CINT2) (#1). And the photometry switch (Sl)
If it is determined that it is closed, set the S1 flag (SIF) (#la), and if it is determined that it is open, set the S1 flag (SIF). The flag (Sit') is reset (lHc).

Subsequently, the output terminal (Or'2) is set to the "I4" level (#2). The output signal from this output terminal (OF2) is
It is inverted by the inverter circuit (INI) and becomes "L" level, and the power supply transistor (Tri) becomes "ON" state. As a result, power supply to each part of the control circuit is started. Next, the camera computer (2) outputs a photometry start signal to the photometry circuit (7) to start photometry (113).

Next, a counter (DC
) is reset (114), the output terminal (LM
I) to "H" level (#5). As a result, the photographing lens (L
IE) “H” level data transfer start signal (LDTS)
is output. After outputting this signal (LDTS), the camera computer (2) outputs a lens data transfer clock signal (LCKS) consisting of eight pulses via the signal line (16). The photographing lens (LIE) outputs 1-bit data to the camera body (CA) via the signal line (17) in synchronization with the rise of each pulse, and the camera computer (2) This data is captured in synchronization with the falling edge of .

This is repeated for the number of pulses, that is, eight times, and one byte of data transfer is completed. The camera computer (2) takes this 1-byte data into a predetermined register, and
One serial data transfer ends (#6). Repeat this serial data transfer a predetermined number of times (X) #7.
#8) The output terminal (LMI) is set to "L" level to indicate the end of serial data transfer with the photographic lens (LE) (119).

Through this serial data transfer a predetermined number of times (X), the data input from the photographing lens (LIE) is
E) open aperture value (AVo), aperture value at the minimum aperture of the photographic lens (LH) (AVmax), photographic lens (LE)
The focal length value (fv) of ↑, the lens wearing state data indicating whether an island shadow lens (LE) is attached or not.

Next, the camera computer (2) has an input terminal (IPI
) is determined (1110). This input terminal (IP
A photometric switch (Sl) is directly connected to I). If this input terminal (TPI) is determined to be at the "L" level, it is determined that an interrupt to the interrupt input terminal (CINTI) has occurred due to the photometry switch (Sl) being closed. , outputs a signal to start an automatic focus adjustment operation (1111).

Additionally, if this input terminal (IPI) is determined to be at the "I" level, it is determined that the photometry switch (Sl) is in the open state and automatic focus adjustment operation is not necessary, and automatic focus adjustment operation is performed. A signal to stop is output (I12).

Next, in order to transfer serial data with the electronic flash device (PL), the output terminal (17M2) is set to the "■1" level (1113), and then the output terminal (F M1
) to the “I-I” level for [Tl] (114)
. As a result, the camera mode signal (C?!S) at the "■(" level) is output to the electronic flash device (PL) during [T1] via the already explained signal line (β3), and <F
C mode>, that is, the electronic flash device (FL) is notified that the mode is for data transfer from the electronic flash device (PL) to the camera body (CA).

Then, use the photographing lens (
2 using the same method as serial data transfer between
After serial data transfer (li15, 116), the output terminal (FM2) is set to "L" level to indicate the end of serial data transfer with the electronic flash device (PL) (917
).

The contents of this data are shown in Table 1 on the next page.
Next, the data indicated by each bit will be explained. In addition, 2
A total of 16 bits of data will be transferred in the first serial data transfer, and the data from Table 1 transferred in the first serial data transfer will be used as the lower bits, and the second data transfer will be used as the upper bits. Each is an indication.

The bit (bo) is a bit indicating the attachment state, and becomes the "■ (" level) when the electronic flash device (PL) is attached to the camera body (CA) and its main switch is closed.

The bit (bl) indicates whether the device is an electronic flash device (PL) that can serially transfer data with the camera body (CA) (hereinafter, this type of electronic flash device (PL) is referred to as (data transfer type)). This is the first identification focus that indicates the In other words, even with conventional electronic flash devices (PL) that cannot serially transfer data with the camera body (CA), an "H" level signal is sent via the signal line (12) when charging is complete, as mentioned earlier. Therefore, in order to distinguish this type of electronic flash device (PL), in the (data transfer type) electronic flash device (FL), this bit (bl
) is at “L” level.

The bit (b2) is a spare bit and is normally “L”.
The bit (b3) indicates the charging state, and becomes the "H" level when charging is completed.

The bit (b4) is a bit indicating the dimming state, and goes to "L" level when dimming is completed, and the dimming completion signal (FDC
signal).

Bit (b5) is the second identification bit.

In other words, the electronic flash device (FL) is not equipped with a display device such as a liquid crystal display that displays flash photography information such as a guide number, and this flash photography information is not displayed on the display device (4) of the camera body (CA). The camera body (C
A) is the type that outputs the flash photography information (hereinafter, this type of electronic flash device l (PL) is referred to as (camera display type)), this focus (b5) is “H”.
``It's on a level.

The bits (bO) and (bl) are both reserved bits, and are normally at the L'' level.

The eight bits (bO) to (bl) up to this point are converted into an electronic flash bag by the first serial data transfer (1115). (PL) to the camera body (CA).

Bit (b8) and bit (b9) are two bits that indicate the amount of light emission. That is, depending on the amount of light set manually using the light amount changeover switch provided on the electronic flash device (1'L), the light is set to "LL" when the flash is set to full flash, and the light is set to "1" when the flash is set to full flash.
/2 flashes] to LI(", [174 flashes] to HL"
and "HH" for [178 light emission]. The bit (blO) is a spare bit and is normally at the "L" level.

If you want to finely control the amount of light emitted, for example, if you want to set it to 1/16 light or 1/32 light, the two bins l-(b8) and (b9) In addition to this, you can use this bit (blo).

The focus of (bll) and the focus of (b12) are electronic flash devices (FL) that automatically change the irradiation angle according to the focal length value (fv) of the photographic lens (LH). In the case of an electronic flash device (FL) (referred to as a zoom type), the photographing lens (LE) is
Data on the irradiation angle that satisfies the angle of view corresponding to the focal length value Uv) is shown. In other words, at an irradiation angle that satisfies the focal length [fV=2811] of the photographic lens (LE), “
Similarly, in [fv=35ml], “L”
T-1", "HL" for [fv=50sn], and "HH" for [fv=70+am], respectively.

On the other hand, (zoom type) electronic flash bag! If it is not (FL), the bit (bll) and the bit (b12) are two bits and indicate the maximum light emission amount corresponding to the maximum guide number. That is, the l5Oi degree of the film [100]
, the guide number is [16] (A P E
Using a method similar to the X method, if the light emission amount value (expressed as m, corresponds to IV = 3), it is set to "LL", and the guide number is set to [26] (using a method similar to the A P E X method). Luminescence amount value (expressed as m, rV=4.
5), cents are added to "LH", respectively.

The bit (b13) is a bit that indicates the light emission mode, TTL automatic light control mode or manual light emission mode.
It becomes "H" level in automatic light control mode. (b14)
bit is the electronic flash device (FL) as flash photography information.
) is a bit that indicates the display unit of whether to display the linked distance range for the light emission in meters (m) or feet (feet). Becomes 1″ level. The bit (b15) is the third identification bit indicating whether or not it is a (zoom type) electronic flash device (PL).
In the case of an electronic flash device (FL), the level is "11".

The eight bits (b8 to b15) up to this point are transferred to the electronic flash device by the second serial data transfer (#16).
PL) to the camera body (CA).

Now, after performing two serial data transfers as described above, the camera computer (2) receives the input 16
It is determined whether or not there is an FDC signal among the bit data, that is, whether or not the pin l-(b4) is at the "L" level (
#18). If there is an FDC signal, that is, if bit (b4) is at the "L" level, this is displayed on a display device to be described later (1119).

Subsequently, the camera computer (2) receives the set film sensitivity value (SV) from the film sensitivity setting circuit (8).
(120), and the brightness value (BVO) of the subject detected by the light receiving element (not shown) after passing through the photographic lens (LH) is read from the photometry circuit (7) (11
21). After that, a subroutine called "Interval Judgment" is called to determine whether it is interval shooting controlled by the interval device (IT) (1122).
.

Next, the subroutine called in step (1122) for determining the interval will be explained based on the flowchart of FIG.

In this subroutine, the camera computer (2)
It is determined whether the interval flag (INVF) is set (#100). This flag (INVF) is set once this subroutine is called and interval determination is performed. (#10
If it is determined in step 0) that this flag (TNVF) is set to "1", the process proceeds to step (+1104) without executing the determination flow after step (1101).

On the other hand, if it is determined that the interval flag (INVr') is "0" at step (+1100),
Subsequently, an interruption to this flow occurs when the photometric switch (Sl
) is an interrupt to the interrupt input terminal (CINTI) due to the closing of the flash display start signal (FDSS) transferred from the electronic flash device (PL) via the signal line (12). Interrupt to input terminal (CINT2) (hereinafter, this state will be abbreviated as <FD mode>)
It is determined whether the S1 flag (SIF) is set and whether the input terminal (IF5) is at "H" level (11101, 11102).
).

If the interruption is due to the closing of the photometric switch (Sl) or the flash display start signal (FDSS), the data indicating the interval mode is reset (11105) and then the process returns to the main routine. On the other hand, when the interrupt is other than those two, that is, when the interrupt is for interval shooting, the interval flag (INVF) is set to 1" (1103), and data indicating the interval mode is set (11104).
), return to the main routine.

Returning to Figure 2 and continuing the explanation, we can see that the interval judgment)
After returning from the subroutine, the camera computer (2) inputs whether or not charging of the main capacitor (C2) of the electronic flash device (PL) is completed through serial data transfer in step (#15). The determination is made based on the bit (b3) of the received data (123). If it is determined that charging is complete, the electronic flash bag R (FL
) to calculate the exposure for flash photography using the flash light calculation subroutine (1124). Further, if it is determined that charging is not completed, a routine for constant light calculation is called (1125) to perform exposure calculation for photographing using constant light.

Next, these two subroutines will be explained.

In any subroutine, the exposure calculation is done using APEX.
It is done by method.

First, the subroutine called in step (1125), ``Standard Light Calculation'', will be explained based on the flowchart of FIG.

When this subroutine is called, first, it is determined whether the photographing lens (LH) is attached or not based on the lens attachment state data manually input from the photographing lens (LH) in step (#6) (1200).

If it is determined that a photographic lens (LE) is attached, the 1 darkest lens (LE) obtained from the photometry circuit (7)
The brightness value (BVO) of the subject after passing through (#6)
The maximum aperture value (AVO) of the photographing lens (LE) input from the photographing lens (LE) in step (120) is added, and the film sensitivity value (AVO) input in step (120) is added.
SV) to obtain the exposure value (IEV) (112
10). Next, the obtained exposure value (EV) and the standard exposure value (EVO-22i AV=11. TV=11)
(1211), and calculate the control aperture value (AV) based on the following formula (11212).
.

AV = 11-dEV ・5/8 □■
Then, this control aperture value (AV) is compared with the open aperture value (^VO) and the minimum aperture value (AVmax) of the attached photographic lens (LE) ($1213°11214). The control aperture value (AV) is set to the open aperture value (AV
O), the control aperture value (AV) is replaced with the open aperture value (AVO) ($1215). Also, the control aperture value (AV) is the minimum aperture value (AVIIlax)
If it is larger than , the control aperture value (AV) is replaced with the minimum aperture value (AVmax) (11216).

Next, the exposure value (
The control exposure time value (TV) is obtained by subtracting the control aperture value (AV) from the control aperture value (EV) (#217). Then, this control exposure time value (TV) and the exposure time value (TVO) of the longest shutter speed that can be supported by the camera body (CA)
and the exposure time value of the shortest shutter speed (TVm
ax) (11218.11219). The control exposure time value (TV) is the exposure time value (TVmax) of the shortest shutter speed that the camera body (CA) can support.
), the control exposure time value (TV) is replaced with the exposure time value (TVmax) of the shortest shutter speed (11220). Also, control exposure time value (TV)
If is smaller than the exposure time value (Tv, ) of the longest shutter speed, replace the control exposure time value (TV) with the exposure time value (TV, ) of the longest shutter speed (
11221). Then, return to the main routine.

On the other hand, at step (11200), the photographing lens (LE) is
If it is determined that the camera is not attached, the brightness value (BVO) of the subject after passing through the photographic lens (LH) is
The film sensitivity value (SV) is added to obtain the exposure value ([V) (#230), and this exposure value (EV) is set as the control exposure time value (TV) (#231).

Next, in the same way as before, this control exposure time value (TV), the exposure time value (TV, ) of the longest shutter speed that the camera body (CA) can support, and the exposure time value (TVmax) of the shortest shutter speed that can be supported by the camera body (CA) are ) and compare (#
232. +1233). Then, control exposure time value (T
V) is the exposure time value of the shortest shutter speed (TV
max) or smaller than the exposure time value of the longest shutter speed (TV.),
Respectively, the control exposure time value (TV) is replaced with the exposure time value of the shortest shutter speed (TVma) 0 or the exposure time value of the longest shutter speed (TVo) (9234, H2S).

Then, after entering the warning data into the control aperture value (AV) (+1236), the process returns to the main routine.

Next, the flash light calculation subroutine called in step (1124) will be explained based on flowchart 1 in FIG.

When this subroutine is called, it is determined whether or not the photographing lens (LE) is attached (11250), in the same way as before. If it is determined that the photographing lens (LE) is attached, the exposure value (EV) is calculated in the same manner as the subroutine of the above-mentioned "Standard light calculation"(#2
60). Add 1 to this exposure value (EV) and set it as a new exposure value (EV)1261), and from this new exposure value (EV), it will be fixed at the time of Franche ↑ layer type [ 1 /60 The control aperture value (AV) is determined by subtracting [6], which is the control exposure time value (TV) corresponding to the shutter speed of [1262].

Next, it is determined whether this control aperture value (AV) is less than or equal to [3] (corresponding to [2,8] of the F number).
11263). If the control aperture value (AV) is smaller than [3], after starting the control aperture value (AV) to [3] (#26
4), proceed to step (11280). Further, when the control aperture value (AV) is 3 or more, proceed to step (+1265). In step (11265), the minimum allowable aperture value (^VP) is determined based on the input film sensitivity value (SV). Film sensitivity and (11
For example, when the ISO sensitivity is [100], the F number is [8], and when the ISO sensitivity is [400].
When it is 1, the F number becomes [16]. Then, compare this allowable minimum aperture value (MVP) with the control aperture value (AV) (11266), and if the control aperture value (AV) is larger than the allowable minimum aperture value (AVP), the control aperture value After replacing (AV) with the minimum allowable aperture value (AV, ) (+1267), the process proceeds to step (11280).

On the other hand, in step (H2S0) ↑ layered lens (LIE)
) is not installed, the control aperture value (after entering the warning data (#270), (11
Proceed to step 280).

(11280), the control exposure time value (TV
) is the shutter speed at which the shutter is fully opened, i.e.
Set to [6], which corresponds to [1/60 s].

Then, return to the main routine.

Returning to Figure 2 and continuing the explanation, after calling the subroutine for steady light calculation or flash light calculation as described above and completing the calculation of the control exposure time value (TV) and control aperture value (AV). (H4+#25), the camera computer (2) determines whether an electronic flash device (PL) is attached based on the bit (bO) of the data input in step (H1S) (#26). This bit (b
If O) is at “H” level and it is determined that an electronic flash device (l?L) is attached, then the same < (
The bit (bl) of the data input with the Ste knob of #15)
), it is determined whether this electronic flash device (PL) is of a type that can serially transfer data with the camera body (CA), that is, whether it is a (data transfer type) (#27). If this bit (bl) is at “L” level and it is determined that the attached electronic flash device (r'L) is of (data transfer type), serial data transfer after step (12B) is Go to flow.

On the other hand, in step (1126), the electronic flash device (PL)
Even if it is determined that the electronic flash device (PL) is not installed, and even if it is determined that the electronic flash device (PL) is installed, the electronic flash device (PL) is not installed in step (127).
) is not (data transfer type), the process advances to step (1137).

In the step (1128), the camera computer (2
), both the output terminals (1'M2) and (FM3) are "
H" level to enter the mode (CF mode) for transferring serial data from the camera body (CA) to the electronic flash device εFL. Next, connect the output terminal (FMI) to [T2].
During this period, the signal is set to "H" level (129). As a result, the camera mode signal (CMS) at the "H" level is output to the electronic flash device (PL) during [T2] via the already explained signal line (e3), and the camera enters <CF mode). This is notified to the electronic flash device (PL).

Next, set the control aperture value (AV) in the serial data transfer register (#30), and perform the data transfer using the same method as the serial data transfer in step (#6) ($
31). Next, similarly, the exposure mode, film sensitivity value (SV), and focal length value (h
) and the data indicating the interval mode, respectively, and set them in the serial data transfer register.
Perform serial data transfer (#32 to 1135).

Then, when the above-mentioned serial data transfer is completed, the camera computer (2) connects the output terminal (FM2),
(FM3) to the "L" level 136) to notify the electronic flash device (PL) of the end of <CF mode).

Thereafter, the process proceeds to step (137).

On the other hand, as mentioned earlier, when an electronic flash device (PL) is not installed, and when an electronic flash device (l type) other than the (data transfer type) is installed, (
1137).

In step (#37), the camera computer (2)
is the data entered in step (1115))
By (b5), it is determined whether the electronic flash device (PL) is of the (camera display type). When this bit (b5) is at “H” level, this electronic flash device (PL)
) is determined to be (camera display type), that is, it does not have a liquid crystal display device and the camera body (
If the type uses the display device (4) on the CA) side to display flash photography information such as the guide number and the farthest linked distance, the electronic flash device ( Based on the data from PL), a subroutine (linkage limit calculation) is called (13B) to calculate the limit of the linkage distance that can be used for flash photography.

Next, the subroutine (linked limit calculation) will be explained based on the flowchart of FIG.

When this subroutine is called, first, it is determined whether or not the photographing lens (LI) is attached (+13
00). If it is determined that the photographic lens (LH) is attached, then the camera computer (2)
Bit (b) of the data input in step (+116)
15), it is determined whether the electronic flash device (PL) is of the (zoom type) (11310). This electronic flash device (
If it is determined that PL) is (zoom type), the four bits (b8) and (b9) of the data input at step (+116).

(bl), (bl2), electronic flash device (PL)
Read the luminescence amount and illumination angle data of (+1311,1
t312).

Next, using this information, the maximum luminous intensity value (IV
max) is set (1313). Table 2 shows the numerical values. Regarding the irradiation angle data, the shooting lens (L
The focal length value (fv) of IE) is used as a parameter.

Table 2 In other words, the maximum light emission value (IVmax) is [1
], and the guide number (GN)
It is set to increase by [0, 5] every time the value increases by r- times (light emission 5 times). In other words, each time the illumination angle data changes by one step, the maximum luminous intensity value (IVmax) becomes [0,5
], and each time the set light emission amount changes by one step, the maximum light emission amount value (IVmax) changes by [1]. For example, when the illumination angle data satisfies the focal length [fv=28 mm] and the set light emission (2) is full light emission, the maximum light emission ffi fU (IVmax) is [2, 5]. This is calculated as the ISO sensitivity of the film [1
00] is indicated by the guide number (GN) corresponding to [00].
13] becomes.

On the other hand, if it is determined in step (11310) that it is not the (zoom type), then the two bins (bll) input in step (ff16) are selected.

(b12), read the set light output and maximum light output of the electronic flash device (PL) (11314, 11315
), and by combining them, the maximum light emission amount value (IVmax) that is actually emitted is set (1316).

(Zoom type) or not, after setting the maximum light emission amount value (IVmax), proceed to step (11320). In step (ff320), the film sensitivity value (
SV) and subtract the control aperture value (AV) from it to obtain the maximum interlocking distance value (DVmax) using a method similar to the APEX method.

In addition, the maximum interlocking distance value at step (11320) (
To explain the calculation of DVmax), the film's I
Guide number (GN) when SO sensitivity is [100]
) and the luminescence amount value (IV) is shown in Table 3.

Then, using the luminescence amount value (IV) shown in this table,
The maximum interlocking distance value (DVmax) mentioned above is determined. For example, if the ISO sensitivity of the film is [100] (the corresponding film speed value (SV) is [5]), the guide number (GN
) is [11] and full flash (corresponding maximum light output value (IVmax) is [2), and F number is [2,81 (
Assuming that the corresponding aperture (i!!(AV)) is [3], the maximum interlocking distance value (DVmax) is [4] by calculation based on the formula: Dvmax=sV+IV-AV □■. The maximum interlocking distance value (DV
max), the interlocking distance limit information when the electronic flash device (PL) emits light can be obtained. Then, return to the main routine.

On the other hand, at step (ff300), the photographing lens (LI
E) is not installed, warning data (for example, data for bar display or data for flashing display) is added to the maximum interlocking distance value (DVmax) mentioned above.
After entering (11350), the process returns to the main routine.

To continue the explanation by returning to FIG. 2, after the calculation of the interlocking limit is completed by the above-mentioned interlocking limit calculation subroutine, and in step (1137), the attached electronic flash device (PL) is If it is determined that the display type is not a camera display type (camera display type), the process proceeds to step (#39). (113
In step 9), it is determined whether the interrupt to this flow is an interrupt to the interrupt input terminal (CINT2). If it is determined that the interrupt is to the interrupt input terminal (CINT2), the electronic flash device (
This flow is executed by outputting a flash display start signal (FDSS) from FL) in order to display flash photography information on the display device (4) of the camera body (CA). In this case, the subroutine 1> is subsequently called (1140).

Next, the subroutine of display 1> will be explained based on the flowchart of FIG.

When this subroutine is called, first, (116)
Based on the data input in step (1400), the amount of light emission (one of full light emission, 172 light emission, 174 light emission, and 1/8 light emission) is displayed (1400). Next, it is determined whether or not to display the interlocking distance limit information in meters based on the bit (b14) of the data input in step (116) (11401), and this bit (b14) is set to "H". ”
If it is determined that the level is displayed in meters, the characters [MT] are displayed (11402). on the other hand,
If it is determined that bit (b14) is at L” level and the display is in feet, the characters [FT] are displayed (11403), and then the furthest distance determined by the subroutine ``Interlocking limit calculation'' is displayed. The linked distance value (DVmax) is converted into a value for feet (+1404).

Next, the light emission mode is determined based on the bit (b13) of the data input in step (+116) (+14
05). If this bit (b13) is at the 1■'' level and the light emission mode is determined to be TTL automatic light control mode, the character [A] is displayed (+1406), then (114
Proceed to step 0B). On the other hand, if the bottle (b13) is at the "L" level and the flash mode is determined to be manual flash mode, the character [M] is displayed and then (
Proceed to steps 1407) and (ff408).

In step (11408), the maximum interlocking distance value (DV
max) and the register for displaying aperture information (AV
R). Then, the data in this register (AVR) is decoded by a decoder (DD) for displaying aperture information and displayed using segment l-(DE), which is an example of a display element for displaying aperture information (# 409), (1
Proceed to step 410).

In other words, the maximum interlocking distance value information, which is the flash shooting distance information when flashing with the electronic flash device (PL), is used by utilizing the fact that the data series is almost the same as the data series of the aperture information. , a decoder (DO) and a segment (DE) for displaying aperture information.

To explain the similarity of this data series, as is well known, the photographic lens (LE) as aperture information is
), the distance (LN) between the electronic flash device (FL) and the subject as linked distance information, and the guide number (which is the flash amount information of the electronic flash device (FL))
GN), the following equation 0 holds true.

GN=FNXLN □■ That is, if the amount of light emission is constant, the aperture information and the linked distance information will be inversely proportional. The F number (FN) as aperture information is [1,4], [2], [2,8]
...and so on, it changes by a factor of five. Therefore, the interlocking distance information calculated based on the 0 formula also changes by a factor of five.

As mentioned above, the linked distance during flash photography and the F number as aperture information are both geometric progressions with H as a multiple, so the camera body (CA) display In the device (4), when displaying the F number as aperture information and the linked distance during flash photography, the camera body (CA) can share the display decoder (DD) and the display segment (DB). This is to reduce the cost of the control device.

In step (11410), the illumination angle data is displayed using the focal length value (rv). Thereafter, it is determined whether charging of the electronic flash bag ff (PL) is completed (11411). If it is determined that charging is not completed, the process returns to the main routine. On the other hand, if it is determined that charging is complete, the character [FL] is displayed (ff412) and the process returns to the main routine. Return.

Returning to FIG. 2 and continuing the explanation, if it is determined in step (139) that the connection is not to the interrupt input terminal (CINT2), the process proceeds to step (1141), and the electronic flash device (PL) ) is completed. When it is determined that charging is complete, that is, when taking flash photography using an electronic flash device (PL) of a type other than (camera display type), or when taking a flash photograph using an electronic flash device (PL) of a (camera display type) ( Even when using FL), if the flash display start signal (FDSS) is not output, call the subroutine of Display 2> (
+142). In addition, if it is determined that charging is not completed, that is, if charging is not completed during flash photography using the electronic flash bag W (FL), or when performing constant light photography, <Display 3 > subroutine (114
3).

Next, these two subroutines will be explained.

First, when the subroutine of display 2 shown in Fig. 8 is called, [F
11420), then display the characters [F] and the control aperture value (AV), and the characters ['rv] and the control exposure time value (TV) (114211).
1422), return to the main routine.

Also, when the subroutine shown in display 3 in Figure 9 is called, the character [F] and the control aperture value (AV), as well as the character [T,] and the control exposure time value (TV) are displayed. (11430.ff431).

Next, the display of each photographic information by the display device (4) using a liquid crystal display element (DH), which is performed in each display subroutine, will be explained with reference to FIGS.

FIG. 10(a) shows a state in which all display contents are displayed.

FIG. 1O (U) shows the display according to the subroutine of Foil Display 1>, when the electronic flash device (FL) is of the (camera display type). The characters [FL] indicate flash photography mode, and the characters [A] indicate TTL automatic light control mode. Furthermore, the characters [GN1/2] indicate that the set light emission amount is 172, and the characters ["7.0] indicate that the furthest interlocking distance is [7, Orn].Furthermore, The characters [50mm] indicate that the illumination angle corresponds to the focal length [fv=50111] of the photographic lens (LE).When the flash mode is manual flash mode, the [A] The letter [M] is used instead of the letter, and [FT] is used instead of [MT] when the interlocking distance range is displayed in feet.
] are now displayed.

Further, FIG. 10(c) shows the display according to the subroutine of box display 2>, and the characters [FL] indicate the flash photography mode. Also, [TV60], [F4.
0] are the control exposure time value (TV) and
Indicates the control aperture value (AV).

FIG. 10(D) shows the display according to the subroutine of Foil Display 3>, which is the display for normal steady light photography.

The characters [TVIO00] and [F4. O] characters indicate the control exposure time value (TV) and the control aperture value (AV
) is shown.

Furthermore, the characters [FDC] in Fig. 10 (ne) indicate that when the automatic light control operation is performed, the characters in Fig. 10 (a) and (
It is now displayed in addition to the display in c).

Returning to Figure 2 and continuing the explanation, (1140), (
1142).

If the main routine is returned after any of the three display subroutines is called in step (#43), the process proceeds to step (144) in either case.

In step (1144), the camera computer (2
), check the input terminal (IF5) and open the release switch (S2) or open the interval device (IT).
) is input to the release signal (R5S). When the human power 17-(IF5) is at "H" level, the release switch (S2) is closed and the release signal (
If it is determined that there is no input of (R3S), (115
Proceed to step 9). On the other hand, the input terminal (IF5) is “
If it is determined that the release switch (S2) has been closed or the release signal (R5S) has been input at L'' level, a signal to stop the automatic focus adjustment operation is output (1
45).

Subsequently, after setting the output terminal (FM2) to the "II" level (1146), the output terminal (Fl'll) is set to the "H" level for [T3] (1147). As a result, the electronic flash "AM" is transmitted via the already explained signal line (13).
, A camera mode signal (CMS) of "H" level is output to (PL) during [T3], (EC mode), that is,
The electronic flash device (PL) is informed that the mode is for controlling actual exposure. Then the camera computer (
2) sets the output terminal (FM2) to the "L" level and ends notifying the electronic flash device (PL) of the camera mode (+148).

Next, reset the interval flag (INνF) (1t49), and as will be explained later, reset the electronic flash device (PL).
The output terminal (01
``4) to the ``I-I'' level (1$50).Next,
From the output terminal (OF2) to the automatic light control circuit (10), an analog voltage ($151 to output VS) according to the film sensitivity value (SV), the calculated control aperture value (AV), and the control exposure time value are sent. Perform exposure control based on (TV) (11
52).

Thereafter, the input terminal (IF5) is checked to determine the state of the exposure completion switch (S3) (#53). When the input terminal (IF5) becomes "L" level and it is determined that exposure is completed, the output terminal (OF2) is set to "L" level (#54). Subsequently, the output terminal (OPI) is set to "H" level during [T4] (1155). As a result, the exposure end signal (IIBS) at the "L" level is output to the interval device (IT) during [74] via the already explained signal line (12), and the interval device (IT)
is notified that the exposure is complete.

Next, in order to wind the film, a control signal for driving the film winding motor (Ml) is sent to the motor control circuit (
5) Output. Then, the input terminal (IF5) is checked to determine the state of the switch (S4), which is closed when winding of one frame of film is completed (157). When the input terminal (Ir'5) becomes "L" level and it is determined that film winding is completed, the film winding motor (
Is there a system to stop the drive of Ml)? a signal to the motor control circuit (
5) (+158). Thereafter, the process advances to step (+159).

On the other hand, in step (144), the release switch (S2
) is not closed, (159
).

In step (1159), the input terminal (IPI) is checked to determine the state of the photometry switch (Sl).

When the input terminal (IPI) is at “L” level, the photometry switch (S
l) is determined to be in the closed state, a timer (TC) is set to continue metering and displaying each shooting information.
After resetting (1162) and restarting (16
3), proceed to step (1164).

On the other hand, in step (159), the photometry switch (Sl)
If it is determined that is in the open state, then the focal length value (fvL) of the photographing lens (LE) when this flow was executed last time, which is stored in the register (PR),
The focal length value (fVP) of the current photographic lens (LH) is compared (#6Q). Bifocal length eyebrow value (rvt).

(fvP) are not equal, that is, if the focal length value (rv) has changed from the previous time due to zoom operation of the zoom lens, the current focal length value (rvp) is stored in the register (r'R ) (lt61). After that, I proceeded to step (#62), reset the timer (TC), and restarted it (&(lI63), (16
Proceed to step 4).

At the step of (+160), the current shooting lens (LE)
Focal length value (fVP) of previous focal length value < r VL
), the process proceeds to step (164) without doing anything. Note that when the power is turned on, the above-mentioned register (PR) contains the photographing lens (LH).
Data corresponding to the focal path 11ift [fv=28mm] is stored.

In step (164), the timer (TC)
In step 3), it is determined whether 10 seconds have elapsed since the start. If it is determined that 10 seconds have not elapsed, the process returns to step (#4) and the above-described flow is repeated. If it is determined that 10 seconds have passed,
The photometry operation is stopped (165) and the display is turned off (1166). Next, set the output terminal (OR2) to 'L''
level. As a result, the power supply transistor (Tr
1) enters the "OFF" state, and power supply to each part of the camera body (CA) is stopped. After that, interruption to this flow is permitted (168), and the camera computer (2) is stopped.

In other words, the battery (old 2) that is the power source for the camera body (CA)
In order to reduce the consumption of the metering switch, the metering switch (S
l) is not closed, the metering and display will stop after 10 seconds, and the camera computer (
2) and the interface circuit (3), etc., and also, as will be explained later, by stopping the camera computer (2), the electronic flash device (PL)
The output of the camera mode signal (CMS), which is the activation signal for the camera mode signal, is stopped, and the operation of the electronic flash device (PL) is also prohibited (this 10 seconds is referred to as the camera power holding time).

However, if the focal length of the photographing lens (LU) changes, for example, it is determined that a zoom operation has been performed on the zoom lens, and since there is a high possibility that a photographing operation will be performed soon, the power retention time of the camera will be changed. By resetting and restarting the measuring timer (TC), photometry, display, or changing the illumination angle of the electronic flash device (FL), which will be explained later, can be continued. Therefore, in this case, a quick photographing operation is possible. The above-mentioned judgment and operation are performed in the flow from step (1159) to step (+167).

Next, the automatic dimming circuit (10) and the interface circuit (
3) will be further explained using the circuit diagram of FIG. 11.

In the figure, (AN3) to (AN13) are AND circuits, (OR
O) ~ (OR3) are OR circuits, (IN3) ~ (IN8)
is an inverter circuit. Also, (O20) to (052
) is a one-shot pulse generation circuit, and the input signal “L”
By rising from the level to the "H" level, a short pulse signal of l(" level is output. (RS3) is R3-
The flip-flop circuit (CNTI) is a counter circuit.

First, the operation when serially transferring data between the camera body (CA) and the photographic lens (CE) will be explained.

As mentioned above, when performing serial data transfer with the photographic lens (LE), the camera computer (2)
An "H" level signal is output from the output terminal (Ll'll). This signal is the lens data transfer start signal (LD
TS) is input to the chip select terminal (CS) of the lens circuit (11) via the signal line (28).

The "H" level signal from the output terminal (LMI) is sent to two AND circuits (ANII).

(AN12) is also manually operated, and therefore, the gates of these AND circuits (ANII) and (AN12) are open during serial data transfer with the photographing lens (LIE).

Next, connect the output terminal (C3C) of the camera computer (2).
K) outputs one clock word. This clock signal passes through a gated AND circuit (ANII) and is transferred to the photographing lens (LE) as a lens data transfer clock signal (LCKS) via a signal line (16). This clock signal (LCKS) is input to the clock input terminal (LSCK) of the lens circuit (11), and in synchronization with the rising edge of the clock signal, data in the lens circuit (11) is transmitted via the signal line (I!7). camera body (CA
), and is transferred to the AND circuit (AN12) and the OR circuit (O
R2) and is input to the serial data input terminal (C3tN) of the camera computer (2). When the serial data transfer is finished, the camera computer (2)
An "L" level signal is output from the output terminal (LMI) of , and the gates of the two AND circuits (8Ni1) and (8N12) are closed.

Next, we will explain the 01 work in which data is transferred serially between the camera body (CA) and the electronic flash device (!?).

As mentioned above, when performing serial data transfer with an electronic flash device (FL), the camera computer (2
) output terminal (F?I2) outputs an "H" level signal. As a result, the AND circuit (AN3), (
The gates ΔN6), (8N8), and (8N9) are opened. Next, the period (['l" 1], [T2], [T3) corresponding to the camera mode from the output terminal (FMI),
“I)” level signal is output, AND circuit (AN3
), it is output from the OR circuit (01?1).

This output signal is inverted by the inverter circuit (IN3) and becomes the "L" level, and the transistor (TrlO
) to the “ON” state. As a result, a signal of "1 level" is transferred to the electronic flash device (PL) via the signal line (13) as a camera mode signal (C!IS).

On the other hand, when the output signal from the OR circuit (0171) is at the "L" level, this weight is inverted by the inverter circuit (IN4) and becomes the "H" level, and the transistor (
Trll) is turned on. As a result, “L”
The level signal is transferred to the electronic flash device (I'L) via the signal line (13).

Next, connect the output terminal (CSC) of the camera computer (2).
K) outputs a clock signal. This clock signal includes an AND circuit (AN6), an OR circuit (ORI), 2
one inverter circuit (IN3), (rN4) and two transistors (Trio), (Tri 1
), the flash data transfer clock signal (FC
MS) is transferred to the electronic flash device (PL) via the signal line (13). And this clock signal (
Data is exchanged in synchronization with the rising and falling edges of FCKS).

First, a mode in which data is transferred from the electronic flash device (PL) to the camera body (CA), that is, <FC mode> will be described.

In this mode, the output terminal (FM3) of the camera computer (2) is at the "L" level, so the output signal from the AND circuit (AN8) is at the "L" level, and this output signal cannot be input. Two AND circuits (AN
4) The gates of (AN5) are also closed. Therefore, the output signals of both AND circuits (AN4) and (AN5) are both at "L" level, and the transistor (Tr5)
is in the “ON” state, and the transistor (Try) is in the “O” state.
FF” state. Transistor (↑r5) is “ON”
By being in the state, the transistor (Tr6),
(Tr7) are both in the "OFF" state, and the interface circuit (3) is in the state of receiving input from the electronic flash device (PL). On the other hand, the "L" level signal from the output terminal (FM3) is inverted by the inverter circuit (IN8) and becomes H" level. As a result, the output signal from the AND circuit (AN9) becomes "I(" level). , and the gate of the AND circuit (ANIO) is opened.

In this state, when a data signal serially transferred from the electronic flash device ff (FL) via the signal line (12) is input, this signal is inverted by the transistor (Tr9) and then transferred to the inverter circuit ( INS), the signal is further inverted to return to the original signal, and is input to the AND circuit (ANIO). This signal is generated by an AND circuit with the gate open (
ANIO) and the OR circuit (OR2) to the serial data input terminal (CSI) of the camera computer (2).
N).

Next, a mode in which data is transferred from the camera body (CA) to the electronic flash device (PL), ie, (CF mode), will be described. ' In this mode, is a "[]" level signal output from the output terminal (FM3) of the camera computer (2)? , the output signal from the AND circuit (AN8) becomes H” level, and as a result, the two AND circuits (AN4)
, (AN5) gate is opened.

On the other hand, the "H" level signal from the output terminal (PM3) is inverted by the inverter circuit (IN8) and becomes "L".
become the level. As a result, the output signal of the AND circuit (AN9) becomes "L" level, and the AND circuit (ANIO)
gate will be closed. Therefore, the camera computer (
No data signal is input to the serial data input terminal (CSIN) of 2). The AND circuit (8N4) with the gate open has a camera computer (2
), the data signal from the serial data output terminal (CSOUT) of the AND circuit (
This data signal is connected to an inverter circuit (IN
The inverted signal at step S) is input.

When transferring serial data from the camera body (CA),
In this one-dog state, a data signal is output from the serial data output terminal (C3OUT) of the camera computer (2).

When the output signal from the serial data output terminal (C3OLIT) is at the "H" level, the output signal from the AND circuit (AN4) is at the "14" level, and the transistor (T
r5) becomes "OFF". This results in two l
'Both transistors (TrC+) and (Tr7) are "
On the other hand, the output signal from the AND circuit (AN5 goes to the "L" level, and the transistor (Tr8
) is in the "OFF" state, so an "H" level signal is transferred to the electronic flash device (PL) via the signal line (C2).

Furthermore, when the output signal from the serial data output terminal (C3OUT) is at the "L" level, the output signal from the AND circuit (AN4) is at the "L" level, and the L transistor (
Tr5) becomes "ON" state. As a result, the two transistors (Tr6) and (Tr7) are both OF
F" state. On the other hand, the output signal from the AND circuit (AN5) becomes "H" level, and the transistor (Tr8
) is in the "ON" state, so an "L" level signal is transferred to the electronic flash device (FL) via the signal line (C2).

Then, FD mode), i.e., electronic flash device)
The operation in the mode in which flash photography information from (FL) is displayed on the camera body (CA) will be explained.

If the camera is not performing exposure control or serial data transfer, use the camera computer (
The output signals from the output terminals (OF2) and (FM2) of 2) are at "L" level. And the AND circuit (AN
In case 13), the signal obtained by inverting this re-output signal is input, so the gate 1- is open. At this time, flash photography information is sent from the electronic flash device (FL) to the camera body (C
/l) When a flash display start signal (FDSS) consisting of two pulses is transferred via the signal line (j!2) to be displayed on the display device (4), the AND circuit (AN13) , this signal (1'DSS) is output as is to the counter circuit (CNTI). Counter circuit (
CNTI) receives these two pulses and outputs the output terminal (O
I) to the “)■” level. After that, electronic flash device
When the flash display end signal (FDES) is transferred from (PL) and two pulses are received,
The counter circuit (CNTI) connects the output terminal (C2) to “H”
By the output signal of "H" level from the output terminal (port 1) of this counter circuit (CNTI), the RS-
The flip-flop circuit (R33) is reset, and an "F-level" signal is input to the input terminal (Il'6) and the interrupt input terminal (CINT2) of the camera computer (2).Thereby, the electronic flash device A mode in which the flash 1 shadow information of (PL) is displayed on the display device (4) of the camera body (CA), that is, <FD mode> is started.In addition, the output terminal (O2) of the counter circuit (CNTI) "H" from
” level output signal resets the R3-flip-flop circuit (IIS3) through the one-shot pulse generation port i (OS2), and the camera computer (
2) input terminal (II”6) and interrupt input terminal (CINT
2), an "L" level signal is input to. This results in
<FD mode> ends.

Note that the output signal from the output terminal (O2) of the one-shot pulse generation circuit (O32) is output from the counter circuit (
CNTI) Glue is manually applied to the set terminal (R),
At the end of the above-mentioned <FD mode>, the counter circuit (C
NTI) is reset and the two output terminals (Ql),
(O2) thereby becomes "L" level.

Next, a description will be given of the light adjustment operation when performing exposure control during flash photography using an electronic flash device (PL), that is, in <EC mode>.

When the transfer of the camera mode signal (CMS) indicating (EC mode) is completed, the output signal from the output terminal (OF2) of the camera computer (2) becomes the "■]°" level.
Open the gate of the AND circuit (AN7).

At this time, the main capacitor (C) of the electronic flash device (FL)
2), a charge completion signal (CBS) of "H" level is transferred from the electronic flash device (r'L) via the signal line (C2). This signal is 1-
transistor (Tr9) and inverter circuit (IN+3)
) and is inverted twice and input to the AND circuit (AN7). Therefore, the output of the AND circuit (AN7) (No. 3 becomes "I" level), and the transistor (Tr4) becomes "I" level.
The light control capacitor (O
3) is discharged.

Note that even when the output signal from the output terminal (OR4) is at the "L" level, this signal is inverted by the inverter circuit (IN7) and becomes "H level", so the transistor (Tr4) is in the "ON" state. Therefore, the dimming capacitor (O3) is discharged.

As will be explained later, in the case of <EC mode>,
The contact (SX) is closed and a synchronization signal (XTS) for flash emission is sent to the electronic flash device (PL) via the signal line (β1).
) is transferred, an "L" level dimming start signal (ASS) is transferred from the electronic flash device (1'L) via the signal line (12).

This signal (ASS) is inverted twice by the transistor (Tr9) and the inverter circuit (IN8) and input to the AND circuit (AN7), and the output signal from the AND circuit (AN7) becomes "L" level. At this time, as mentioned above, the output signal from the output terminal (01"4) of the camera computer (2) is at the "I]" level to indicate that it is <EC mode>, and the inverter circuit ( l
The output signal from N7) is at "L" level. Therefore,
The output signal from the OR circuit (ORO) becomes "-L" level, and the transistor (Tr4) becomes "OFF". Thereby, the automatic light control circuit (10) starts the light control operation.

The light emitted from the electronic flash device (PL) and reflected from the subject enters the phototransistor (PTrl),
The photocurrent that is amplified and output is connected to the dimming capacitor (O3
) will be charged. A comparator (COM) inputs the output voltage (VC) from this dimming capacitor (O3).
) is input with an analog voltage (Vsv) output from the output terminal (OR3) of the camera computer (2) in correspondence with the film sensitivity value (SV).

Then, the output voltage (V
, ) reaches the reference analog voltage (VSV), the output signal of the comparator (COM) changes from L” level to “1”.
Change to 1″ level.

This output signal is generated by the one-shot pulse generation circuit (OSO).
) is pulsed by the camera body (
As in the case of serial data transfer from CA) to electronic flash device (FL), an OR circuit (ORI), two inverter circuits (IN3), (IN4), and two transistors (TrlO), (Trll ) and the dimming completion signal (AIES) is sent via the signal line (R3).
) is transferred to the electronic flash device (PL).

Next, the configuration and operation of the electronic flash device (FL) will be explained.

The schematic configuration of the electronic flash device (FL) is as described above using FIG. , will be explained using the circuit diagram in FIG.

In the figure, (AN14) to (AN24) are AND circuits, (O
R3) ~ (OR?) is an OR circuit, (NORI) ~ (NO
R2) is a NOR circuit, and (IN9) to (IN12) are inverter circuits.

Further, (O33) to (OS6) are one-shot pulse generation circuits, and (IISI) is an R3-flip-flop circuit.

First, the switch group (23) and the switch control circuit (24)
).

Each switch (S6) to (SIO) configuring the switch group
are all normally open bushing switches.

(S6) is a light emission mode changeover switch that switches between TTL automatic light control mode and manual flash mode, (S7) is a display unit changeover switch that changes between meter unit display and foot unit display, (S8) is a light emission amount change switch, (
S9) is an illumination angle change switch, and (S10) is a display switch for displaying flash photography information from the electronic flash device (PL) on the display device (4) of the camera body (C8).

In addition, even when the display switch (SIO) is not closed, if the shooting data changes by operating other switches (S6) to (S9), the camera body (CA)
The changed photographic data is displayed on the display device (4).

The signals from each of those switches (S6) to (SIO) are
The signal is input to the flash computer (12) via the switch control circuit (24). This switch control circuit (
24), the signals from the switches (S6) to (S9) are sent directly to the flash computer (12), respectively.
) input terminals (IPil) to (IP14). In addition, each switch (S6) to (SI
The signal from O) is input to an AND circuit (AN22). The output signal from the AND circuit (AN22) is input to the interrupt input terminal (FINT2) and input terminal (IP15) of the flash computer (12).

Then, when any of the switches (S6) to (SIO) is closed, "" is output from the AND circuit (AN22).
The L” level signal is the flash computer (12)
By being input to the interrupt input terminal (FINT2) of the flash computer (12), execution of the interrupt flow of the flash computer (12), which will be described later, is started.

Next, the operation of the control section (14) will be explained.

First, the operation when transferring data between the camera body (CA) and the electronic flash device (PL) will be explained.

The input to the signal line (11) is at the "It" level except when the X contact (SX) is closed and the synchronization signal (XTS) at the "L" level is being transferred.

Therefore, the transistor (Tr12) is in the "OFF" state and its output signal is at the "L" level, and the inverter circuit (
The output signal from IN9) is inverted and becomes the “I(” level. Therefore, the AND circuit (A
The gate of N14) is open. At this time, when the camera mode signal (CMS) is input from the camera body (CA) to the electronic flash bag fi (PL) via the signal line (E3), this signal (CMS) is transmitted to the transistor (Tr2
0), the inverter circuit (INIO) further inverts the signal to return to the original signal, and the AND circuit (AN1
4) and is input to the mode discrimination circuit (19).

A clock signal (φ2) output from the output terminal (FCLK) of the flash computer (12) is input to the mode discrimination circuit (19). Mode discrimination circuit (1
9) uses this clock signal (φ2) to measure the period of “1(” level) of the signal input from the AND circuit (AN14). If this period is [T1], < FC mode> and output terminal (I'C
), and this period is [T2
], it is determined that the mode is (CF mode) and a signal of "I-I" level is sent from the output terminal (C1?),
When this] Kawama is ["F3], it is determined that the mode is <EC mode>, and a signal of level "1" is output from the output terminal ([EC), respectively.

Among the above-mentioned modes, in <FC Morton and <CF mode>, when the serial data transfer is completed, the output terminal (SIO
IIE) outputs a pulse signal of "[l" level]. This pulse signal passes through an OR circuit (OR4) and is input to the reset terminal (RE) of the mode discrimination circuit (19). As a result, the mode discrimination circuit (19) is reset, and each output terminal (FC) and (CF) becomes "L" level.

In addition, in <EC mode>, the camera body (CA)
When the second curtain of the shutter has completed running, the X contact (
SX) becomes open. This allows the transistor (
Tr12) becomes "OFF", and the output signal from this transistor (Tr12) is pulsed by the one-shot pulse generation circuit (OS6), and is sent to the mode discrimination circuit via the OR circuit (OR4) as before. (19)
This input is input to the reset terminal (RIE) of the circuit (19), and the output terminal (EC) becomes “
It becomes L″ level.

Next, the operation in each mode will be explained.

First, (FC mode) will be explained.

As mentioned earlier, in this mode, a signal of "I-(" level) is output from the output terminal (FC) of the mode discrimination circuit (19). This signal is sent to the one-shot pulse generation circuit (O33). is pulsed and input to the interrupt input terminal (FINTI) of the flash computer (12).As a result, execution of the interrupt flow of the flash computer (12), which will be described later, is started. ing.

In addition, the “)■” level signal output from the output terminal (r'c) of the mode discrimination circuit (19) is an OR circuit (OR circuit).
3) and is input to the AND circuit (AN15), and the gate of the AND circuit (AN15) is opened. In this state,
When the flash data transfer clock signal (FCKS) transferred from the camera body (CA) via the signal line (j!3) is input to the AND circuit (AN15), this clock signal (PC) [S ) is the clock input terminal (P) of the flash computer (12).
SCK).

In addition, the "H" level signal output from the OR circuit (OR3) is inverted by the NOR circuit (NORI).
The output signal from the AND circuit (AN16) is "L" level and is input to the AND circuit (AN16).
” level, and the OR circuit (OR5) to which this output signal is input, outputs a signal from the serial data output terminal (FSOUT) of the flash computer (12) in synchronization with the rising edge of the Franchise data transfer clock signal (rlcKs). The output data signal is directly passed through two AND circuits (AN17).

(AN18). Two AND circuits (AN17
).

The other input signal of (AN18) is the mode discrimination circuit (1
This is a signal obtained by inverting the output signal from the output terminal (CF) of 9) by the inverter circuit (INII), and is at the "It" level when <FC mode F>. Therefore,
The gates of the two AND circuits (AN17) and (AN18) are both open.

During serial data transfer from the electronic flash device (PL), in this state, the data signal from the serial data output terminal (PSO[IT) of the flash computer (12) is outputted through the OR circuit (OR5).

If the output signal from the OR circuit (OR5) is “H” level, the output signal from the AND circuit (AN17) is “H” level.
Level The output signal from the AND circuit (AN18) becomes "L" level because the input signal from the OR circuit (OR5) is inverted.

Therefore, the transistor (Tr13) is in the "OFF" state, and the two transistors (Tr14) and (Tr1
5) are both in the "ON" state. Further, the transistor (Tr16) is in the "OFF" state. This allows “
II'' level signal is transferred to the camera body (CA) via the signal line (12).

On the other hand, if the output signal from the OR circuit (Or15) is "L" level, the output signal from the AND circuit (AN17) is "L" level, and the output signal from the AND circuit (ΔN18) is "H" level. become the level.

Therefore, the I-transistor (Tr13) becomes "ON" state, and the two transistors (Tr14) and (Tr1
5) are both in the "OFF" state. Further, the transistor (↑r16) is in the "ON" state. This allows “
The L'' level signal is transferred to the camera body (CA) via the signal line (12).

Next, <CF mode> will be explained.

As mentioned earlier, in this mode, an "H" level signal is output from the output terminal (CF) of the mode discrimination circuit (19). This signal is input to the AND circuit (AN15) through the OR circuit (OR3), and the gate of this AND circuit (AN15) is opened.

In other words, the flash data transfer clock signal (PCK
S) passes through this AND circuit (AN15) and is connected to the flash computer (1
2) is input to the clock input terminal (FS(J)).

In this mode, the output terminal (
The "I(" level signal output from the CP) is inverted by the inverter circuit (INII) and becomes the "L" level.Therefore, this signal is input to two AND circuits (8N17) and (AN18). both have their gates closed. Therefore, two 1-transistors (T
r15) and (Tr16) are both in the “OFF” state and are electronic flash bags? 1 (FL) is the camera body (CA
) is in a state where it accepts input.

In this state, from the camera body (CA) to the signal line (12
), this signal is inverted by the transistor (Tr17) and further inverted by the inverter circuit 1 (IN12) to return to the original signal, and the flash computer (12)
It is input to the serial data input terminal (FSIN) of .

Next, (FD mode) will be explained.

The flash photography information of the electronic flash device (PL) is transferred to the camera body (C).
A pulse signal serving as a flash display start signal (r'DSS) to be displayed on the display device (4) in A) is output from the output terminal (PLl) of the flash computer (12). This flash display start signal (FDSS) is used for the <FC, mode> and <FC modes for transferring serial data mentioned above.
The data is transferred to the camera body (CA) at times other than the CF mode and the EC mode that controls exposure. In <FC mode> and <CF mode> in which serial data is transferred, output of a flash display start signal (FDSS) is prohibited by the execution program of the Franche computer (12), which will be described later.

In <EC mode> for controlling exposure, "11" is output from the output terminal (EC) of the mode discrimination circuit (19).
” level signal is inverted and input to the other input terminal of the AND circuit (AN24). Therefore, the gate of this AND circuit (AN24) is closed, and the signal is input from the output terminal (FLY) of the flash computer (12). The output pulse signal is not transferred to the camera body (CA).

Next, charging of the main capacitor (C2) and flash light emission control will be explained.

When the charging voltage of the main capacitor (C2) reaches a voltage that allows light emission, the light emitting section (17) outputs an H'' level charging end signal (C3S).This charging end signal (C5
S) is the input terminal (
IP19). Flash computer (1
2) receives this signal and outputs “ from the output terminal (DCC).
Outputs a H” level signal. This causes the NOR circuit (
NOl? The output No. 43 from 2) becomes "L" level, turns the boost control transistor (Tr3) into the "OFF" state, and stops boosting. The NOR circuit (NOI?2) also receives a charge end signal (C3) output from the light emitting section (17)
S) is input directly. Therefore, this signal also controls the operation of the boost control transistor (Tr3), and boost control is performed. That is, regardless of the charging state, when controlling the voltage boost from the flash computer (12), the output signal from the output terminal (DCC) is used.

Furthermore, a charge end signal (
CSS) is also input to the AND circuit (/IN25). In the EC mode for controlling exposure, the output signal from the output terminal (EC) of the mode discrimination circuit (19) is “H”.
” level, the gate of the AND circuit (AN23) is open, and therefore the main (main condenser)
When charging of (C2) is completed, the output signal from the AND circuit (A'J23) becomes "+4" level.

At this time, the output terminal (C
Output from F) (i is at "L" level, and this signal is inverted and manually input to two AND circuits (8N17)
, (8N18) both have their gates open. Therefore, as in the case of <EC mode), the "11" level output signal from the AND circuit (AN23) passes through the OR circuit (f) R5) and is sent to the camera via the signal line (22). It will be transferred to the main body (CA) as a charge completion signal (CES) of "I(" level).

And, except when in <EC mode> which controls the exposure,
The output signal from the output terminal (EC) of the mode discrimination circuit (19) is at the "L" level, and the gate of the AND circuit (AN23) to which the respective signal is input is closed. In other words, the charge completion signal (CES) is not transferred to the camera body (CA) except in <EC mode>.

Next, the operation of emitting and stopping the flash will be explained.

If charging of the main capacitor (C2) is completed, the flash computer (12) receives the charging completion signal (C3S) from the light emitting unit (17) and outputs the output terminal (CIIG).
) to the “I” level. The output signal from this terminal (CIIG) is input to the AND circuit (AN20), and the gate of the AND circuit (AN20) is opened.

In this state, in the camera body (CA), when the 11th run of the shutter is completed and the A synchronization signal (XTS) is input. As a result, the transistor (Tr12) becomes "ON" and the output signal from each transistor (Tr12) becomes "11".
become the level. Also, when the test light emission switch (C5) is closed, the base of the transistor (Tr12) is grounded and the transistor (Tr12) is in the "ON" state, and its output signal becomes "H" level.

Therefore, in any of the above cases, the transistor (Tr1
2) and the AND circuit (AN20
) becomes the “H” level, and the OR circuit (O
A light emission start signal (FSS) of "[■" level] is outputted to the light emitting section (17) through R6). As a result, flash light is emitted.

Further, the output signal from the transistor (Tr12) is also input to the AND circuit (ΔN19). This AND001 (AN19) contains a flash computer (1
The output signal from the output terminal (CAI) of 2) is inverted and input. The output signal from this output terminal (CfLI) is output from the “I(
In other words, the electronic flash device (P
L) is used alone without being attached to a camera body (CA) that is capable of data transfer (including when the camera body (CA) is not powered on), or when data transfer is not possible. When attached to the camera body (CA), the gate of the AND circuit (AN19) is open.

Therefore, in this case, even if the charging voltage of the main capacitor (C2) is not high enough to emit light, the AND circuit (AN1) can be closed by closing the test light emission switch (S5).
The output signal from 9) becomes "H" level.

As a result, the light emitting part (1) passes through the OR circuit (OR6).
7), a light emission start signal (FSS) of level "11" is output, and a flash light is emitted.

Furthermore, the output signal of "I(" level) from the transistor (Tr12) is input to the NOR circuit (NQRl).

The NOR circuit (NORI) outputs a signal at the "L" level, and the output i8 from the AND circuit (AN16) to which this signal is input also becomes the "L" level.

As already explained, in <EC mode>, the gates of the two AND circuits (AN17) and (ANIEI) are open, and the AND circuit (AN1
The “L” level signal output from the OR circuit (0
1?5) and through the signal line (12), “L”
The camera body (
CA).

When a flash is emitted, whether the light emission mode is TTL automatic light control mode or manual flash mode, the flash light emission is stopped when the light emission amount reaches a predetermined light emission amount. , the timer circuit (20) outputs an H" level signal, which passes through the OR circuit (OR?) and becomes "
The light emitting unit (1
7). The output signal from the l transistor (Tr12) is input to the reset terminal (RE) of this timer circuit (20). In other words, the timer circuit (20
), the output word from the transistor (Td2) is “■
The timer circuit (20) is designed to start timing when the flash light starts emitting when the level reaches 1".
The time amplifier time is the flash computer (12
) is configured to change according to the set light emission amount data transferred from the output terminal (GNS), and when this timer circuit (20) performs time amplification,
A signal of "H" level is output.

In the manual light emission mode, the output signal from the output terminal (TTL/M) of the flash computer (12) is at "L" level, and the gate of the AND circuit (AN21) is closed. Therefore, in this mode, the flash is stopped by the light emission stop signal (FIES) which is output from the timer circuit (20) to the light emitting unit (17) through the OR circuit (OR7) when the light emission amount reaches the set light emission amount. The light emission is now stopped.

On the other hand, in TTL automatic dimming mode, the output terminal (TT
The output signal from L/M) is at “H” level, and
Since the X contact (SX) is closed, the transistor (T
The output signal from r12) is also at the "I-1" level, and the gate of the AND circuit (AN21) is open. In this state, the camera body (CA
) transfers the dimming completion signal (AES) at the "I(" level), the output signal from the AND circuit (AN21) becomes the "I-1" level, passes through the OR circuit (OR7), and becomes " The light emission stop signal (FES) at the 11" level is output to the light emitting section (17). Therefore, the 31 daylight completion signal (A
The flash light emission is stopped at the earlier timing of the timing when [ES] is transferred or the timing when the amount of light emission reaches the set amount of light emission.

When a flash is emitted, the “I-1” level signal output from the OR circuit (OI'+6) is the light emission start signal (
FSS) is output to the light emitting section (17) and pulsed by the one-shot pulse generation circuit (O34), and is output to the R3-flip-flop circuit (R3) for the light emission memory.
It is input to the seven-node terminal (S) of I). This allows R
3-Flip-flop circuit (+?S2) is seven-noded,
The output signal from the output terminal (0) becomes "T-1" level. This output signal is a flash computer (1
2), the flash computer (12) determines that the flash light has been emitted.

After that, this judgment will be made frequently, so the execution program of the flash computer (12) should be programmed so as not to judge that the flash operation has been performed immediately after making the judgment or when it is reattached to the camera body (CA). When stopping the flash computer ('12), connect the output terminal (
ApRE) outputs an "H" level signal for a certain period of time.

This signal is pulsed by a one-shot pulse generation circuit (OS5), and R3-flip-flop (1?s1
) is input to the glue set terminal (R). This allows R
3-Flip-flop circuit (R5I) is reset.

In addition, (21) in the figure is a motor (M3) that changes the irradiation angle.
), and (26) is a reference pulse generation circuit equipped with a crystal oscillator (26a).

Next, the configuration and operation of the display section (15) will be explained using the circuit diagram in FIG. 13.

The display section (15) has two displays LED (LDI).
, (LD2), and a display control circuit that controls display by them.

When charging of the main capacitor (C2) is completed, the second LED (LD2) lights up to indicate this fact. The completion of charging is indicated by the lighting of this LED (LD2) by the charge completion signal (C3S) output from the light emitting part (17) or the "H" signal output from the output terminal (CIf G) of the flash computer (I2). “Depending on the level signal, an OR circuit (OI
The output signal from 79) becomes "H" level, which turns the transistor (Tr19) into the "ON" state.

Moreover, when the light adjustment by the automatic light adjustment device (10) of the camera body (CA) is completed, the first LED (LDI
) lights up to indicate this. Next, the display indicating completion of dimming will be explained.

Before entering the <EC mode> that controls exposure, check the R3 flip-flop circuit (R52).・The output signal from the output terminal (0) is at the "■-" level. Therefore, the output signal from the AND circuit (AN25) is at the "L" level, and the timer circuit (22), to which this signal is inverted and input to the reset terminal (R[), remains reset. (When the EC mode becomes 1゛〉, the output signal from the output terminal (EC) of the mode discrimination circuit (19) becomes "11" level. This signal is inverted by the inverter circuit (IN14) and becomes "L" level. is input to the AND circuit (AN25), but the AND circuit (AN
The output signal from 25) is still at the "L" level, and the timer circuit (22) remains reset.

In this state, the automatic light control circuit (10) of the camera body (-)
When the dimming completion signal (A[ES) outputted from
When output from N21), this signal (AI?S) is
R3 - Cent terminal of flip-flop circuit (R32) (
S). As a result, the R5-flip-flop circuit (1?S2) is set, and its output terminal (0)
The output signal from
AN25) game l- is opened.

When the second curtain of the shutter of the camera body (CA) is completed and the <EC mode> ends, the output signal power from the output terminal (IEC) of the mode discrimination circuit (19) is
becomes L” level. This output signal is sent to the inverter circuit (
IN14) is inverted and becomes the “1■” level,
As a result, the output signal from the AND circuit (AN25) becomes the "'II" level.

Therefore, this signal is inverted and input to the timer circuit (
22) Noricent is released and the timer circuit (22)
An "H" level signal is output from the output terminal (to) for a certain period (3 seconds). This allows the transistor (Trl
B) becomes “ON” state, and the first L E D (LD
I) lights up. The “■!” level signal output from the AND circuit (AN25) is the flash computer (
12) is also input to the input terminal (FDT), and the flash computer (12) determines that the dimming operation has been completed.

The timer circuit (22) is connected to the flash computer (12).
) is counted, and after a certain period of time, an "H" level signal is output from the output terminal (t, ). This output signal passes through the OR circuit (OR8) and is input to the reset terminal (R) of the R3-flip-flop circuit (RS2).
This flip-flop circuit (RS2) is reset.

As a result, the output signal from the AND circuit (AN25) becomes "L" level, the timer circuit (22) is reset, and the first LED (LDI) is turned off. This completes the display of dimming completion.

Next, an electronic flash device (FL) configured as described above
The operation will be explained based on the flowcharts shown in FIGS. 14 to 17.

The flowchart in Figure 14 shows the main switch (SM)
This shows the operation when the is closed.

When the main switch (SM) is closed, the flash computer (12) disables interruptions to this flow +1500) and initializes the data <1501).
. Specifically, in this step (+1501), each flag to be described later is transferred to the reset terminal and the camera body (C^) side, and the light emission amount is set to full emission and the illumination angle satisfies [fv=28mm]. Set the light emission mode to T.
TL automatic light control mode, display unit to meter unit display,
Then, set the third type identification signal to (zoom type),
Set each.

In addition, if the electronic flash device (FL) is not (zoom type), the program is set to set a predetermined guide number (see Table 1) in the step corresponding to step (#501). ing.

Next, the output terminal (PWC) is set to "H" level, and the power supply transistor (Tr2) is turned "ON" (l1
502). As a result, the control section (14) and the display section (15
), power supply starts. Next, the output terminal (DCC)
is set to “L” level, and the boost control transistor (Tr
3) is turned on (#503).

As a result, the boosting operation of the boosting circuit (16) is started. Next, set the power holding time control counter (N) to [30
($1504). This counter (N) is
As will be explained later, in the flow of the count interrupt that is executed every 30 seconds, it is counted down by 1, and is normally set to [30], which determines the power retention time of the electronic flash device (PL). is approximately [15 minutes].

Then, the flash computer (12) stops after allowing all interrupts (7&(1505)). This flash computer (12) has two interrupt input terminals (FI
NTI) and (1'1NT2). One of them is an interrupt input terminal (FI) to which a signal indicating the start of serial data transfer from the camera body (CA) is input.
The other is when any switch (S6) to (SIO) in the switch group (23) is closed, the "L" level output signal from the AND circuit (AN22) is input. This is an interrupt input terminal (FINT2).

First, the operation when an interrupt occurs to the interrupt input terminal (FINTI) will be explained based on flowchart 1 in FIG.

As already explained, in the case of <FC mode>, a camera mode signal (CMS) of "I(" level) is transferred from the camera body (CA) via the signal line (13) during [T1]. Then, "11" is output from the output terminal (FC) of the mode discrimination circuit (19) to which this signal is input.
” level signal is sent to the one-shot pulse generation circuit (O
Execution of this flow is started by being pulsed by S3) and manually inputting it to the interrupt input terminal (FINTI) of the flash computer (12).

When the execution of this flow starts, the flash computer (12) first inputs an interrupt input terminal (1? (NTl)).
Allow interrupts to this flow from (11600)
. Next, 111 input to the interrupt input terminal (FINT2) and count interrupt are prohibited (11601, 1
1602).

Next, set the output terminal (PWC) to “H” level to start power supply to the control unit (14) and display unit (15).
3) The output terminal (DCC) is set to "L" level to start boosting operation (1604). After that, the state of each output terminal is set based on the initial cent or the changed data in step (11501) (#60
5). For example, the light emission mode is set to the output terminal (TTL/M), and the set light emission amount data is set to the output terminal (GNS), respectively. Next, output terminal 7-(CAI
) to the "II" level (11606). This is transferred to the camera body (CA) side. Charge completion signal (CES)
In addition, this is to uniformly control the operation of the electronic flash device (FL) from the camera body (CA).

In other words, this step (#60G) is executed as follows:
This occurs only when an interrupt occurs from the camera body (CA). In this case, by setting the output terminal (CAI) to "H" level, the output signal from this terminal (CAI) is inverted and input to the AND circuit (AN19).
gate will be closed. Therefore, when attached to such a camera body (CA), the electronic flash device (FL)
The flash of light is emitted when charging is completed and the output terminal (CIIG)
becomes 'H' level, AND circuit (AN20
) is permitted only when the gate is open.

Next, as the status data to be serially transferred,
Signal indicating charging state of bit (b3), bit (b4)
A signal indicating the dimming state of the pin, a signal indicating the mounting state of the pin (bo), and two type identification signals of bit (bl) and bit (b5) are sent to the serial data transfer register (SIOR). ) (11607). Then, from the camera computer (2) to the signal line (23
8 bits (bo) to (bl) of data, including this data, are serially sent to the camera body (CΔ) in synchronization with the flash data transfer clock signal (FCKS) that is transferred via the Transfer (llf308).

Similarly, seven bits (b8), (b9),
(bll).

(bl2), (bl3), (bl4), (
11609) and flash data' transfer register (SIOI?) for serial data transfer.

In synchronization with the rise of the signal (FCKS), 8 bits (b8) to (bl5) of data, including these, are serially transferred to the camera body (CA) (11609).

When the two serial data transfers are completed, the output terminal (S
IORE) is set to “H” level in a pulse manner (1161
1). As a result, the output signal from this terminal (SrOR[E)
E) and resets this circuit (one).

After that, the flash computer (12) checks the state of the input terminal (IP18) into which the output signal from the output terminal (CF) of the mode discrimination circuit (19) is input, and selects <CF mode> from the camera body (CA). Determine whether the camera mode signal (CMS) indicating the
11612). When the input terminal (IP18) rises from the "L" level to the "I(" level) and it is determined that the (CF mode) is entered, the flash computer (12) connects the signal line (13) from the camera computer (2). In synchronization with the Franchise data transfer clock signal (17csK) transferred via the signal input (12), data signals transferred serially are sequentially captured (11613 to 1I618).

During each serial data transfer, data is transferred 8 bits at a time, and each time 8 bits of data are taken in, the flash computer (12) stores this data in a predetermined register. These three serial data transfers (ff61
3. tt6i5. ff618) is data indicating the control aperture value (AV), exposure mode, film sensitivity value (SV), focal length value (fv) of the photographic lens (LI14), and interval mode. When the three serial data transfers are completed, the output terminal (SIQR
The mode determination circuit (19) is reset (11619) by setting the I signal to the "I(" level) in a pulsed manner (11619).Then, the (data setting) subroutine is called (1620).

Next, the data setting subroutine will be explained based on the flowchart shown in FIG.

This routine may be called at step (#620) and executed as a subroutine, or may be executed when an interrupt occurs to the interrupt input terminal (1?INT2) of the Franche computer (I2). . The interrupt to this interrupt input terminal (FINT2) is generated by the electronic flash device (P
L) is attached to a camera body (CA) that cannot transmit the signal to start operation, or an electronic flash device (PL) is used alone (when the camera body (CA) is not powered on). This occurs when one of the switches (S6) to (SIO) is closed when the switch is in use (including when it is not used).

When an interrupt occurs to the interrupt input terminal (FINT2), first set the output terminal (PWC) to the "1" level to start supplying power to the control section (14) and display section (15).
801), after setting the output terminal (DCC) to "L" level and starting the boost operation (11802), an interrupt flag (FINT2F) indicating that execution of this flow is due to an interrupt to the interrupt input terminal (FINT2) Set “1” to ($
Proceed to steps 1803) and 11810. on the other hand,
When called at step (11620), after setting the interrupt flag (FINT2F) to “0” (+180
0), proceed to step (11810).

(11810), an electronic flash device (r'L
), that is, the <FD mode), is determined based on the state of the input terminal (IP15). If this input terminal (IP15) is determined to be at the “L” level, any switch (S6) to
It is determined that (SIO) is in the closed state, that is, it is in (FD mode), and then the state of the display flag (DISI?) is determined (11820), this flag CDl5F)
is set once <FD mode> is entered. If it is determined that the display flag (DISri) is set, it is determined that the <FD mode> is already in place and the process returns to the main routine.

On the other hand, at step (11820) the display flag (DIS
I? ) is determined not to be cented, (
FD mode>, and then outputs two pulse signals (1) from the output terminal (PLI).
821). This pulse signal is transferred to the camera body (CA) as a flash display start signal (FDSS) via the signal line (12), and is sent to the camera body (CA) as a flash display start signal (FDSS).
Notifies the start of D mode.

Then, after setting the display flag (DISI?) (
u822), proceed to step (1823). continue,
The changed flash photography information is input to the input terminals (IPII) to (I
It is determined based on the state of P14) and each data is changed and set.

First, determine the state of the input terminal (IPII) (1B2
3). If this terminal (IPII) is at the "L" level, it indicates that the light emitting mode has been changed, and after this data is changed (11824), the process proceeds to step (11621) of the main routine. Input terminal (IPII
) is “H level”, then the input terminal (IP12
) is determined (11825). This terminal (IP1
2) is at “L” level, it indicates that the display unit change operation has been performed, and after changing this data (11
826), the process advances to step (11621) of the main routine.

Furthermore, if the input terminal (IP12) is at the "I-1" level, then the state of the input terminal (IP13) is determined (
11827). If this terminal (IP13) is at the "L" level, this indicates that the light emission amount has been changed, and after this data is changed (1828), the process proceeds to step (11G21) of the main routine. This data is changed every time this routine occurs.
From [172 flashes, [174 flashes], [1/8 flashes]
Thus, the process is performed one step at a time, and the original data is returned at the fourth time.

Furthermore, if the input terminal (lP13) is at the "II" level, then the state of the input terminal (H114) is determined (1
1829). If this terminal (IP14) is at the “L” level, it indicates that the illumination angle has been changed, and after changing this data (1830), proceed to step (11621) of the main routine. . This data is changed every time this routine is passed, from Erv = 28 Maromaro] to [fv = 35 Ryu], [
+'v=50+n], [rv=70m irises], and [auto] are performed one step at a time, and the original data is returned at the fifth time. In addition, in the case of [Auto], as will be explained later, based on the focal length value (f,) of the photographing lens (L[) that is serially transferred from the camera body (CA), It is automatically set to the irradiation angle value (fvA).

Furthermore, if the input terminal (IP14) is at "H" level, this means that the display switch (SIO) is closed, and the main routine (11621
).

On the other hand, at step (11810), input terminal (IP1
5) is determined to be at the "I-1" level, it is determined that none of the switches (S6) to (SIO) are closed, that is, it is not <FD mode>, and then, Determine the state of the display flag (DISF) (11850)
.

If it is determined that the display flag (DISF) is not set, the main routine (1621) is executed.
Proceed to step. On the other hand, if it is determined that the display flag (DISF) is sent, the output terminal (PL
I) outputs two pulse signals (11851).

This pulse signal is transferred to the camera body (CA) via the signal line (β2) as a flash display end signal (1?DL'S), and informs the camera body (CA) of the end of <FD mode>. After that, the display flag (DISF)
) and the interrupt flag (FINT2F) are reset (1852), and the program proceeds to step (11621) of the main routine.

Returning to FIG. 15 and continuing the explanation, in step (11621), the timer (TF) for measuring the power holding time of the electronic flash device (PL) is reset, and then this timer (TF) is reset.
TF) is started (1622). In other words, as will be explained later, while the timer (TI?) is measuring time, a loop from the next step (#623) will be executed, but the loop from the camera body (CA) will be executed. Interrupt to the interrupt input terminal (FINTI) or interrupt input terminal (FINT2) for displaying flash photography information
If an interruption occurs, it is determined that there is a high possibility that a photographic operation will be performed, and from that point on, the electronic flash device (P
In order to restart the measurement of the power supply holding time of L), the timer (TF) is reset and restarted at this step (1621, 11622).

Subsequently, it is determined whether the set illumination angle is [auto] as described earlier (1623). If it is determined that the set illumination angle is [auto], then it is determined whether or not a photographic lens (LIE) is attached (11625). Specifically, whether or not the photographing lens (LE) is attached is determined based on the control aperture value (AV) data manually input from the camera body (CA) in step (#614).

In other words, as already explained, when the photographic lens (LH) is not attached, specific warning data is set to the control aperture value (AV), and it is possible to check whether or not this warning data is present. By shooting lens (LE)
It determines whether or not it is attached.

If it is determined that the photographic lens (LE) is attached, the focal length value (fv) of the photographic lens (LE), which is serially transferred in step (1618), is
After setting the illumination angle value (fva) that satisfies the angle of view corresponding to the angle of view as the control illumination angle value (fvA) (1626), (1162)
Proceed to step 8). Additionally, if it is determined that the photographic lens (LE) is not attached, the control illumination angle value (
After setting fvA) to a value (fvo) that satisfies the angle of view corresponding to [fv=28mm], (+1627), (+162
Proceed to step 8).

Furthermore, in step (11623), if the set coverage angle is other than [Auto], the manually set coverage angle value (fvm) is set as the control coverage angle value (fvA), and then (+1
Proceed to steps 624) and (11628).

Next, the flash computer (12) has an input terminal (
r'DT) to determine whether the automatic light control operation is completed (11628). This terminal (
FDT) is at the "■1" level and it is determined that the automatic light adjustment operation is completed, the data pin (b4) to be transferred to the camera body (CA) is set (#629). Further, if it is determined that this terminal (FDT) is at L'' level and the automatic dimming operation is not completed, bit (b4) is reset (11630).

Subsequently, the flash computer (12) changes the irradiation angle to correspond to the focal length value (fv) of the photographic lens (LH). Specifically, the illumination angle can be changed by fixing the xenon tube (not shown) that is the light emitter.
By moving a diffuser plate (not shown) located in front of the xenon tube back and forth, the relative distance between the xenon tube and the diffuser plate is changed. The motor (M3) shown in Figure 1 or Figure 12 moves this diffuser plate back and forth.
), and the flash computer (12) controls the drive of this motor (M3) in order to change the irradiation angle.

That is, first, (11624, 11626, 11627)
The control beam angle value (fvA) set in step 1163 is compared with the beam angle value (fvN) corresponding to the current diffuser plate position detected by the beam angle detection circuit (13).
1.1632).

In step (1631), the control coverage angle value (fv8) is larger than the current coverage angle value (fvN) (fvA >
fvN), this indicates that the current position of the diffuser plate is on the wide-angle side of the position corresponding to the focal length value (fv) of the photographic lens (LH). In this case,
Output terminal (1'1o1) to rotate the illumination angle changing motor (M3) in the normal direction and move the diffuser plate to the telephoto side.

A control signal for normal rotation of the motor is output from (MO2) to the motor drive control circuit (21) (1634).

On the other hand, in step (11632), the control illumination angle value (f
vA) is smaller than the current coverage angle value (fvN) (fv
Conversely, if it is determined that A < fvN), this indicates that the diffuser plate is on the telephoto side. In this case, the output terminal (MOI) is used to reverse the illumination angle changing motor (M3) and move the diffuser plate to the wide-angle side.

A control signal for motor reversal is output from (MO2) to the motor drive control circuit (21) (1635).

When a control signal is output to drive and rotate the illumination angle changing motor (old) in either the forward or reverse direction, a motor drive flag ( After setting MOTF (u636),
Proceed to step (1640).

In step (11631) or (11632), it is determined that the magnitude relationship between the control illumination angle value (fvA) and the illumination angle value (fvN) corresponding to the current position of the diffuser plate is not one of the above-mentioned relationships. , it indicates that the diffuser plate is at a position that satisfies the control beam angle value (fv^). In this case, the state of the motor drive flag (MOTF) is subsequently determined (1725).

If it is determined that this flag (MOTF) is set to 1'', that is, if the motor (M3) is being driven, the motor (M3) should be stopped (the output terminal (MOL)
, output the control signal for motor stop from (MO2)1
63B), reset the motor drive flag (MOTF) to 1-
After doing so (1639), the process proceeds to step (1640). On the other hand, if the motor drive flag (MOTI') is determined to be "0", that is, if the motor (M3) is stopped, the output terminal (MoTI') is
l) After outputting the motor holding control signal from (MO2) (11637), proceed to step (11640).

In the step (1640), the input terminal (Il'19)
The state of the main capacitor (C2) is checked to determine whether charging of the main capacitor (C2) is completed. Input terminal (IP19)
“H If it is determined that charging is complete, the data bit (b) to be transferred to the camera body (CA) is
After cents 3) (11641), proceed to step (+1643). On the other hand, if the input terminal (IP19) is at L'' level and it is determined that charging is not completed, bit (b3) is reset (+1642) and (11
Proceed to step 643).

At step (1643), it is determined whether or not this photographing operation is ink-hull photographing based on control from the interval device (IT) based on the data manually input at step (+1618). If it is determined that this shooting operation is not interval shooting, (+1644)
Proceed to step 2 and set the power retention time measurement
') was started at step (lI622), it is determined whether three minutes have elapsed. If it is determined that 3 minutes have not elapsed, the process returns to step (11623) and repeats the loop of (11623 to 11644).

On the other hand, if it is determined in step (1164/l) that 3 minutes have elapsed, the process proceeds to step (0646).

Furthermore, if it is determined that interval shooting is being performed in step (H643), the process proceeds to step (+1645), and the timer (TP) for measuring the power holding time is set to (+162).
In step 2), it is determined whether one minute has passed since the start. If it is determined that one minute has not elapsed, the process returns to step (11623) and repeats the loop from (11623 to 11645) in the same way as before.

On the other hand, if it is determined at step (+1645) that one minute has passed, the process proceeds to step (H646).

At the step (+1646), the interrupt flag (171N
T2F) is checked and this flow is connected to the interrupt input terminal (F
It is determined whether this is due to an interrupt to INT2). When the interrupt flag (FINT2F) is “1”, the interrupt input terminal (r
'1NT2), that is, this electronic flash device (PI) is attached to a camera body (CA) that cannot transfer the activation signal to start its operation, or this When using the electronic flash bag M (FL) alone (including when the camera body (CA) is not powered on), any switch (S6) to (S1
0) is operated, this flag (FINT2F
) (11647), set the power hold time control counter (N) to [24] (11648)
. Next, after enabling count interrupts (H649),
Proceed to step (H653).

On the other hand, at step (l1646), the interrupt flag (FI
NT2F) is “0” and it is determined that there is no interrupt to the interrupt input terminal (FINT2), the output terminal (DCC
) to “H” level and boost control transistor (TF
3) is turned "OFF" (11650).

As a result, the boosting operation by the boosting circuit (16) is stopped. Subsequently, the output terminal (1'Wc) is set to the "OFF" level to turn the power supply I transistor (TF2) into the "OFF" state (11651). As a result, power supply to the control unit (14) and display unit (15) is stopped, and the electronic flash device (F
The operation of each part of L) is stopped. And, as already explained,
R3-Free Knob Flop Circuit (R5I) for Luminous Memory
) to reset the output terminal (APRE) for a certain period of time at the "I(" level) (11652), (1653)
Proceed to step.

In step (1653), all output terminals other than the above-mentioned three output terminals (DCC), (r'Wc), and (APRE) are set to "L" level. After that, after enabling the interrupt to the interrupt input terminal (F[NT2),
54), the flash computer (12) stops.

Next, the operation in the flow (11643-1654) mentioned above will be further explained.

During interval photography, the operation of the electronic flash device (PL) is stopped after one minute has elapsed since the timer (TF) for measuring power supply holding time started.

In other words, in one-interpal shooting, after the shooting operation is completed, the electronic flash device (PL) is not operated for about 15 minutes, which is the normal power hold time! What I do is use the battery (which is the power source) even though it is not involved in the actual shooting operation.
BA3) is consumed, which is not preferable. Therefore, in the case of interval photography, the power holding time should be shorter than usual.

Specifically, the power holding time in this case is as follows.

That is, in the case of interval photography, the interval device (I
When a photometry start signal (PSS) is output from T), an interrupt to the camera computer (2) occurs.

Then, the camera computer (2) repeatedly sends the electronic flash device (FL) as the program executes.
A camera mode signal (CMS) indicating FC mode is transferred. Every time this signal (CMS) is received, an interrupt is generated to the interrupt input terminal (FINTI) of the flash computer (12), and the flowchart shown in FIG. 15 is executed. In this state, (11621, ll622
) step, the power supply holding time measurement timer (T[') is always reset and restarted, so (ff6
The flow does not proceed to steps after step 46).

Photometry start signal (PSS) from interval device (IT)
) is input and 10 seconds have elapsed, the camera computer (2) stops. As a result, no interrupts to the flash computer (12) occur, and (1162
3 to 11645) is repeatedly executed, and the release signal (RSS) is output from the interval device (IT) when one minute has elapsed at the latest from the output of the photometry start signal (PSS). Therefore, an interruption occurs again to the camera computer (2), and accordingly, as mentioned above, the flash computer (12)
A hemo interrupt occurs. Therefore, the power holding time measurement timer (TF) is reset and restarted again, which is repeated.

A photographing operation will be performed in response to this release signal (RSS), but after the photographing operation is completed, the camera computer (2) will stop after 10 seconds have elapsed, as before. Then, Jll input to the flash computer (12) will not occur, so (11623~+16
The loop of 45) will be executed, and when one minute has passed, the flow will go through step (1646) and the flow after step ``(+1650)''.

As a result, the operation of the electronic flash device (r'L) is stopped. Therefore, the power retention time of the electronic flash device (PL) after completing the single-layer operation by interval shooting is approximately [1
minutes lO seconds].

On the other hand, it is not an interval shooting and moreover, an electronic flash bag W
(PL) when no interrupt is generated to the interrupt input terminal (FINT2), that is, when the electronic flash device (PL) is attached to the camera body (CA) that can transfer the activation signal to the flash device (PL). is the timer (TF) for measuring the power holding time.
) is configured to stop the operation of the electronic flash device (PL) after 3 minutes have elapsed since the start of the electronic flash device (PL).

In other words, in the combination of the electronic flash device (PL) and the camera body (CA) described in this embodiment, the camera body (CA
) transfers the camera mode signal (CMS) as a start signal to the electronic flash device (PL).
The electronic flash device (PL) is adapted to begin its operation. In the case of such a combination, the electronic flash device (PL) is turned on for approximately 15 minutes, which is the normal power holding time, after the shooting operation is completed, in a different sense from the case of interval shooting described earlier. Continuing the operation will consume the battery (B/13) as a power source.

That is, as long as the electronic flash device (1?L) continues to operate, the booster circuit (16) is repeatedly turned on and off in order to make the charging voltage of the main capacitor (C2) higher than the voltage required for light emission. Become. Then, each time the on/off operation is performed at t[, a large amount of TL flow occurs, and as a result, the battery (BA3) is consumed more quickly. on the other hand,
Even after the operation of the electronic flash device (PL) is stopped, the charging voltage of the main capacitor (C2) does not drop drastically, but rather maintains a voltage relatively close to the voltage required for light emission. Therefore, by starting the operation of the electronic flash device (PL) again, the charging voltage of the main capacitor (C2) is restored to the voltage required for light emission in an extremely short time. Moreover, in order to perform a shooting operation, it is necessary to determine the exposure amount and adjust the focus, and even if these were performed automatically, the main capacitor (C
It is also possible to complete the charging in 2).

Therefore, in such a case, ie, an electronic flash device! (PL
) is in a state where it can start operation in response to an activation signal transferred from the camera body (CA), the power holding time is shorter than usual.

The power holding time in this case is about 3 minutes and 10 seconds because the operation is almost the same as in the case of interval shooting.

In addition, if none of the above cases exist, that is, the electronic flash device (PL) is attached to a camera body (CA) that cannot transfer the activation signal to the electronic flash device (PL), or the electronic flash device (PL) is used alone ( (including when the camera body (CA) is not powered on), if any of the operation switches (C6) to (Sl, O) are operated, (
Based on the determination at step 11646), the flow after step 1647 is executed. And (116/1
Since the power holding time control counter (N) is set to [24] in step 8), the power holding time in this case is approximately [ 15 minutes 10 seconds].

Next, the operation in the case of count interrupt will be explained based on the flowchart of FIG. 16.

The entry of v1 into this flow is performed every 30 seconds when the count interrupt is permitted after the power holding time control counter (N) is set.

When this interruption occurs, first, it is determined whether a light emission operation has been performed (11700). As already mentioned, this determination is made at the input terminal of the Franche computer (12) to which the output signal from the R3-flip-flop circuit (1?s1) for the light emission memory that is set when light is emitted is input manually. This is done by checking the status of (APOI).

If it is determined that the input terminal (APOI) is at the "L" level and no light emission operation is being performed, the process proceeds to step (1703). On the other hand, the input terminal (APOI) is “I-1
” level, if it is determined that a light emitting operation has been performed, the power hold time control counter (N) is set to 30 (n701).As a result, each time a light emitting operation is performed, the power hold time control counter (N) is set to 30 (n701). The time is updated to 15 minutes from that point. Next, the output terminal (APR
After setting IE) to the “■]” level for a certain period of time (+1702
), proceed to (11703).

In step (11703), this power holding time control counter (N) is counted down by "1", and then it is determined whether this counter (N) has reached "0" (11704). If it is determined that the counter (N) is not “0”, the Fra Nosh computer (1
2) is stopped. On the other hand, if it is determined that the counter (N) is "0", the output terminal (DCC) is set to "L" level (11705).

As a result, as already mentioned, the W normal operation by the booster circuit (16) is stopped. Next, the output terminal (r'Wc)
is set to the "L" level (170G), thereby, as already mentioned, power supply to the control section (14) and display section (15) is stopped, and the operation of the electronic flash device (FL) is stopped. The flash computer (12) then stops.

In the embodiments described above, the camera body (CA)
The flash photography information from the electronic flash device (FL) is displayed on the display device (4) of each switch (C6) to (SIO).
The display is performed continuously for 841 seconds when the is closed, but instead of this, it is also possible to display the display only for a certain period of time.

Next, an example thereof will be explained based on the flowchart of FIG. This flowchart 1 is a modification of the ``Display 1>Paste'' blue routine that is called at step (11.10) in the main routine of the camera computer (2).

First, with reference to FIG. 7, I would like to explain the steps that perform the same operations as the subroutine shown in Display 1>, but the same step numbers will be given and the explanation will be omitted. In this subroutine, operations that are different from the subroutine (display 1) in the previous embodiment are performed in the flow after step (11413). That is, in step (11411), electronic flash bag fi (FL ) until the main capacitor (C2) of
] The same operations as in the <Display 1> subroutine in the previous embodiment are performed until the characters ``]'' are displayed (11412).

Subsequently, the camera computer (2) determines the state of the display determination flag (TIP) (11413). This flag (TIF) is set when the subroutine shown in display 1> is called for the first time. If this flag (TIF) is determined to be 0'',
It is assumed that this subroutine is called for the first time, and
After resetting the display control timer (TD) (key 4)
, start (ff415). Subsequently, the display determination flag (TIF) is set at f& (1416), and the process returns to the main routine.゛Meanwhile, in step (11413), the display judgment flag (
TIF) is determined to be “1”, (11
The process proceeds to step 417), and it is determined whether 2 seconds have elapsed since the display control timer (TD) was started in step 1415. If it is determined that 2 seconds have not elapsed, the process directly returns to the main routine. Also, if it is determined that 2 seconds have elapsed, the display determination flag (TIP) should be reset (11418),
R3-flip-flop circuit (R33) shown in Figure 11
outputs a pulse signal to reset (ff419).

This ends the display. Then, return to the main routine. That is, in this case, although not shown, the RS-
Reset terminal (R) of flip-flop circuit (RS3)
It is necessary to add a signal line leading to.

Next, still another example will be shown.

In the electronic flash device (1'L) in this embodiment, the switches constituting the switch group (23) are different from those in the previous embodiment. That is, the switches (Sll) to (S16) other than the display switch (SIO) are configured as status switches, and the flash photography information of the electronic flash device (FL) is displayed depending on the state of each switch (Sll) to (S16) itself. However, only the interlocking distance information during flash photography is sent to the camera body (CA
) is displayed on the display device (4).

The configuration of the switch group (23) of the electronic flash device (FL) in this embodiment will be explained using FIG. 19.

In the figure, (0,1) and (C1) are the same diodes and capacitors as shown in FIG. 1 in the previous embodiment.

(Sll) is a light emitting mode switching slide switch that indicates whether it is TTL automatic light mode or manual light mode, and when it is closed, it indicates TTL automatic light control mode.
Indicates manual flash mode when opened. (
S12) and (S13) are the light emission amounts (full, 1/2.
This is a switch whose combination of states changes depending on the setting of a light emission amount switching slide switch (not shown) indicating 1/4, 1/8). Also, (S14), (S15
), (S16) is a switch whose state combination changes according to the set illumination angle, and the illumination angle is set by [f
v=28 Dragon], [rv=35■ Phoenix], [fv
=50m Seal], [fv =70■Pho],
[Auto] is configured to change by l steps.

In addition, each of the above-mentioned switches (Sll) to (S1G) is
Flash computer (12) person, t [child (IPI)
I).

(IP13a), (IP13b), (IP14
a) , (IP14b) and (1['L4c), and the status signals thereof are input to the flash computer (12).

In addition, (SIO) has the same configuration as the normally open button-type display switch explained in the previous embodiment, and in this embodiment, this display switch (SIO)
By closing the camera body (CA) display device (4)
), the linked distance information is displayed.

This switch (SIO) is a plush computer (
12) input terminal (IP15) and interrupt input terminal (FIN
T2).

That is, during operation of the flash computer (12), the state of the input terminal (IP15) is determined, and depending on the state, a flash display start signal (
FDSS) or flash display end signal (FDBS)
is configured to transfer. In addition, when the electronic flash device (PL) is attached to a camera body (CA) that cannot output a start signal to the electronic flash device (PL),
When the switch (SIO) is used alone (including when the camera body (CA) is not powered on as before), the interrupt input terminal (FINT2) is closed by closing this switch (SIO). ), the plush computer (12) is adapted to execute a predetermined interrupt routine.

The configuration of the electronic flash device (FL) in this embodiment is exactly the same as the configuration of the electronic flash device (PL) described in the previous embodiment, except for the configuration of the above-mentioned sinch group (23). The execution program of the flash computer (12) is slightly changed due to the change in the configuration of the switch group (23). Next, only the changes will be briefly explained.

First, the flowchart of the operation when the main switch (SM) is closed, shown in FIG. 14!・Then, (tt501
) The type of data set in the step is different. In other words, data on the amount of light emitted and the light emitting mode are stored in each switch (Sll
) to (316) Do not set this because it will be displayed in its own state. Also, the display unit data will only be displayed in meters (m), so do not set it.

Then, the interrupt input terminal (FINTI) shown in FIG.
In the flowchart of the operation when an interrupt occurs, (
The operation performed in step 11605) is different.

That is, in the previous embodiment, the state of each output terminal was set based on the data initialized or changed in step (11501), but in this embodiment, the state of each input terminal (IPll).

(II'13a), (H'13b), (IP1
4a), (IP14b), and (IP14c) are checked to determine the status of each switch (Sll) to (S16). Then, each determined switch (Sll) ~
Depending on the state of (516), the output terminal (TTL/M)
.

(GNS) status.

Further, the subroutine of ``data setting'' shown in flowchart 1 in FIG. 17 in the previous embodiment becomes the flowchart shown in FIG. 20. In other words, steps (11823 to 11830) for changing data are not performed, and after setting the display flag (DISF) to 1'' in step (1822), the main routine (ff621) is immediately executed.
).

Flowchart 1- other than the above-mentioned changes is the same as that described in the previous embodiment. Note that in the previous embodiment, the configuration was such that whenever the data was changed, the flash display start signal (FDSS) for displaying flash photography information was always transferred to the camera body (CA). , in this embodiment, the flash display start signal (FDSS) is activated only by pressing the display switch (SIO).
is transferred to the camera body (C^) and flash photography information is displayed.

Next, changes to the camera body (CA) will be explained.

First, regarding the configuration, there are changes in the content displayed by the display device (4) and the configuration of the circuit associated therewith. The circuit configuration is related to the internal hardware of the camera computer (2), so illustrations and explanations will be omitted.
The display operation will be explained using a flowchart.

Figure 21 shows the result called at step (1140) of the execution program of camera computer (2).
This shows a flowchart of a modified subroutine.

When this subroutine is called, first (1138
) The maximum interlocking distance value (DVmax
) is loaded into the register (AVR) for displaying aperture information (1450), the data in this register (8νl?) is decoded by the decoder (DD) for displaying aperture information, and then the data for displaying aperture information is loaded. (11451). Next, [F] is displayed when displaying the F number as aperture information.
Did you display the character [m] instead of the character [m] to indicate that the display is in meter (m) units? &1t452), and returns to the main routine.

Although not shown, in the subroutine 2>, the operation of displaying the characters [FL] is not performed. Also,
The subroutine shown in Figure 3 is exactly the same as in the previous embodiment.

Next, each photographing information is displayed by the display device (4) using a liquid crystal as the display element (DE) in the same manner as before, which is performed in the subroutines for each of the above displays, as shown in FIGS.
Explain using. FIG. 22(a) shows a state in which all display contents are displayed.

FIG. 22 (II) shows the display according to the subroutine of Foil Display 1>. The characters [4,0m] indicate that the maximum distance that can be linked with flash photography is [4,0m]. In addition, Fig. 22 (c) shows (Display 2) and (
This shows the display according to the subroutine of Display 3>. [F
5.6] and ['r, 60] indicate the control aperture value (AV) and the control exposure time value (Tv).

Since the display is configured as described above, (11) in the flowchart shown in FIG.
The display indicating the completion of the self-vJ dimming completion operation in step 18) and step (619) is not performed.

Furthermore, in each of the embodiments described above, a segment type liquid crystal display (LCD) has been described as an example of a display element (DE) constituting a display device. The display method may be a dot method instead of the segment method. In addition, the material of the display element (DH) is the liquid crystal display (L
Electrochromic display (CD) instead of electrochromic display (CD)
The display device may be of a passive type such as ECD) or a dispersed particle display (SPD), or an active type such as an electroluminescent display (ELD).

〔Effect of the invention〕

As described above, the camera display control device according to the present invention displays flash photography distance information during flash photography using an electronic flash device using a decoder and a display element for displaying aperture information of the photographic lens. Since only one decoder and display element are required to display two types of information, the number of parts is reduced, the circuit configuration is simplified, and costs can be reduced. .

[Brief explanation of drawings]

The drawings show an embodiment of the camera display control device according to the present invention, FIG. 1 is a circuit diagram of the camera control system, and FIGS. 2 to 9 are flowcharts 1 and 9 showing the operation of the control circuit of the camera body. , FIG. 10 (a) to 10(e) are schematic diagrams showing the state of display of photographing information by the display device of the camera body,
Fig. 11 is a circuit diagram of the interface circuit and automatic light control circuit of the camera body, Fig. 12 is a circuit diagram of the control section and switch group of the electronic flash device, and Fig. 13 is a circuit diagram of the display section of the electronic flash device. , FIGS. 14 to 17 are a flowchart 1 showing the operation of the control circuit of an electronic flash device, FIG. 18 is a flowchart corresponding to FIG. 7 showing another embodiment, and FIG.
9 to 22 show still another embodiment, and FIG.
The figure is a circuit diagram of the switch/edge group of an electronic flash device, FIGS. 20 and 21 are flowcharts corresponding to FIGS. 17 and 7, respectively, and FIGS. FIG. 2 is a schematic diagram showing a display state on a display device of the camera body corresponding to (b) or (=). (LE)...Photographing lens, (FL)...
・Electronic flash device, (CA)...Camera body, (
DO)...decoder, (DE)...display element, (4)...display device.

Claims (1)

[Claims] In a camera display control device configured to display aperture information of a photographing lens and flash photography distance information during flash photography using an electronic flash device on a display device of the camera body, the flash photography distance information is displayed on the display device of the camera body. A display control device for a camera that uses a decoder and a display element to display information.