JPS62115135A - Flash photographing device - Google Patents

Abstract

PURPOSE:To start a flash photographing device with an easy operation by starting a camera by the setting operation due to a flash photographing informa tion setting means of an electronic flash device. CONSTITUTION:When one of switches in a switch group 23 as the flash photographing information setting means is operated in an electronic flash device FL, a flash display start signal FDSS is outputted from a setting opera tion detecting means 12 to a camera body CA. The signal FDSS is given to a starting means 2 in the body CA and the body CA is started. The means 2 control the operation of each part of the body CA and the operation of the whole of a system. In the device FL, the operation of a boosting circuit 16 is controlled by a boosting transistor Tr3 which is turned on and off by the signal outputted from the means 12 through a control part 14 to raise a supply voltage V02 to a voltage V32 required for light emission of a light emitting part 17. Since the setting operation due to the switch group 23 is performed, the device FL is started through the operation in the side of the body CA is not performed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a camera having a starting means for starting a photographing preparation operation by a photographing actuating means, and an electronic flash device having a flash photographing information setting means. The present invention relates to a flash photography device comprising a connection means for electrically connecting the camera and the electronic flash device.

[Conventional technology]

In the above-mentioned flash photography device, the activation signal to the activation means of the camera has conventionally been output only when a photography preparation operation start switch linked to, for example, a release button of the camera is closed. That is, the camera's photographic preparation operations, such as photometry operations and automatic focus adjustment operations, are configured to be performed only by operations on operating means provided on the camera side.

[Problem that the invention seeks to solve]

As a result, the following problems occurred. That is, during flash photography using an electronic flash device, if the shutter speed or aperture value is changed by setting the desired flash photography information by the flash photography information setting means of the electronic flash device, these pieces of information are It is desirable to be able to confirm this. At this time, this information is normally configured to be displayed using the camera's display device, so if the camera is stopped, it is necessary to start the camera by pressing the release button, etc. and was cumbersome to operate.

SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to enable a flash photography device to be activated with a simple operation.

[Means for solving problems]

The characteristic structure of the flash photography device according to the present invention is that the electronic flash device has a flash photography information setting means, and the photography operation means starts a photography preparation operation in response to a setting operation by the flash photography information setting means. A setting operation detecting means for outputting a starting signal to the starting means of the camera is provided.

[For production]

In other words, if you perform the setting operation using the flash photography information setting means provided in the electronic flash device, such as the light emission amount change switch or illumination angle change switch, you can set the settings using the flash photography information setting means provided on the electronic flash device, without having to operate any switches or levers on the camera side. You can activate the camera.

Furthermore, since there is a high probability that this information setting for flash photography will be performed when the photographer intends to take flash photography, if this information setting is used to, for example, start the boost operation of an electronic flash device, the camera In starting up,
Compared to the case where the electronic flash device is activated together with the camera by an operation from the camera side to start the boost operation of the electronic flash device, the voltage increase start time is earlier, and it is possible to quickly shift to flash photography.

〔Example〕

The present invention will be described in detail below based on the drawings.

FIG. 1 is a circuit diagram configuring the entire system.

This system consists of an interval device (IT) for taking pictures at regular intervals, a camera body (CA), a photographic lens (1, I), and an electronic flash device (PL). Equipment (IT), photographic lens (
LE) and the electronic flash device (Fl,) are connected to the camera body (C8) at the connection parts (J+c) and (Jtc), respectively.
).

(JFC).

The interval device (IT) is powered by a battery (BAI).
), a setting section (18), and an interval circuit (1) that transmits and receives signals to and from the camera body (C^) based on the settings of the setting section (18).

In the setting section (18), it is possible to set the photographing cycle, the number of photographed images, the photographing start time, etc.

The interval circuit (1) sets the output terminal (IT2) to the "L" level at a predetermined shooting cycle set by the setting section (18), and connects the camera body (C
A) sends an "L" level release signal (R5S).

When the shooting cycle is longer than 1 minute, the shooting operation is performed, that is, 1 minute before the release signal (R8S) is output, and when the shooting cycle is shorter than 1 minute, the shooting operation ends. Immediately after that, the output terminal (ITI) is pulsed.
Set to L# level. This allows the signal line (7!10
) is sent to the camera body (to C) in a pulsed manner.

When the exposure on the camera body (CA), that is, the shooting operation is completed, the exposure completion signal (EES), which maintains the "■1" level for a predetermined period, is sent from the camera body (CA) to the signal line (f
i12). This signal (EES) is input to the input terminal (IT3) of the interval circuit (1), and upon receiving it, the interval circuit (1) sets the output terminal (IT2) to the "H" level.

This completes the one-frame shooting operation by the interval device (IT), and from then on, similar operations are performed in the setting section (18).
) The camera body (
It is configured to perform a photographing operation by exchanging signals with CA).

Next, the configuration of the control circuit of the camera body (CA) will be explained.

The control circuit of the camera body (CA) is powered by a battery (B).
A2), microcomputer (hereinafter abbreviated as camera computer) (2), interface circuit (3),
Display device (4), motor control circuit (5), automatic focus adjustment device (6), photometry circuit (7), film sensitivity setting circuit (
8), exposure control circuit (9), and automatic light control circuit (10)
), etc.

A camera computer (2) controls each part of the camera body (CA) and the operation of the entire system. The interface circuit (3) connects the circuit of the camera body (CA) (mainly the camera computer (2)) and the photographic lens (
Adjusts the signals sent and received between the electronic flash bag ff (LE) and the electronic flash bag ff (PL). The display word W (4) displays film sensitivity information, exposure information, or shooting information such as the number of film frames that have been shot on a liquid crystal display under direct control from the camera computer (2). The motor control circuit (5) includes a motor (5) that winds and rewinds the film and charges the shutter.
Controls the drive of Ml). The automatic focus adjustment bag W (6) is
The distance to the subject or the focusing state of the photographic lens (+, Ii) is detected, and based on the detection result, the photographic lens (
■, E) controls the drive of the motor (M2) to automatically adjust the focus.The photometry circuit (7) detects the brightness of the subject.Film sensitivity setting circuit (8) teeth,
Film sensitivity information is sent to the camera computer (2) by automatically reading the film sensitivity code (DX code) attached to the film cartridge, or by reading the film sensitivity manually set using the film sensitivity setting dial. Output. The exposure control circuit (9) controls the aperture and shutter speed based on signals from the camera computer (2).

The automatic light control circuit (10) adjusts the amount of flash light emitted from the electronic flash device (PL) and reflected from the subject.
It is detected after passing through the photographic lens (LH), and the amount of light emitted by the electronic flash device (Fl,) is controlled according to the detected amount of light.

Among the components of the camera body (CA) mentioned above, the camera computer (2), display word W (4), interface circuit (3), two AND circuits (old), (8N2), and inverter circuit (INI) is a power supply battery (B
A2) is configured to be directly supplied with voltage [VO1]. The entire circuit other than these is configured to be supplied with voltage [V1] via a power supply transistor (Trl). This power supply transistor (Tri) is turned on and off by a signal output from an output terminal (OF2) of the camera computer (2) via an inverter circuit (INI).

In addition, the above-mentioned motor control circuit (5), automatic focus adjustment device (6), photometry circuit (7), and exposure control circuit (9)
is the output terminal (CCL) of the camera computer (2).
The clock signal (φ]) output from K) is input to these circuits (5), (6), (7).
, (9) performs each operation control described above based on this clock signal (φ1).

Next, the configuration of the control circuit of the electronic flash device (PL) will be explained.

The control circuit of an electronic flash device (PL) uses a battery (
BA3), microcomputer (hereinafter abbreviated as Franche computer) (12), hardware configuration control section (14), illumination angle detection circuit (13), display section (15)
, a booster circuit (16), a light emitting section (17), a switch group (23), and the like.

The flash computer (12) and the control unit (14) control the operation of the electronic flash device (PL). As will be explained later, this electronic flash device (PL) can change the illumination angle so as to satisfy the angle of view according to the focal length of the photographing lens (1, 1), and the illumination angle detection circuit (13 ) detects which focal length the irradiation angle of the electronic flash device (PL) satisfies the angle of view corresponding to which focal length, and outputs it to the flash computer (12) in 2 bits.The display unit ( 15) indicates that the automatic light adjustment circuit (10) of the camera body (CA) has completed the light adjustment, and the main capacitor (C2
), and that the mode is in which the illumination angle is changed as described above is indicated by lighting the LED. The booster circuit (16) is a flash computer (
Its operation is controlled by the boost control transistor (Tr3), which is turned on and off by a signal output from 12) via the control unit (14), and the power supply voltage [v02] is raised to the voltage [V32] necessary for flashing light. Boost the pressure. Light emitting part (17
) is the main capacitor (C
2) Check the charging status. Then, switch group (
23) has a plurality of switches for setting various data, and serves as information setting means for flash photography according to the present invention.

In the control circuit of the electronic flash device (PL) described above, a voltage [V 12 It is configured to be powered by

Further, the control section (14) and the display section (15) are configured to be supplied with power at a voltage [V22] via a power supply transistor (Tr2). This power supply transistor (
Tr2) is turned on and off by a signal output from the output terminal (PWC) of the flash computer (12) via the inverter circuit (IN2).

In addition, in the figure, (old) is a reverse charge prevention diode, (D2
) is a rectifier diode, (C1) is a relatively large capacitor that prevents the flash computer (12) from malfunctioning due to a drop in power supply voltage when the booster circuit (16) is operating, (M3) is the illumination angle. The motor (S5) is a switch for test light emission.

The configuration and operation of the electronic flash device (PL) will be described in more detail later.

Next, the photographic lens (LE) and electronic flash device t (FL
) and the camera body (CA), the signal lines (1) to (7!9) for transmitting and receiving signals will be explained.

First, the signal lines (15) to (19) for transmitting and receiving signals between the photographic lens (■, E) and the camera body (CA) will be explained.

The signal line (7!5) is for supplying power to the lens circuit (1) in the photographic lens (LE), and this voltage is applied to the power supply transistor (TRI) in the camera body (CA).
) is supplied from the collector side. The signal line (16) carries a lens data transfer clock signal (LCKS) used when serially transferring data.
This is for transferring data from the camera body (CA) to the photographing lens (LE'). The signal line (17) is for serial data transfer, and in response to the clock signal (+, cKs) transferred from the camera body (CA), the lens is Circuit (1
)) Data is transferred serially from the camera body (CA). The A word line (18) is
At the start of this serial data transfer, the camera body (CA)
This is for transferring the "H" level lens data transfer start signal (LDTS) output from the LDTS.

The signal line (19) is for grounding.

Next, a connection part (JFc) is connected between the electronic flash device (PL) and the camera body (CA), which is a camera according to the present invention.
The signal lines (1) to (β4) which constitute the connection means (Jl'l) and transmit and receive signals will be explained.

The signal line (1)) is the synchronous signal for flash emission (TS
) is for transferring. This signal line (β1
), when the first curtain of the shutter has completed running and the X contact (SX) is closed, the "L" level synchronization signal (XTS) is transmitted to the camera body (CA) via the CA) to the electronic flash device (PI).

The signal line (β12) is used as a bidirectional bus for data transfer when data is transferred serially between the camera body (CA) and the electronic flash device (PL), and during exposure control, the electronic flash It is used to transfer the dimming start signal (ASS) output from the flash device (PL). Further, this signal line (12) is connected to an electronic flash device (F
The flash photography information of L) is displayed on the display part N( of the camera body (CA)).
4) Flash display start signal (FDS) to display on
S), and flash display end signal (FIlt!S)
It is also used to transfer the data to the camera body (CA).

Furthermore, this signal line (12) is connected to the electronic flash device ff.
When the main capacitor (C2) of (FL) is fully charged,
It is used to transfer the 'H' level charge completion signal (CBS).This signal (CES) is also used for electronic flash devices (PL) that cannot transfer data between the camera body (C^). ) is attached to the camera body (CA).

The signal line (1) is for transmitting the camera mode 1 signal (CMS) indicating the mode of the camera body (CA), and the mode (CMS) for transmitting data from the electronic flash device (PL) to the camera body (CA). Hereinafter, when this mode is abbreviated as (EC mode), an "H" level signal is sent from the camera body (CA) to the electronic flash device (PL) during [TI] to indicate the beginning of 6n of this mode. be transferred. Similarly, from the camera body (CA) to the electronic flash bag ff (P
mode for transferring data to L) (hereinafter, this mode will be referred to as <
(abbreviated as CF mode), “H” is set during [T2].
``When the level signal is in a mode (hereinafter referred to as EC mode) that performs exposure control using the aperture and shutter speed during the release operation,
During [T3], the signals of "II" level are respectively transferred from the camera body (CA) to the electronic flash bag W (FL).

In addition, this signal line (13) is connected to the flash data transfer clock signal (FCKS) output from the camera computer (2) during data transfer (<EC mode> and <CF mode> mentioned above). used to transfer. Furthermore, during exposure control (<EC mode mentioned above), the automatic light control circuit (1) of the camera body (CA)
0) is output from the “I(” level dimming completion signal (A
It is now used to transfer ES).

Note that the signal line (14) is for grounding.

Next, the switch (Sl) provided on the camera body (CA)
) to (S4) will be explained.

(St) is a photometry switch for starting photometry. This switch (Sl) is closed by pressing the release button (not shown) beyond the first stroke. When this switch (Sl) is closed, the camera computer (2
), and the operation of the camera body (CA) is started.

(S2) is a release switch. This switch (S
2) is closed by a pressing operation that exceeds the second stroke of the release button, which is longer than the first stroke. Exposure control is started by closing this switch (S2).

(S3) is a switch indicating completion of exposure, which is opened when shutter charging is completed and closed when exposure is completed. Further, (S4) is a switch that indicates the completion of winding one frame of the film, and is opened when the release operation is performed, and the exposure is completed and the winding of one frame of film by the motor (Ml) is completed. It is now closed from time to time.

Note that (25) in the figure is a reference pulse generation circuit equipped with a crystal oscillator (25a).

Next, the operation of the control circuit of the camera body (CA) configured as described above will be explained based on the flowcharts of FIGS. 2 to 9.

The camera body (CA) described in this embodiment has only a program mode in which the camera column computer (2) automatically determines the aperture and shutter speed during exposure. Furthermore, it is assumed that the camera computer (2) has been powered on by installing the battery (BA2) before entering the flowchart of FIG. 2. At that time, it is assumed that the camera computer (2) is stopped after the reset terminals of each register are reset.

In this state, the photometric switch (Sl) is closed, the release signal (R5S) output from the interval device (TT), or the pulse "f2" that precedes it.
The metering start signal (PSS) that reaches the camera body (C
A), the output signal from the AND circuit (ANI) falls from the "H" level to the "L" level. This signal is transmitted to the interrupt input terminal (C) of the camera computer (2).
INTI) and the camera computer (2
) is configured to execute the flow shown in FIG. 2 when this terminal (CINTI) falls.

In the flowchart shown in FIG. 2, which will be explained below, a photographing preparation operation and a photographing operation are performed.

Preparation for shooting includes data transfer between the shooting lens (LE) and electronic flash device (Fl), photometry operation,
There are automatic focus adjustment operations, display of various photographic information, etc. Furthermore, photographing operations include shutter and aperture operation, film winding, and the like.

The camera computer (2) is activated by the closing of the photometry switch (Sl) and starts the above-mentioned photographic preparation operation, and as will be described later, the camera computer (2) continues to perform the photographing operation by closing the release inch (S2). It has become. That is, the camera computer (2) is an example of the activation means, and the photometry circuit (7), the automatic focus adjustment device (6), or the display circuit (4) are examples of the photographic activation means (E). ing.

In addition, a flash display start signal (Floss) output from the electronic flash device (Fl) to display flash photography information on the display device (4) of the camera body (C^) is input to the camera body (CA). As a result, an interrupt signal (IN) is output from the interface circuit (3). and,
Similarly, when this interrupt signal (IN) is input to the interrupt input terminal (CINT2) of the camera computer (2), the flow shown in FIG. 2 is executed.

The double flash display start signal (FDSS), which will be described later, is generated when any switch constituting the switch group (23), which is the information setting means for flash photography, is operated in the electronic flash device ff (FL). This allows the flash computer (12) to output the data.

That is, the flash display start signal (Floss) is the activation signal to the camera computer (2) which is the activation means, and the flash computer (12) is the setting operation detection means.

Any of the interrupt input terminals (CINTI or CI
When an interrupt to NT2) occurs and this flow starts, the camera computer (2) first prohibits interrupts to the two interrupt input terminals (CINTI) and (CINT2) (+1)). Then, the photometry switch (Sl
) is closed or not #1a) If it is determined that it is closed, set the S1 flag (SIF) #1b) If it is determined that it is open resets this flag (SIF).

Next, set the output terminal (OF2) to “H” level (#
2). The output signal from this output terminal (OF2) is inverted by the inverter circuit (INK) and becomes the "■" level, and the power supply transistor (Trl) becomes in the "ON" state. As a result, power supply to each part of the control circuit is started. Next, the camera computer (2) outputs a photometry start signal to the photometry circuit (7) to start photometry (#3).

Next, a counter (DC
) (#4), the output terminal (LMI
) to “H” level (#5). As a result, the photographing lens (LE) is connected via the already explained signal line (18).
) is H” level lens data transfer start signal (LDTS
) will be output. After outputting this signal (1, nTS), the camera computer (2) outputs a lens data transfer clock signal (1, cKs) consisting of 8 pulses via the signal line (I!6). .

The photographic lens (+, E) outputs 1-bit data to the camera body (CA) via the signal line (17) in synchronization with the rise of each pulse, and the camera computer (2) outputs this data. This data is captured in synchronization with the falling edge of each pulse. This is repeated for the number of pulses, that is, eight times, and one byte of data transfer is completed. The camera computer (2) takes this 1-byte data into a predetermined register, and one serial data transfer is completed (
#6). Repeat this serial data transfer a predetermined number of times (X)17. #8), output terminal (jull) to indicate the end of serial data transfer with the photographing lens (LH).
is set to "L" level (#9).

Through this serial data transfer a predetermined number of times (X), the data input from the photographing lens (+, E) is transferred to the photographing lens (L).
The aperture value at the minimum aperture (AVmax) of the photographing lens (L'), the photographing lens (LE
) focal length #I(1)! (fv), photographic lens (■, E
) is lens attachment status data indicating whether the lens is attached or not.

Next, the camera computer (2) has an input terminal (IPI
) (1) 10). This input terminal (IP
A photometric switch (Sl) is directly connected to I). If it is determined that this input terminal (IPI) is at the I,'' level, it is determined that an interrupt to the interrupt input terminal (CINTI) has occurred due to the photometry switch (Sl) being closed. , outputs a signal to start an automatic focus adjustment operation (1)+1).

Furthermore, if this input terminal (IPI) is determined to be at the "H" level, it is determined that the photometry switch (Sl) is in the open state and automatic focus adjustment operation is not necessary, and automatic focus adjustment operation is performed. Output a signal to stop (1) 2).

Next, in order to transfer serial data with the electronic flash device (+'1.), the output terminal (PM2) is set to the "II" level1)3), and then the output terminal (Fl) is set to the "II" level. [
T1], set to "IT" level (1) 4). As a result, the “H” level camera mode signal (CMS) is output to the electronic flash bag J (PL) during [TI] via the signal line (13) already explained, and the electronic Is the electronic flash bag the mode that transfers data from the flash device (PI,) to the camera body (CΔ)? I!
(PL) will be informed.

Then, use the photographing lens (
01)5. $1)6)
, the output terminal (FM2) is set to the "L" level to indicate the end of serial data transfer with the electronic flash device f (PL) (#17).

The contents of this data are shown in Table 1 on the next page.
Next, the data indicated by each bit will be explained. In addition, 2
A total of 16 bits of data will be transferred in each serial data transfer, but the data transferred in the first serial data transfer is shown in the lower bits, and that in the second transfer is shown in the upper bits. be.

The bit (bO) is a bit indicating the attachment state, and becomes "H" level when the electronic flash device (PL) is attached to the camera body (CA) and its main switch is closed (see Table 1).

The bit (bl) indicates whether it is an electronic flash device (PL) that can serially transfer data with the camera body (CA) (hereinafter, this type of electronic flash device (Fl) is referred to as (data transfer type)). This is the first identification bit indicating whether or not the data is received. In other words, even with the conventional electronic flash bag FW (PI), which cannot serially transfer data with the camera body (CA), an "H" level signal is sent via the signal line (β2) when charging is completed. Therefore, in order to distinguish it from this type of electronic flash device (Fl,), (data transfer type) electronic flash device (PL) outputs this bit (
bl) is at the “■,” level.

The bit (h2) is a spare bit and is usually “L”.
The bit (b3) is a bit that indicates the charging state, and becomes the "H" level when charging is completed. The bit (h4) is a bit that indicates the dimming state, and the bit that indicates the dimming is completed. Sometimes the level is “L” and the dimming completion signal (FDC
signal).

Bit (b5) is the second identification bit.

That is, the electronic flash bag W (Fl,) is not equipped with a display device such as a liquid crystal display for displaying flash photography information such as a guide number, and this flash photography information is not displayed on the display device (4) of the camera body (CA). ) so that the camera body (
A type that outputs flash photography information to CA) (hereinafter referred to as
When this type of electronic flash bag ff(pt) is called (camera display type), this pin) (b5) is “
It is at "H" level.

Bit (b6) and bit (b7) are both reserved bits, and are normally at the "I7" level.

The eight bits (bO) to (b7) up to this point are transferred from the electronic flash device (PL) to the camera body (CA) by the first serial data transfer (1) 15).

The focus (bO) and the bit (bO) are two bits that indicate the amount of light emission. That is, depending on the amount of light set manually with the light amount changeover switch provided on the electronic flash device (Fl), the light changes to "L" when the light is at full power, and to "L" when the light is at full power;
17272 light emission amount "LH", "1/4 light emission" is "H"
The bit (hlO) is a spare bit and is normally set to the "I," level. In order to finely control the quantity, for example, to set [1/16 light emission] or [1/32 light emission], the two bits (bO) and (bO
), you can use this pi1-(blo).

(bll) (7) Hit and (b12) bits are electronic flash bag W (Fl,) that automatically changes the irradiation angle according to the focal length value (rv) of the photographing lens (L [!)
(Hereinafter, this type of electronic flash bag W (pt,) will be referred to as (zoom type)), the angle of view corresponding to the focal length value (fV) of the photographing lens (+, In other words, at an illumination angle that satisfies the focal length [fv=28mm] of the photographic lens (1, 8), "LL" is shown, and similarly, [fv=
351)] is LH”, and [fv=5(in] is “H”
and “H” at [f v = 10tm ].
H", respectively.

On the other hand, if it is not a (zoom type) electronic flash device t(PC), the bit (hl) and the bit (b12) are 2 bits and indicate the maximum light emission amount corresponding to the maximum guide number. That is, the ISO sensitivity of the film [100]
, the guide number is [16] (A P E
Using a method similar to the X method, if the light emission amount value (expressed as m, corresponds to TV=3) is set to "L L", and
The guide number is [26] (the luminescence amount value (expressed as m, TV = 4) using the same method as the APEX method.
．． 5), they are set to "LH", respectively.

The bit (b13) is a bit that indicates the light emission mode, TTL automatic light control mode or manual light emission mode.
It becomes "H" level when in automatic light control mode. The bit (b14) is an electronic flash device (PL) as flash photography information.
The linked distance range for the light emission is displayed in meters (m) or in feet (feet). The bit (b15) is the third identification bit that indicates whether or not it is a (zoom type) electronic flash device (PL). is at ``H'' level.

The eight bits (b8 to b15) up to this point are transferred to the electronic flash device by the second serial data transfer (#16).
pt, ) to the camera body (C^).

Now, after performing two serial data transfers as described above, the camera computer (2) receives the input 16
Whether or not there is an FDC signal in the bit data, that is, beep! - Determine whether (b4) is at “L” level (
1)18). If there is an FDC signal, that is, if bit (b4) is at "L" level, this is displayed on a display device (4) to be described later (1) 9).

Subsequently, the camera computer (2) receives the set film sensitivity value (SV) from the film sensitivity setting circuit (8).
(1) 20), and from the photometry circuit (7), read the brightness value (BVo) of the subject detected by the light receiving element (not shown) after passing through the photographic lens (LE) (i1) (1) 21 ). Then, the interval device (IT)
Calls the <interval determination> subroutine that determines whether interval shooting is controlled by 0
22).

Next, the <interval judgment> subroutine called in step (122) will be explained based on the flowchart of FIG.

In this subroutine, the camera computer (2)
Determine whether the interval flag (INVF) is set (1)00). This flag (INVF) is
This is set when this subroutine is called once and interval determination is performed. (1) 10
If it is determined that this flag (INVF) is set to "1" in step 0), the flow of determination after step ($1)01) is not executed and step (+1)04) is executed. Proceed to step.

On the other hand, at step (1)00), the interval flag (
If it is determined that INVF) is "0", then it is determined whether the interrupt to this flow is an interrupt to the interrupt input terminal (CINTI) due to the opening of the photometric switch (Sl), or An interrupt is sent to the interrupt input terminal (CfNT2) by a flash display start signal (FDSS) transferred from the electronic flash device f (Fl,) via the signal line (12) (hereinafter, this state will be referred to as <FD mode>). abbreviated)
(1)101.1)02)
.

If the interruption is caused by the closing of the photometric switch (Sl) or by the flash display start signal (FDSS), after resetting the data indicating the interval mode (1)05), the process returns to the main routine.

On the other hand, when the interrupt is other than those two, that is, when the interrupt is for interval shooting, set the interval flag (INVF) to "1" (1) 103), set the data indicating the interval mode, and then (#104
), return to the main routine.

Returning to Figure 2 and continuing the explanation, <Interval judgment>
After returning from the subroutine, the camera computer (2) inputs whether or not charging of the main capacitor (C2) of the electronic flash device (PL) is completed through serial data transfer in step (#15). The determination is made based on the bit (b3) of the data (1) 23). If it is determined that charging is complete, the electronic flash bag N (P
In order to calculate the exposure for flash photography using (I,), the <flash light calculation> subroutine is called (#24). Further, if it is determined that charging is not completed, a <constant light calculation> subroutine is called (1) 25) to perform exposure calculation for photographing using continuous light.

Next, these two subroutines will be explained.

In any subroutine, the exposure calculation is done using APEX.
It is done by method.

First, the <stationary light calculation> subroutine called in step (1)25) will be explained based on the flowchart of FIG.

When this subroutine is called, first, it is determined whether or not the photographing lens (LH) is attached based on the lens attachment state data input from the photographing lens (LH) in step (#6) (#200). ).

If it is determined that the photographic lens (LE) is attached, the brightness value (BVo) of the subject after passing through the photographic lens (LE) obtained from the photometry circuit (7) is In step, add the manually inputted aperture value (AVo) from the taking lens (LE), and then add the film sensitivity value (SV) input in step (1)20). and find the exposure value (EV) (1)2
10). Next, the obtained exposure value (t!V) and the reference exposure value ([!V,=22; AV=1). TV=1)
), and calculate the control aperture value (AV) based on the following formula (1) 212
).

^V = 1) - dEV -5/8 □■ Then, this control aperture value (AV), the attached photographic lens (1,1' open aperture value (AVO) and the minimum aperture value ( Compare (#2i3゜1
214). The control aperture value (AV) is the open aperture value (AVO)
If it is smaller than , the control aperture value (AV) is changed to the open aperture value (
Replace with AV(1)(1)215). Furthermore, if the control aperture value (AV) is larger than the minimum aperture value (^vIIIaχ), the control aperture value (AV) is replaced with the minimum aperture value (AVmay) (12]6).

Next, the exposure value (
II! The control aperture value (AV) is subtracted from the control aperture value (AV) to obtain the control exposure time value (TV) (1) 217). and,
This control exposure time value (TV) and the exposure time value (T) of the longest shutter speed that can be supported by the camera body (CA)
VO) and the exposure time value of the shortest shutter speed (
TVmax) (121B, 1)219)
. The control exposure time value (TV) is the exposure time value (TV) of the shortest shutter speed that the camera body (CA) can support.
IIlax), the control exposure time value (TV
) to the exposure time value of the shortest shutter speed (TVma
y) (+1220). In addition, the control exposure time value (TV) is the exposure time value of the longest shutter speed (
If the control exposure time value (TV) is smaller than Tvo), the control exposure time value (TV) is replaced with the exposure time value (TV, ) of the longest shutter speed (1221). Then, return to the main routine.

On the other hand, if it is determined in step (1200) that the photographic lens (LE) is not attached, then the photographic lens (LE) is not attached.
L E ) is 1! Brightness value (BV,) of the subject after exposure
Add the film sensitivity value (SV) to the exposure value (EV)
(1) 230), and control exposure time value (TV) 4: this exposure value (EV) (1231).

Next, as before, this control exposure time value (TV), the exposure time value of the longest shutter speed (TVo) that the camera body (CA) can support, and the exposure time value of the shortest shutter speed (TVmax) Compare with (1
232.1)233). and control exposure time value (TV
) is the exposure time value of the shortest shutter speed (TVm
ay) or smaller than the exposure time value of the longest shutter speed (TVmay), the control exposure time value (TV) is set to the exposure time value of the shortest shutter speed (TVmay), respectively. Alternatively, replace the exposure time value (TVo) of the longest shutter speed (
1)234.1)235).

Then, the control aperture value (AV) contains warning data.
! (1) 236), return to the main routine.

Next, the <flash light calculation> subroutine called in step (1)24) will be explained based on the flowchart of FIG.

When this subroutine is called, it is determined whether the photographic lens (+, E) is attached (1) 250), as before. If it is determined that the photographing lens (LH) is attached, the exposure value (EV) is calculated in the same way as the subroutine of the ambient light calculation described above (1
)260). Kono exposure value (+!V) 6: [1] is added to the new exposure (if (EV) and 1) 261
), and from this new exposure value (EV), subtract [6], the control exposure time value (TV) corresponding to the shutter speed of [1/60 s], which is fixed during flash photography, to obtain the control aperture value ( (1262).

Next, it is determined whether this control aperture value (AV) is less than or equal to [3] (corresponding to [2,8] of the F number).
1)263). If the control aperture value (AV) is smaller than [3], after starting the control aperture value (AV) to [3] (#26
4), proceed to step (1) 280). Further, when the control aperture value (AV) is [3] or more, the process proceeds to step (1) 265). In step (#265), the minimum allowable aperture value (MVP) is determined based on the input film sensitivity value (SV). Film sensitivity and (1)2
The relationship between the F number and the minimum allowable aperture obtained in step 65) is, for example, when the ISO sensitivity is [1001], the F number is [8], and the RSO sensitivity is [400].
At this time, the F number becomes [16]. Then, compare the aperture value of the minimum allowable aperture (AVp) and the control aperture value (AV). For example, after replacing the control aperture value (AV) with the allowable minimum aperture value (AV, ) (+1267), the process proceeds to step (1)280).

On the other hand, if it is determined in step (1250) that the photographing lens (L) is not attached, the control aperture value (
After putting the warning data into AV), (1)270), (1)
Proceed to step 280).

In step (1) 280), the control exposure time value (TV
) is the shutter speed at which the shutter is fully opened, i.e.
Set to [6], which corresponds to [1/60s].

Then, return to the main routine.

Returning to Fig. 2 and continuing the explanation, the above-mentioned subroutine for steady light calculation or warning flash light calculation is called to control exposure time value (TV) and control aperture value (AV).
After completing the calculation (1) 24° 1) 25), the camera computer (2) operates the electronic flash device (PL) according to the bit (bO) of the data input in step (1) 5).
) is attached (1)26). When this bit (bO) is at “H” level, the electronic flash device (Fl
, ) is determined to be attached, then
The bit (bl) of the data input in step (1)15) determines whether this electronic flash bag @ (PL) is of the type that can serially transfer data between it and the camera body (CA). That is, it is determined whether the data transfer type is (data transfer type) ($127). This bit (bl) is “L”
``Level, if it is determined that the attached electronic flash device (PL) is (data transfer type), (1) 28
) Proceed to the serial data transfer flow after steps.

On the other hand, in step (1)26), the electronic flash device (PL)
Even if it is determined that the electronic flash bag W (Fl,) is not attached, and even if it is determined that the electronic flash bag W (Fl,) is attached, the electronic flash device F ( If it is determined that PL) is not (data transfer type), the process proceeds to step (1)37).

In step (1)2B), the camera computer (2B)
) has both output terminals (FM2) and (FM3) set to ``H''.
Rubel, from the camera body (C^) to the electronic flash device (
Enter the mode <CF mode> for transferring serial data to the PL. Next, connect the output terminal (old F) to “
H” level (1) 29). This causes the electronic flash device (PL) to be activated via the already explained signal line (13)
), the camera mode signal (C
MS) is output, and the electronic flash device (PL) is notified that the <CF mode> has been entered.

Next, set the control aperture (i(^V) in the serial data transfer register #30), and perform data transfer using the same method as the serial data transfer in step (416) (1) 31). Subsequently, in the same way, data indicating the exposure mode, film sensitivity value (SV), focal length value (rv) of the photographic lens (LE), and interval mode were combined and sent to the serial data transfer register. After that, perform serial data transfer (#32 to l35)
.

Then, when the above-mentioned serial data transfer is completed, the camera computer (2) connects the output terminal (FM2),
(FM3) both set to “I7” level $136),
Notify the electronic flash device (FD of the end of <CF mode>). Then, proceed to step (1) 37).

On the other hand, as mentioned earlier, when an electronic flash device (PL) is not installed, and when an electronic flash device (F) that is not a (data transfer type) is installed, (1
) Proceed to step 37).

In step (1)37), the camera computer (2
) determines whether the electronic flash device (PL) is of the (camera display type) based on the data input (h5) input in steps (1) and 15). When this bit (h5) is at "H" level, this electronic flash device (
PL) is determined to be (camera display type), that is, it is not equipped with a liquid crystal display device, and the guide number and interlocking information are displayed using the display device (4) on the camera body (CA) side. If it is a type that displays flash photography information such as distance range, based on the data from the electronic flash device (Fl,) entered in steps (+1) 5) and (1) 16),
The interlocking range calculation subroutine is called to calculate the interlocking distance range in which flash photography is possible (13B).

Next, the interlocking range calculation subroutine will be explained based on the flowchart of FIG.

When this subroutine is called, first, it is determined whether or not the photographic lens (LF) is attached (#3
00). If it is determined that the photographic lens (1, E) is attached, the camera computer (2) then adjusts the focus (b) of the data input in step (1)6).
15), it is determined whether the electronic flash device (1' L ) is of the (zoom type) (1) 310). If this bit (b15) is “■1” level and it is determined that this electronic flash device M (PL) is (zoom type), two bits (bQ), (bQ).

(bll), (b12), electronic flash device (PL)
) Read the luminescence amount and illumination angle data of (1) 31).
1)312).

Next, using this information, the maximum luminous intensity value (IV
max) and the minimum light emission value that can be controlled (IVmin)
(#313). Table 2 shows the numerical values.

Note that the irradiation angle data is based on the focal length value (fν) of the photographing lens (LH) as a parameter.

In Table 2, those re-emission amount values (IVmax) + (IV
min) increases by [1] every time the guide number (GN) increases by 5 times (light emission amount doubles), and
The guide number (GN) is set to increase by [0, 5] every time the guide number (GN) increases by 6 times (the amount of light emitted by 5 times). In other words, each time the illumination angle data changes by one step, the re-emission amount value (IV
max) + (IVmin) changes in steps of [0, 5], and each time the set flash output changes by one step, the maximum flash output value (IV min) changes by [0, 5].
max) changes by one. For example, when the illumination angle data satisfies the focal length [fy=28 mm] and the set light emission amount is full light emission, the maximum light emission amount value (IVmax) is [2, 5]. This is the guide number (G
N), it becomes [13].

On the other hand, if it is determined in step (+1310) that it is not the (zoom type), then the two bits (bll) manually entered in steps (1) and 16).

From (b12), read the set light output and maximum light output of the electronic flash device (PL) (ll'314.1) 31
5), by combining them, the maximum light emission value (I Vma) and the minimum light emission value (IVmin) that are actually emitted.
(#316). Table 3 shows the minimum light emission amount value (IV+win) of a type of electronic flash device (PL) other than the (zoom type).

Regardless of whether it is in Table 3 (zoom type) or not, after setting the re-emission amount value (IVmax) + (IVmin),
(1) Proceed to step 320). In step (1) 320), the film sensitivity value (SV) is added to the set maximum light emission value (IVmay), the control aperture value (AV) is subtracted from it, and a method similar to the APEX method is used. Find the maximum linked distance value (DVmax). continue,
Similarly, the minimum linked distance value (DVmin) is determined from the minimum light emission value (IVmin) (1) 321). Both interlocking distance value (DVmax) obtained in this way +
(1) From Vmin), the interlocking distance range information when the electronic flash device (F-i) flashes is obtained. Thereafter, the process returns to the main routine.

On the other hand, in step (1) 300), the photographing lens (Lt
If it is determined that the device is not attached, warning data (for example, data for bar display or data for blinking display) is entered in the above-mentioned interlocking distance values (DVmax) r (DVmin). After that ($1350), return to the main routine.

To continue the explanation by returning to FIG. 2, after the calculation of the interlocking range by the above-mentioned interlocking range calculation subroutine is completed, and at step (837), the attached electronic flash device (PL) is If it is determined that the camera is not the camera display type), the process proceeds to step (1)39). (#39
), it is determined whether the interrupt to this flow is an interrupt to the interrupt input terminal (CINT2). If it is determined that the interrupt is to the interrupt input terminal (CINT2), the electronic flash device (F
In this case, this flow is executed by outputting a flash display start signal (PDSS) from 1, ) in order to display flash photography information on the display device (4) of the camera body (CA). In this case, 〈
The subroutine shown in Display 1> is called (140).

Next, the subroutine of display 1> will be explained based on the flowchart of FIG.

When this subroutine is called, first, the amount of light emitted (full flash, 172 flashes, 174 flashes, 178 flashes) is determined based on the data input in step (formerly 6).
is displayed (#400). Next, it is determined whether or not the interlocking distance range information is to be displayed in meters based on the bit (b14) of the data input in step (#I6). If it is determined that the display is in meter units at “H” level,
Display the characters [MT] (#402). On the other hand, if the bit (b14) is at the "■," level and it is determined that the display is in feet, the characters [FT] should be displayed.
) 403), then the two interlocking distance values (DVmax) + (I
Convert IVmin) to the value for feet (1
404).

Next, the bits of the data input in step (old 6) (
b13) determines the light emission mode (+1405
). If this bit (b13) is at “H” level and it is determined that the light emission mode is TTI or automatic light control mode, the character [A] will be displayed (1406), and then two interlocking distance values (DVmax ) + (DVmin) (1407), and then proceeds to step (1) 410).

On the other hand, if bit (b13) is at "L" level and it is determined that the light emission mode is manual light emission mode, [
+1408), the furthest linked distance (i
After displaying only (DVmax) (1) 409), (+
Proceed to step 1410).

In step (1) 410), illumination angle data is displayed using a focal length value (fv). After that, it is determined whether or not charging of the electronic flash device (PL) is completed (+
141)). If it is determined that charging is not completed, the process returns directly to the main routine. On the other hand, if it is determined that charging is complete, the character [FL] is displayed (#412) and the main routine returns to the main routine. Return to.

Returning to Figure 2 and continuing the explanation, if it is determined in step (1) 39) that the interrupt is not to the interrupt input terminal (CIN?2), proceed to step (old It) and It is determined whether charging of the flash device (PL) is completed. When it is determined that charging is complete, that is, when taking flash photography using an electronic flash device (PL) of a type other than (camera display type), or when using an electronic flash bag N of (camera display type). Even if (PL) is used, if the flash display start signal (FDSS) is not output, call the subroutine in Display 2> (
1)42). In addition, if it is determined that charging is not completed, that is, if charging is not completed during flash photography using an electronic flash device (PL), or when performing constant light photography, the display 3 will be displayed. > call the subroutine (#
43).

Next, these two subroutines will be explained.

First, when the <Display 2> subroutine shown in Fig. 8 is called, [+
1. Display the character 1) 420), then [Fl
After displaying the characters [:'rv] and the control aperture value (AV), as well as the characters [:'rv] and the control exposure time value (TV) (1421
, #422), and returns to the main routine.

Furthermore, when the subroutine of Display 3 shown in FIG. 1)430.1)431).

Next, the 10th display of the liquid crystal is performed by each display subroutine.
This will be explained using figures (A) to (E). FIG. 10(a) shows a state in which all display contents are displayed.

FIG. 10 (II) shows the display according to the subroutine of Foil Display 1), in the case where the electronic flash device (Fl, ) is of the (camera display type). The characters [FL] indicate flash photography mode, and the characters [A] indicate TTI, automatic light control mode. Also, the characters [GN1/2] indicate that the set light emission amount is 172, and the characters [”0.7
-7.0] indicates that the interlocking distance range is [0.7m to 7.0m].
Om]. Furthermore, the characters "r50mn" indicate that the illumination angle is the focal length of the photographing lens (LE) [fV=5
0-■]. When the flash mode is manual flash mode, [A
] instead of [M], and when the interlocking distance range is displayed in feet, [MT
The characters [FT] are displayed instead of [FT].

Further, FIG. 10(c) shows the display according to the subroutine of box display 2>, and the characters [FL] indicate the flash photography mode. Also, [TV60], [F4.
0] are the control exposure time value (TV) and
Indicates the control aperture value (AV).

FIG. 10(D) shows the display according to the subroutine of Foil Display 3>, which is the display for normal steady light photography.

The characters [TV1000] and [F4. O] characters indicate the control exposure time value (TV) and the control aperture value (AV
) is shown.

Furthermore, the characters [FDC] in Fig. 10 (*) indicate that the character [FDC] in Fig. 10 (D) and (
It is now displayed in addition to the display in c).

Returning to Figure 2 and continuing the explanation, (140), ($
42).

If the main routine is returned after any of the three display subroutines is called in step (143), the process proceeds to step ($144) in either case. In step (1)44), the camera computer (
2) Checks the input terminal (IF5) and closes the release switch (S2) or closes the interval device W (
It is determined whether there is any input of the release signal (IISS) from R'r). Input terminal (IF5) is “H”
``If it is determined that neither the level release switch (S2) is closed nor the release signal (1?ss) is input, (
Proceed to step #59). On the other hand, input terminal (IF5)
If it is determined that the release switch (S2) has been closed or the release signal (R3S) has been inputted with "L" level, a signal for stopping the automatic focus adjustment operation is output (145).

Next, after setting the output terminal (FM2) to "H" level (
#46), the output terminal (FMI) is set to "H" level during [T3] (1) 47). As a result, the electronic flash device (PL) is connected to the [
Camera mode signal (CMS) at “H” level during T3]
is output, and the electronic flash device (PL) is notified that it is the (EC mode), that is, the mode for controlling actual exposure. Thereafter, the camera computer (2) sets the output terminal (FM2) to the "I," level and finishes notifying the electronic flash device f (FL) of the camera mode (1
)4B).

to 3 Then, reset the interval flag (INVF))L
(1) 49), as will be explained later, electronic flash device (PL)
The output terminal (OF
2) to "H" level (#50). Next, from the output terminal (OF2), an analog voltage (Vsv) corresponding to the film sensitivity value (SV) is outputted to the automatic light control circuit (10)1)51), the calculated control aperture value (AV), Perform exposure control based on control exposure time value (TV) ($152)
.

Thereafter, the input terminal (IF5) is checked to determine the state of the exposure completion switch (S3) (153). When the input terminal (IF5) reaches the "I7" level and it is determined that exposure is completed, the output terminal (OF2) is set to the "L" level (+154). Next, connect the output terminal (OPI) to [T4
1 (1) 55). This results in
The exposure end signal (Et!S) at "L" level is output to the interval device f(tr) during [T4] through the signal line (+1) 2) already explained, and the exposure end signal (Et!S) is output to the interval device (IT) during [T4]. You will be notified that the process has been completed.

Next, in order to wind the film, the motor control circuit (
5) Output. Then, the input terminal (IF5) is checked to determine the state of the switch (S4), which is closed when winding of one frame of film is completed (157). When the input terminal (IF5) becomes “L” level and it is determined that film winding is completed, the film raising motor (
A control signal to stop driving the motor control circuit (5
) (#58). After that, proceed to step (1)59).

On the other hand, in step (1) 44) the release inch (S)
2) is determined not to be closed, (#'
Proceed to step 59).

In step (1) 59), the input terminal (IPI) is checked to determine the state of the photometry switch (Sl).

When the input terminal (rPI) is at “L” level, the photometry switch (S
l) is determined to be in the closed state, a timer (TC) is set to continue metering and displaying each shooting information.
1) 62), and after restarting (16
3), proceed to step (164).

On the other hand, in step (159), the photometry switch (Sl)
If it is determined that the lens is in the open state, then the focal length value (rvt, Compare the focal length value (fVP) of the photographing lens (L) (#60). Both focal length values (fVt).

(fvP) are not equal, that is, if the focal length value (rv) changes from the previous time due to zoom operation of the zoom lens, the current focal length value (rvp) is stored in the register (PR). Store (1) 61). After that, proceed to step (#62), reset the timer (TC) and restart it (#63), (1) 64)
Proceed to step.

In step (160), if it is determined that the focal length value (rvp) of the current photographing lens (Lt) is unchanged from the previous focal length value (fvL), nothing is done and (
Proceed to step 164). Incidentally, when the power is turned on, data corresponding to the focal length Cfv=28 ml of the photographing lens (LH) is stored in the register (PR) mentioned above.

At step (164), the timer (TC) is set to (+1
In step 63), it is determined whether 10 seconds have elapsed since the start. If it is determined that 10 seconds have not elapsed, the process returns to step (#4) and the above-described flow is repeated. If it is determined that 10 seconds have elapsed, the photometry operation is stopped (165) and the display is turned off (166). Next, set the output terminal (OF2) to “L”
level. As a result, the power supply transistor (Trl) is turned OFF, and the camera body (C^
) is stopped. Thereafter, interruption to this flow is permitted (It68), and the camera computer (2) stops.

In other words, the battery (BA2) that is the power source for the camera body (-)
In order to reduce the consumption of the metering switch, the metering switch (S
If t) is not closed, metering and display will stop after 10 seconds, and the camera computer (2) will stop.
) and the interface circuit (3), etc., and as will be explained later, by stopping the camera computer (2), the electronic flash device f (PL)
The output of the camera mode signal (CMS), which is the activation signal for the camera mode signal, is stopped, and the operation of the electronic flash device (PL) is also prohibited (this 10 seconds is referred to as the camera power holding time).

However, if it is determined that the focal length of the photographic lens (LE) has changed based on the data obtained from the photographic lens (LE), for example, it is determined that a zoom operation of the zoom lens has been performed, Since there is a high possibility that a shooting operation will be performed soon, by resetting and restarting a timer (not shown) that measures the camera's power retention time, the photometer (7), display device (4), or , the electronic flash device (Pl) is configured so that the operation of the electronic flash device (Pl), that is, photometry and display, or the operation of changing the illumination angle, which will be explained later, can be performed continuously. Therefore, in this case, a quick photographing operation is possible. Note that the above-mentioned judgments and actions are performed by (
1) This is a flow from step 59) to step (167).

Next, the automatic dimming circuit (10) and the interface circuit (
The configuration and operation of 3) will be further explained using the circuit diagram of FIG. 1).

In the figure, (^N3) to (AN]3) are AND circuits, (01
)0) to (OR3) are OR circuits, (IN3) to (IN8
) is an inverter circuit. Also, (O20) ~ (O3
2) is a one-shot pulse generation circuit, and the input signal “■
, by rising from “level” to “H” level.”
Outputs a short pulse signal of “H” level. (R53)
is an R3 flip-flop circuit, and (CNTI) is a counter circuit.

First, the operation when serially transferring data between the camera body (CA) and the photographing lens (LE) will be explained.

When performing serial data transfer with the photographic lens (LP), as already mentioned, the camera computer (2)
An "H" level signal is output from the output terminal (LMI) of. This signal is the lens data transfer start signal (1,
1) It is input as Ts) to the chip select terminal (C3) of the lens circuit (1)) via the signal line (CB). The “H” level signal from the output terminal (LMI) is
Two AND circuits (8Ni1).

(ANI2), and therefore, during serial data transfer with the photographing lens (LE), the gates of these AND circuits (ANII) and (AN12) are open.

Next, connect the output terminal (C5C) of the camera computer (2).
K) outputs a clock signal. This clock signal passes through an AND circuit (8N1) whose gate is open and is transferred to the photographic lens (1, E) as a lens data transfer clock signal (LCKS) via a signal line (16). This clock signal (1, (:KS) is input to the clock input terminal (LSCK) of the lens circuit (1)), and in synchronization with the rising edge of the clock signal, the data in the lens circuit (1)) is input to the signal line ( C7) to the camera body (C7).
A), AND circuit (AN12), OR circuit (
OR2) and is input to the serial data input terminal (C3IN) of the camera computer (2). When the serial data transfer is finished, the camera computer (2
) output terminal (1, old) outputs an “I7” level signal, and two AND circuits (ANII), (ANI2
) gate is closed.

Next, the operation when serially transferring data between the camera body (CA) and the electronic flash bag M (Fl,) will be explained.

As mentioned above, when performing serial data transfer with an electronic flash device (Fl), the camera computer (
A signal of "I" level is output from the output terminal (FM2) of 2). As a result, the AND circuit (8N3),
The gates of (AN6), (AN8), and (8N9) are opened. Next, the period ([T1], [T2], [T3] according to the camera mode from the output terminal (Fl)
), an "H" level signal is output, passes through an AND circuit (8N3), and then is output from an OR circuit (ORI). This output signal is inverted by the inverter circuit (IN3) and becomes the “I,” level, and the transistor (Tr
lO) is turned on. As a result, the "H" level signal is transferred as a camera mode signal (CMS) to the electronic quantity optical device (Fl, ) via the signal line (13). On the other hand, the output signal from the OR circuit (ORI) is “L”.
” level, this signal is connected to the inverter circuit (IN
4) and becomes the “H” level, putting the transistor (Trll) in the “aON” state. As a result,
The "L" level signal is sent to the electronic flash bag via the signal line (13)! Transferred to (p+,).

Next, connect the output terminal of the camera computer (2)' (
C5CK) outputs a clock signal. This clock signal is applied to an AND circuit (AN6), an OR circuit (ORI),
), two inverter circuits (IN3), (IN4)
, and two transistors (Trio), (Trll
), the flash data transfer clock signal (FC
KS) is transferred to the electronic flash device (PL) via the signal line (I13). Data is exchanged in synchronization with the rise and fall of this clock signal (FCKS).

First, electronic flash device! (FL) to the camera body (CA)
), that is, <FC mode>
Let's explain the case.

In this mode, the output terminal (FM3) of the camera computer (2) is at the "L" level, so the output signal from the AND circuit (AN8) is at the "I-" level. The gates of the two AND circuits (AN4) and (8N5) are also closed. Therefore, the output signals of both AND circuits (AN4) and (AN5) are both at "L" level, and the transistor (T
r5) is in the “ON” state, and the transistor (Tr8)
is in the “O@FF” state. Since the transistor (Tr5) is in the ON state, the transistor (Tr6)
, (Tr7) are both in the "OFF" state, and the interface circuit (3) is in the state of accepting input from the electronic flash device (PL). On the other hand, the output terminal (FM
The “I,” level signal from 3) is sent to the inverter circuit (
INK) and becomes the "I]m level. As a result, the output signal from the AND circuit (8N9) becomes the "■1" level, and the gate of the AND circuit (ANIO) is opened.

In this state, the signal line (
12) When a serially transferred data signal is input, this signal is inverted by the transistor (Tr9) and then further inverted by the inverter circuit (TN6) to return to the original signal, and the AND circuit (ANIO). This signal is an AND circuit with an open gate (8N
10) and the serial data input terminal (C3IN) of the camera computer (2) through the OR circuit (OR2).
is input.

Next, from the camera body (CA) to the electronic flash device ffi (
The mode in which data is transferred to FL), that is, <CF mode> will be described.

In this mode, an "H" level signal is output from the output terminal (FM3) of the camera computer (2), so the output signal from the AND circuit (^N8) becomes "H" level, and as a result, Two AND circuits (AN4)
, the gate of (^N5) is opened.

On the other hand, the "H" level signal from the output terminal (FM3) is inverted by the inverter circuit (INK) and becomes "■
,” level. This causes the AND circuit (AN9)
The output signal of becomes “L” level, and the AND circuit (^old 0
) gate is closed. Therefore, no data signal is input to the serial data input terminal (C3TN) of the camera computer (2). The AND circuit (AN4) with the gate open has a camera computer (
The data signal from the serial data output terminal (C3OUT) of 2) is also input to the AND circuit (AN5) whose gate is similarly opened.
NS), the inverted signal is input.

When transferring serial data from the camera body (CA),
In this state, a data signal is output from the serial data output terminal (C3OUT) of the camera computer (2).

When the output signal from the serial data output terminal (C3OIIT) is at the "H" level, the output signal from the AND circuit (AN4) is at the "H" level, and the transistor (Tr5
) becomes “OFF”. As a result, the two transistors (Tr6) and (Tr7) are both turned on. On the other hand, the output signal from the AND circuit (8N5) becomes L'' level, and the transistor (Tr8) becomes O
FF'' state, so a signal at the "H" level is transferred to the electronic flash device (PL) via the signal line (712).

Also, when the output signal from the serial data output terminal (C3OUT) is at the "I7" level, the AND circuit (AN4
) becomes "L" level, and the transistor (Tr5) becomes "ON" state. As a result, both of the two transistors (Tr6) and (Tr7) are set to "O".
FF" state. On the other hand, the output signal from the AND circuit (AN5) becomes "H" level, and the transistor (Tr8
) is in the "ON" state, so a signal at the "■" level is transferred to the electronic flash device (FL) via the signal line (12).

Next, <FD mode>, that is, electronic flash device (PL)
The operation in the mode in which flash photography information from the camera is displayed on the camera body (CA) will be explained.

When the camera is not performing exposure control or serial data transfer, the output signals from the output terminals (OF2) and (FM2) of the camera computer (2) are at "L" level. Since the AND circuit (ANI3) receives a signal obtained by inverting this re-output signal, its gate is open.

At this time, in order to display flash photography information from the electronic flash bag W (PL) on the display device (4) of the camera body (CA),
When a flash display start signal (FrlSS) consisting of two pulses is transferred via the signal line (I12), the AND circuit (AN13) outputs this signal (FDSS).
is output as is to the output counter circuit (CNTI). The counter circuit (CNTI) receives these two pulses and sets the output terminal (old) to the "H" level.

After that, when the flash display end signal (FDBS) is transferred from the electronic flash device (PL) and receives two pulses, the counter circuit (CNTI) sets the output terminal (port 2) to the "H" level. .

The "H" level output signal from the output terminal (old) of this counter circuit (CNTI) causes the R5-flip-flop circuit (1?s3) to be sent via the one-shot pulse generation circuit (O3), and the camera Computer (2
) input terminal (IF5) and interrupt input terminal (CINT2)
The “■B level” signal is input to the camera body (CA).
), that is, the mode displayed on the display device (4) of <FD
mode> is started. In addition, the counter circuit (CNTI
)'s output terminal (02) resets the R3-flip-flop circuit (R33) via the one-shot pulse generation circuit (O32), and the input signal of the camera computer (2) is reset. Terminal (IF6
) and an interrupt input terminal (CINT2). This ends <FD mode>.

Note that the output signal from the output terminal (port 2) of the one-shot pulse generation circuit (O32) is output from the counter circuit (CNTI).
) is input to the glue cent terminal (R), and the <
At the end of the FD mode, the counter circuit (CNTI) is reset, and the two output terminals (old) and (port 2) become "L" level.

Next, a description will be given of the light adjustment operation when performing exposure control during flash photography using the electronic flash bag W (FL), that is, in (EC mode).

6'/ When the transfer of the camera mode signal (CMS) indicating <EC mode> is completed, the output signal from the output terminal (OF2) of the camera computer (2) becomes "H" level, and the AND circuit (AN7) Open the gate.

At this time, the main capacitor (C) of the electronic flash device (PL)
2) is fully charged, the electronic flash bag ff(Pl,)
A charge completion signal (C[iS) of "H" level is transferred from the signal line (7!2). This signal is connected to the transistor (Tr9) and the inverter circuit (IN8).
The signal is inverted twice and input to the AND circuit (AN7). Therefore, the output signal of the AND circuit (8N7) is “
becomes “H” level and transistor (Tr4) turns “ON”
become a state. As a result, the dimming capacitor (C3) is discharged.

Note that even when the output signal from the output terminal (OF2) is at the "L" level, this signal is inverted by the inverter circuit (IN7) and becomes the "H" level, so the transistor (Tr4) is in the "ON" state. Therefore, the dimming capacitor (C3) is discharged.

As will be explained later, in the case of <EC mode>,
The contact (SX) is closed and a synchronization signal (XT) for flash emission is sent to the electronic flash device (PL) via the signal line (A'l).
When S) is transferred, the electronic flash device (PL) sends an L” level dimming start signal (
ASS) will be transferred.

This signal (ASS) is inverted twice by the transistor (Tr9) and the inverter circuit (IN8) and input to the AND circuit (AN7), and the output signal from the AND circuit (8N?) is at the "L" level. become. At this time, as mentioned above, the output signal from the output terminal (OF2) of the camera computer (2) is at the "H" level to indicate the <EC mode>, and the inverter circuit (IN
7) The output signal is at "L" level. Therefore, the output signal from the OR circuit (ORO) becomes "L" level, and the transistor (Tr4) becomes "OFF". As a result, the automatic light control circuit (1o) starts the light control operation.

The light emitted from the electronic flash device (PL) and reflected from the subject enters the phototransistor (PTrl),
The photocurrent that is amplified and output is connected to the dimming capacitor (O3
) will be charged. A comparator (COM) inputs the output voltage (Vc) from this dimming capacitor (O3).
) is input with an analog voltage (vsv) output from the output terminal (OR3) of the camera computer (2) in correspondence with the film sensitivity value (SV).

Then, the output voltage (V
C) reaches the reference analog voltage (VSV), the output signal of the comparator (COM) becomes “L” level.
II” level.

This output signal is generated by the one-shot pulse generation circuit (O20
) is pulsed by the camera body (
As in the case of serial data transfer from CA) to electronic flash device f (Fl,), the OR circuit (ORI), 2
one inverter circuit (IN3), (IN4), and two transistors (TrlO), (Trll)
The dimming completion signal (
8ES) to the electronic flash device (PL).

Next, the configuration and operation of the electronic flash device (Fl) will be explained.

The schematic configuration of the electronic flash device (PL) is as described above using FIG. , will be explained using the circuit diagram in FIG.

In the figure, (AN14) to (AN24) are AND circuits, (O
1?3) ~ (OR7) is an OR circuit, (NORI) ~ (N
OR2) is a NOR circuit, and (IN9) to (TM01) are inverter circuits.

Further, (O33) to (O36) are one-shot pulse generation circuits, and (list) is an R3-Frisop flop circuit.

First, the switch group (23) and the switch control circuit (24)
).

The switches (S6) to (SIO) constituting the switch group (23), which is the information setting means for flash photography, are all bush switches that are normally in an open state.

(S6) is a light emission mode changeover switch that switches between TTL automatic light control mode and manual flash mode, (S7) is a display unit changeover switch that changes between meter unit display and foot unit display, (S8) is a light emission amount change switch, (
S9) is an illumination angle change switch, and (510) is a display switch for displaying flash shadow information from the electronic flash device @(PL) on the display device (4) of the camera body (CA). In addition, even when the display switch (SIO) is not closed, if the shooting data changes by operating other switches (S6) to (S9), the camera body (CA
) The changed photographic data is displayed on the display device (4).

The signals from each of those switches (S6) to (SIO) are
It is input to the flash computer (12) via the switch control circuit (24). This switch control circuit (
24), the signals from the switches (S6) to (S9) are sent directly to the flash computer (12), respectively.
) is input to input terminals (IPII) to (IP14). In addition, each switch (S6) to (SI
The signal from O) is input to an AND circuit (AN22). The output signal from the AND circuit (8N22) is input to the interrupt input terminal (FINT2) and input terminal (IP15) of the flash computer (12).

Then, when any of the switches (S6) to (SIO) is closed, "" is output from the AND circuit (AN22).
1. ” level signal is detected by the flash computer (12
) is input to the interrupt input terminal (FINT2) of the Franche computer (12) to start execution of the interrupt flow of the Franche computer (12), which will be described later.

Next, the operation of the control section (14) will be explained.

First, the operation when transferring data between the camera body (C^) and the electronic flash device (FL) will be explained.

The input to the signal line (1) is at 'H' level except when the X contact (SK) is closed and the synchronizing signal (XTS) at L' level is being transferred.

Therefore, the transistor (Tr12) is in the "OFF" state and its output signal is at the "L" level, and the inverter circuit (
The output signal from IN9) is inverted and becomes "H" level. Therefore, an AND circuit (8N1
4) The gate is open. At this time, the camera body (C
When the camera mode signal (CMS) is input from A) to the electronic flash device (Fl,) via the signal line (13), this signal (CMS) is transmitted to the transistor (Tr20).
After being inverted by the inverter circuit (INIO), it is further inverted to the original signal, and then the AND circuit (AlI4)
The signal is input to the mode discrimination circuit (19) through the .

A clock signal (φ2) output from the output terminal (IIcLK) of the flash computer (12) is input to the mode discrimination circuit (19). Mode discrimination circuit (
19) uses this clock signal (φ2) to measure the period of the “1)” level of the signal input from the AND circuit (AlI4). If this period is [T1], it is determined that the mode is <FC mode) and the output terminal (PC
) to the “II” level signal, and this period is [T
2], it is determined that the mode is <CF mode> and an “H” level signal is output from the output terminal (CF), and if this period is [T3], it is determined that the mode is (EC mode). , and sends a signal of “I(” level) from the output terminal (EC),
Output each.

- Among the above modes, in <FC mode> and <CF mode>, when the serial data transfer is completed, the output terminal (SI
ORE) outputs an "H" level pulse signal. This pulse signal passes through the OR circuit (OR4) and is input to the reset terminal (RE) of the mode discrimination circuit (19). As a result, the mode discrimination circuit (19) is reset, and each output terminal (F(:), (CF)) becomes "L" level.

In addition, in <EC mode>, the camera body (CA)
When the second curtain of the shutter has completed running, the X contact (
SX) becomes open. This allows the transistor (
Tr12) enters the "OFF" state, and the output signal from this one transistor (Tr12) is converted into a pulse by the one-shot pulse generation circuit (O36), and as before, the mode is determined via the OR circuit (OR4). Circuit (19
) is input to the reset terminal (RE) of the circuit (19), and the output terminal (EC) becomes “
■, to reach the “level”.

Next, the operation in each mode will be explained.

First, <FC mode> will be explained.

As mentioned earlier, in this mode, a signal of level "1" is output from the output terminal (FC) of the mode discrimination circuit (19). This signal is pulsed by the one-shot pulse generation circuit (O53) and input to the interrupt input terminal (FINTI) of the flash computer (12). As a result, execution of the interrupt flow of the flash computer (12), which will be described later, is started.

In addition, the “■ Bi-level signal output from the output terminal (FC) of the mode discrimination circuit (19) is the OR circuit B (OR3).
The signal is input to the AND circuit (AlI5) through the gate, and the gate of the AND circuit (AlI5) is opened. In this state, the Franche data transfer clock signal (F) is transferred from the camera body (CA) via the signal line (I13).
CKS) is input to the AND circuit (AlI5), this clock signal (FCKS) is directly input to the clock input terminal (FSCK) of the flash computer (12).
is input.

In addition, the “H” level signal output from the OR circuit (OR3) is inverted by the NOR circuit (NORI) and “
The output signal from the AND circuit (AlI6) becomes "L" level, and the OR circuit (OR5) to which this output signal is input is input to the AND circuit (AlI6). computer (12)
The data signal outputted from the serial data output terminal (1'5OUT) in synchronization with the rising edge of the flash data transfer clock signal (FCKS) is directly sent to the two AND circuits (AlI3).

(8N18).

The other input signal of the two AND circuits (AlI3) and (ANlB) is connected to the output terminal (C
This is a signal obtained by inverting the output signal from F) by the inverter circuit (INII), and when in <FC mode>
)” level. Therefore, two AND circuits (
The gates of AlI3) and (ANlB) are both open.

During serial data transfer from the electronic flash device (PL), in this state, the data signal from the serial data output terminal (FSOIIT) of the flash computer (12) is output through the OR circuit (01) 5>.

If the output signal from the OR circuit (OR5) is “H” level, the output signal from the AND circuit (AN17) is “I-
Since the input signal from the OR circuit (OR5) is inverted, the output signal from the AND circuit (to 8) becomes the "L" level.

Therefore, the transistor 4 (Tr13) becomes uOFF'' state, and the two transistors (Tr14) and (Tr1
5) are both in the "ON" state. Further, the transistor (Tr16) is in the "OFF" state. This allows “
A signal at level I(" is transferred to the camera body (CA) via the signal line (A12).

On the other hand, if the output signal from the OR circuit (01?5) is at the "L" level, the output signal from the AND circuit (^old 7) is at the "1." level, and the output from the AND circuit (ANI8) The signal becomes "H" level.

Therefore, the transistor (Tr13) becomes "ON" state, and the two transistors (Tr14) and (Tr15
) are both in the “OFF” state. Further, the transistor (Tr16) is in the "ON" state. This results in
The “I,” level signal is transferred to the camera body (CA) via the signal line (I12).

Next, (CF mode) will be explained.

As mentioned earlier, in this mode, an "H" level signal is output from the output terminal (CF) of the mode discrimination circuit (19). This signal connects the OR circuit (OR3) to 1
ffl is input manually to the AND circuit (AN15), and the gate of this AND circuit (ΔN15) is opened.

In other words, the Franche data transfer clock signal (FCK
S) passes through this AND circuit (AN) 5 and is connected to the flash computer (1
2) is input to the clock input terminal (FSCK).

In this mode, the output terminal (
The "■(" level signal output from the CF) is inverted by the inverter circuit (INII) and becomes the "L" level. Therefore, the two AND circuits (^old 7) to which this signal is input, ( Both transistors (Tr15) have their gates closed.Therefore, two transistors (Tr15
) and (Tr16) are both in the "OFF" state, and the electronic flash device iF (PL) is in a state where it can accept input from the camera body (CA).

In this state, from the camera body (CA) to the signal line (12
) When a serially transferred data signal is input, this signal is inverted by the transistor (Tr17) and further inverted by the inverter &R (IN12) to return to the original signal, and the flash computer (12
) is input to the serial data input terminal (FSrli).

Next, <FD mode> will be explained.

Electronic flash device! The pulse signal that becomes the flash display start signal (FDSS) that displays the flash photography information of (Fl,) on the display device (4) of the camera body (C^) is output from the output terminal (PI, 1) of the flash computer (12). is output from. This flash display start signal (FDSS) is
<FC mode> and <CF mode> for transmitting the serial data mentioned above, and <EC mode> for controlling exposure)
At other times, the data is transferred to the main unit (CA). In the <FC mode>, especially the CF mode> in which serial data is transferred, the execution program of the flash computer (12), which will be described later, prohibits the output of a flash display start signal (FDSS).

In addition, in <EC mode to control exposure), "H" is output from the output terminal (EC) of the mode discrimination circuit (19).
The level signal is inverted and input to the other input terminal of the AND circuit (AN24). Therefore, the gate of this AND circuit (AN24) is closed, and the pulse signal output from the output terminal (Pl, 1) of the flash computer (12) is not transferred to the camera body (CA).

Next, charging of the main capacitor (C2) and flash light emission control will be explained.

When the charging voltage of the main capacitor (C2) reaches a voltage that allows light emission, the light emitting section (17) outputs an "H" level charge end signal (C3S). This charging end signal (C
3S) is input to the input terminal (IP19) of the flash computer (12). flash computer (
12) receives this signal and outputs a "II" level signal from the output terminal (mouth CC). As a result, the output signal from the NOR circuit &3 (NOR2) becomes the "I7" level, turning the boost control transistor (Tr3) into the "OFF" state and stopping boosting.
The charge end signal (C) output from the light emitting section (17) is
5S) is entered directly. Therefore, this signal also controls the operation of the boost control transistor (Tr3), and boost control is performed. That is, regardless of the charging state, when controlling the voltage boost from the flash computer (12), the output signal from the output terminal (rlcc) is used.

Furthermore, a charge end signal (
C5S) is also input to the AND circuit (AN23). In <EC mode> for controlling exposure, the output signal from the output terminal (EC) of the mode discrimination circuit (19) is "H".
level, the gate of the AND circuit (8N25) is open, and therefore the main capacitor (C2)
When charging is completed, the output signal from the AND circuit (8N25) becomes "H" level.

At this time, the output signal from the output terminal (CF) of the mode discrimination circuit (19) is at "L" level, and this signal is inverted and input to two AND circuits (8N17), (
AN1B), both gates are open. Therefore,
As in <EC mode>, this AND circuit (AN
The “H” level output signal from
5) and is transferred to the camera body (CA) as an H'' level charge completion signal (CBS) via the signal line (12).

The output signal from the output terminal (EC) of the mode discrimination circuit (19) is at the "l," level except when in <EC mode> for controlling exposure, and this signal is input to the AND circuit (AN23). ) gate is closed. In other words, the charge completion signal (CES) is not transferred to the camera body (CA) except when in (EC mode).

Next, the operation of emitting and stopping the flash will be explained.

If the main capacitor (C2) has been fully charged, the flash computer (12) receives the charge completion signal (CSS) from the light emitting unit (17) and outputs the output terminal (CHG).
The output signal from this terminal (CIIG) is input to the AND circuit (AN20), and the gate of the AND circuit (8N20) is opened.

In this state, in the camera body (CA), when the first curtain of the shutter completes running and the X contact (SX) is closed, an "L" level flash is transmitted via the signal line (1)). A light emission synchronization signal (XTS) is input. This results in
The transistor (Tr12) becomes "ON" and the output signal from this transistor (Tr12) becomes "1 (" level). Also, when the test light emission switch (S5) is closed, the transistor (Tr12) The base of the transistor (Tr12) is grounded, and the transistor (Tr12) becomes "ON", and its output (in other words, becomes the "■1" level).

Therefore, in any of the above cases, the transistor (Tr1
2) AND circuit (8N20) in which the output signal from
) becomes the “H” level, and the OR circuit (O
A light emission start signal (FSS) of "H" level is outputted to the light emitting section (17) through R6). As a result, flash light is emitted.

Further, the output signal from the transistor (Tr12) is also input to the AND circuit (AN19). This AND circuit (^old 9) has a flash computer (12)
The output signal from the output terminal (CAI) is inverted and inputted. The output signal from this output terminal (CAI) is at the "H" level when the electronic flash device (PI) is attached to a data transferable camera (CA).

In other words, the electronic flash device (PL) is not attached to the camera body (CA) that can transfer data, but is used alone (camera body (CA)).
(including when the CA) is not powered on), or when the camera body (CA) is incapable of data transfer.
), the AND circuit (8N19)
gate is open.

Therefore, in this case, even if the main capacitor (C2) is not at a charging voltage that allows light emission, by closing the test light emission switch (S5), the AND circuit (AN)
The output signal from 9) becomes the "l" level.This causes the output signal to pass through the OR circuit (OR6) to the light emitting section (17).
) A light emission start signal (PSS) of 1" level is output, and a flash light is emitted.

Furthermore, the "II" level output signal from the transistor (Tr12) is input to the NOR circuit (NORI).

The “I7” level signal is output from the NOR circuit (NORI), and the AND circuit (AN16) receives this signal.
The output from (the f signal also becomes the "I7" level).

As already explained, in (EC mode), the gates of the two AND circuits (AN17) and (8N18) are open, and at the same time as the flash is emitted, the gates of the AND circuit (8N16) are opened.
) is output from the OR circuit (OR circuit).
5) and the signal line (12), the camera body (C
Transferred to A).

When a flash is emitted, whether the light emission mode is TTL automatic light control mode or manual flash mode, the flash light emission is stopped when the light emission amount reaches a predetermined light emission amount. , an H" level signal is output from the timer circuit (20), passes through the OR circuit (OR7) and becomes "
The light emitting unit (1
7). The output signal from the transistor (Tr12) is input to the reset terminal (1?ll) of this timer circuit (20).

In other words, the timer circuit (20) includes a transistor (Tr1
Timing is started when the output signal from 2) becomes "H" level and the flash light emission starts. The time-up time of this timer circuit (20) changes according to the set light emission amount data transferred from the output terminal (GNS) of the flash computer (I2). When time-up occurs, the aforementioned "I(" level signal) is output.

In the manual flash mode, the output signal from the output terminal (TTL/M) of the flash computer (12) is at the "1.," level, and the AND circuit (8N21)
) gate is closed. Therefore, in this mode, the timer circuit (2
0) to the OR circuit (OR?))m is the light emitting part (I7)
The flash light emission is stopped by a light emission stop signal (Plus) outputted to the light emission stop signal (Plus).

On the other hand, in TTL automatic dimming mode, the output terminal (TT
The output signal from L/M) is at H” level, and
Since the contact (SX) is in the closed state, the transistor (Tr
The output signal from 12) also becomes "H" level, and the gate of the AND circuit (AN21) is opened. In this state,
When the "H" level dimming completion signal (AI!S) is transferred from the camera body (CA) via the signal line (7!3), the output signal from the AND circuit (AN21) becomes "H". ” level, passes through the OR circuit (OR7) and becomes “T” level.
The light emitting stop signal (FES) at I” level is the light emitting part (17)
Output to. Therefore, the flash light emission is stopped at the earlier timing of the timing when the dimming completion signal (AES) is transferred or the timing when the amount of light emission reaches the set amount of light emission.

When the flash light is emitted, the “■1” level signal output from the OR circuit (01?6) is the light emission start signal (FS
S) is output to the light emitting section (17) and is pulsed by the one-shot pulse generation circuit (O34).
R3-flip-flop circuit for light emitting memory (R3I)
is input to the set terminal (S) of. As a result, R3-
The flip-flop circuit (1?S1) is set, and the output signal from its output terminal (0) becomes "1)" level. This output signal is input to the input terminal (APOI) of the flash computer (12), and the flash computer (12) determines that the flash light has been emitted.

After that, this judgment will be made frequently, so the execution program of the flash computer (12) should be programmed so as not to judge that the flash operation has been performed immediately after making the judgment or when it is reattached to the camera body (CA). When stopping the flash computer (12) output terminal (A
PRE) outputs an "H" level signal for a certain period of time. This signal is pulsed by the one-shot pulse generation circuit (O85), and the R3-flip-flop (IISI)
It is input to the reset terminal (R) of. This allows RS
- Frisopfurosob circuit (R3I) is set.

In addition, (21) in the figure is a motor (M3) that changes the irradiation angle.
), and this control circuit (21) and the motor (
M3) constitutes the illumination angle changing means (FA(:M). In addition, (26) in the figure is a crystal oscillator (26a).
) is a reference pulse generation circuit.

Next, the configuration and operation of the display section (15) will be explained using the circuit diagram in FIG. 13.

The display unit (15) has two displays L E D (1,01
), (+,1)2), and a display control circuit that controls the display thereof.

When charging of the main capacitor (C2) is completed, this is displayed by lighting up the second L E r ) (1,02). This LP, D(
The completion of charging is indicated by the lighting of the light emitting part (1, 02).
7), or the charging end signal (C5S) output from
Output terminal (CHG) of flash computer (12)
The "H" level signal output from the OR circuit (OR9) causes the output signal from the OR circuit (OR9) to go to the "H" level, thereby turning the transistor (Tr19) into the "ON" state.

Moreover, when the light adjustment by the automatic light adjustment device (10) of the camera body (CA) is completed, the first LED (LDI
) lights up to indicate this. Next, the display indicating completion of dimming will be explained.

Before entering the <EC mode> that controls exposure, the R3-flip-flop circuit (R52) is reset.
The output signal from the output terminal (b) is at the "I7" level. Therefore, the output signal from the AND circuit (AN25) is at the "L" level, and the timer circuit (22), to which this signal is inverted and input to the reset terminal (RE), remains reset. In <EC mode>, the output signal from the output terminal (EC) of the mode discrimination circuit (19) becomes "H" level. This signal is transmitted to the inverter circuit (I
N14) is inverted to the "I7" level, which is input to the AND circuit (AN25);
) is still at the "L" level, and the timer circuit (22) remains reset.

In this state, the automatic light control circuit (10) of the camera body (CA)
) is input to the electronic flash device (PL), and the "H" level dimming completion signal (8FS) is output to the AND circuit (AN) of the control unit (14).
21), this signal (AFS) is output from R3
- Set terminal (S) of flip-flop circuit (1?S2)
) is entered. As a result, the R3-flip-flop circuit (R52) is set, and the output signal from its output terminal (b) becomes "IT" level, and the AND circuit (AN
25) gate is opened.

Then, when the second curtain of the shutter of the camera body (C^) is completed (EC mode), the output signal from the output terminal (EC) of the mode discrimination circuit (19) becomes "L".
゛Level. This output signal is output from the inverter circuit (IN
14) and becomes the “I(” level), so the output signal from the AND circuit (AN25) becomes “H”
become the level.

Therefore, this signal is inverted and input to the timer circuit (
22) is released, and the timer circuit (22)
An "H" level signal is output from the output terminal (to) for a certain period (3 seconds). This allows the transistor (Trl
B) becomes “ON” state, and the first L E D (1,
DI) lights up. The “H” level signal output from the AND circuit (8N25) is the flash computer (
12) is also input to the input terminal (FDT), and the flash computer (12) determines that the dimming operation has been completed.

The timer circuit (22) is connected to the flash computer (12).
) is counted, and after a certain period of time has elapsed, a signal at the "■1" level is output from the output terminal (tl). This output signal passes through the OR circuit (OR8) and is input to the reset terminal (l?) of the R3-flip-flop circuit (R52) to reset the flip-flop circuit (R32). As a result, the output signal from the AND circuit (AN25) returns to the "I7" level, the timer circuit (22) is reset, and the first LED (L old) is turned off. This completes the display of dimming completion.

Next, an electronic flash device (P L
) will be explained based on the flowcharts shown in FIGS. 14 to 17.

The flowchart in Figure 14 shows the main switch (SM)
This shows the operation when the is closed.

When the main switch (SFI) is closed, the flash computer (12) prohibits interruption to this flow (S500) and initializes the data (1) 501
). Specifically, in this step (S501), each flag to be described later is reset, and as data to be transferred to the camera body (CA) side, the light emission amount is set to full light emission, and the illumination angle is set to [
Set the emission mode to T to satisfy rv=28m■
Set the T L automatic light control mode, the display unit to meter unit display, and the third type identification signal to (zoom type).

Note that if the electronic flash device (Fl) is not (zoom type), the program is set to set a predetermined guide number (see Table 1) in the step corresponding to step (+1501). ing.

Next, set the output terminal (PWC) to the “)I” level and turn the power supply transistor (Tr2) into the “ON” state (1)
502). As a result, the control section (14) and the display section (15
), power supply starts. Next, output terminal (1) CG
) to the “17” level, and the boost control transistor (
Tr3) is turned on (S503).

As a result, the boosting operation of the boosting circuit (]6) is started. Next, set the power holding time control counter (N) to [30
It is set to 1 (S504). As will be described later, this counter (N) is designed to count down by ■ in the count interrupt flow that is executed every 30 seconds, and is normally set to [30], so that the electronic flash device The power retention time of (PL) is approximately [15 minutes].

Then, after allowing all interrupts (1) 505), the flash computer (12) stops. This flash computer (12) has two interrupt input terminals (FI
(NTI) and (FINT2). One of them is an interrupt input terminal (FIN) to which a signal indicating the start of serial data transfer from the camera body (CA) is input.
TI), and the other is when any switch (S6) to (S10) in the switch group (23) is closed.
It is an interrupt input terminal (FINT2>) to which an output signal of "L" level from the AND circuit (AN22) is manually input.

First, the operation when an interrupt occurs to the interrupt input terminal (FINTI) will be explained based on the flowchart of FIG.

As already explained, in the case of <FC mode>, a camera mode signal (CMS) of level "1)" is transferred from the camera body (CA) via the signal line (13) during [T1]. Then, "H" is output from the output terminal (FC) of the mode discrimination circuit (19) to which this signal is input.
The level signal is
) and pulsed by a flash computer (1
Execution of this flow is started by being input to the interrupt input terminal (FINTI) of 2).

When the execution of this flow starts, the flash computer (12) first connects the interrupt input terminal (1?INT]).
Interruption to this flow from is permitted (S600).

Subsequently, interrupts to the interrupt input terminal (FINT2) and count interrupts are prohibited (#601 and 602).

Next, the output terminal (PWC) is set to H” level and the control unit (
Start power supply to I4) and display unit (15) 1) 603
), the output terminal (DCC) is brought to the "L" level and the boosting operation is started (1) 604). After that, the state of each output terminal is set (160) based on the initial cent or the changed data in step (1) 501)
5). For example, the light emission mode is set to the output terminal (TTL/M), and the set light emission amount data is set to the output terminal (GNS), respectively. Next, the output terminal (CAI)
is set to "H" (S606). This is the camera body (
This is to uniformly control the operation of the electronic flash device (PL) from the camera body (CA) together with the charge completion signal (CBS) transferred to the CA) side.

In other words, this step (#606) is executed as follows:
This occurs only when an interrupt occurs from the camera body (CA). In this case, by setting the output terminal (CAT) to the "H" level, the output signal from this terminal (CAI) is inverted and input to the AND circuit (AN19).
gate will be closed. Therefore, when attached to such a camera body (CA), the electronic flash device (PL)
The flash of light is emitted when charging is completed and the output terminal (CIIG)
becomes the “■” level, the AND circuit (AN20)
Permission is granted only when the gate is open.

Next, as the status data to be serially transferred,
A signal indicating the charging state of bit (b3) (b4)
), a signal indicating the mounting state of the bit (bO), and two type identification signals, bit (bl) and focus (b5), are sent to the serial data transfer register (SIOIII). (+1607)
, and from the camera computer (2) to the signal line (
1) Serially transfers 8 bits (bO) to (h7) data, including this data, to the camera body (CA) in synchronization with the flash data transfer clock signal (FCKS) transferred via (#608).

Similarly, the seven pintos (bl), (b9),
(bl 1).

(bl2), (bl3), (bl4), (
Set the light emission data of bl5) in the serial data transfer register (SIOR), respectively. (bl)～
The data of (bl5) is serially transferred to the camera body (CA) (1) 609).

When the two serial data transfers are completed, the output terminal (S
Set IOR to “H” level in a pulse manner (+161
)). As a result, the output signal from this terminal (SIOIIE) is transmitted to the mode 1 discrimination circuit (19)
R) to reset this circuit (19).

After that, the flash computer (12) checks the state of the input terminal (IP18) to which the output signal from the output terminal (CF) of the mode discrimination circuit (19) is input.
Determine whether a camera mode signal (CMS) indicating (CF mode) has been transferred from the camera body (CA) (#612).The input terminal (Ip18) changes from the "1.m level" to the "H" level. When the flash computer (12) rises and is determined to be in <CF mode>, the flash computer (12) receives the flash data transfer clock signal (PC5K) transferred from the camera computer (2) via the signal line (7!3). (1) 613 to 1618).

During each serial data transfer, data is transferred 8 bits at a time, and each time 8 bits of data are taken in, the flash computer (12) stores this data in a predetermined register. These three serial data transfers (1G13
．． 1) The data transferred by 615.1618) includes the control Ll aperture value (AV), exposure mode, film sensitivity value (SV), and photographic lens (Ll focal length 4Fi).
(fv) and data showing interharmonide. When the three serial data transfers are completed, the <
As in the case of FC mode, the output terminal (SIO1?E
) is pulsed to “H” level, and the mode discrimination circuit (1
9) (1) 619). Next, the subroutine ``Data Setting'' is called (1) 620).

Next, the data setting subroutine will be explained based on the flowchart shown in FIG.

This routine may be called in step (1620) and executed as a subroutine, or may be executed when an interrupt is generated to the interrupt input terminal (FINT2) of the flash computer (12). The interrupt to this interrupt input terminal (1?1NT2) is sent to the electronic flash bag N(P
If the electronic flash device (PL) is attached to a camera body (CA) that cannot transmit the signal to start the operation, or if the electronic flash device (PL) is used alone (the camera body (CA) is not powered on). This occurs when any of the switches (S6) to (SIO) are closed when the switch is used (including when the switch is in use).

When an interrupt occurs to the interrupt input terminal (1? INT2), first set the output terminal (PWC) to “H” level to start supplying power to the control unit (14) and display unit (15). #
801), 7i (1) which started the boost operation by setting the output terminal (IICC) to the “■,” level, and an interrupt indicating that the execution of this flow is due to an interrupt to the interrupt input terminal (1” INT2). Set the interrupt flag (FIN72F) to "1"(#803) and proceed to step (#810).On the other hand, if it is called at step (+!620), set the interrupt flag (FINT2F) to "1"(#803) and proceed to step (#810). After “0” (#8
00), proceed to step (1)810).

In step (1) 810), an electronic flash device (F L
) in which flash photography information should be displayed, that is, <FD
mode> is determined based on the state of the input terminal (IP15). If this input terminal (IP15) is determined to be at "L" level, any switch (S6)
It is determined that ~(SIO) is in the closed state, that is, <Fr) mode>, and then the state of the display flag (DISF) is determined (1B20). This flag (rllsF
) is set once <FD mode> is entered. If it is determined that the display flag (DISF) is set, it is determined that the <FD mode> is already in place and the process returns to the main routine.

On the other hand, in step (1) 820) the display flag (DIS
F) is not set, <F
r) mode>, and then outputs two pulse signals from the output terminal (PLI) (1
)121). This pulse signal is on the signal line (7!2)
is transferred to the camera body (CA) as a flash display start signal (FDSS) to notify the camera body (C^) of the start of <FD mode>.

Then, after setting the display flag (015F) (1)
Proceed to steps 822) and (#823). Next, the changed flash photography information is input to the input terminals (IpH) ~ (TP1
It is determined based on the state of 4) and each data is changed and set.

First, determine the state of the input terminal (IPII) (1) 8
23). If this terminal (IPII) is at the “■,” level, it indicates that the light emission mode has been changed.
After changing this data (1) 824), the process advances to step (#621) of the main routine. Input terminal (IPI
If I) is at “H” level, then input terminal 0PI
2) identify the cane bear (#825). This terminal (IP1
2) is at “L” level, it indicates that the display unit change operation has been performed, and after changing this data (1B
26), proceed to step (1) 621) of the main routine.

Furthermore, if the input terminal 0P12) is at the I]" level, then the state of the input terminal (TP13) is determined (1)B
27). If this terminal (TP13) is at "L" level, it indicates that the light emission amount has been changed.
After changing this data (182B), the process advances to step (+1621) of the main routine. Each time this routine is passed, this data is changed one step at a time, from [Full flash] to [172 flashes], [1i4 flashes], [1i8 flashes], etc., and the original one is changed at the fourth time. It is now back to the data.

Also, if the input terminal (TP13) is at “H” level,
Next, determine the state of the input terminal (IP14) (#8
29). If this terminal (IP14) is at the “■,” level, it indicates that the illumination angle has been changed, and after changing this data (#830), go to step (1621) of the main routine. move on. Changing this data is
Every time this routine is passed, from [fv=28m] to [fV=35n, [h=50mml, [
fv=70mm] and [Auto], the steps are performed one by one, and the original data is returned at the fifth time. In addition, in the case of [Autoco], as will be explained later, based on the focal length value (rv) of the photographic lens (LE) that is serially transferred from the camera body (CA), the illumination angle value that satisfies it is determined. (rv8) is automatically set.

Furthermore, if the input terminal (rP14) is at "H" level, this means that the display switch (S10) is closed, and the main routine (1621) is executed without changing the data.
Proceed to step.

On the other hand, at the step ($1810), the input terminal (IP1
5) is determined to be at the "I(" level), none of the switches (S6) to (510) are closed.
That is, it is determined that the mode is not <FD mode>, and then the state of the display flag (DrSll) is determined (#850).

If it is determined that the display flag (DISF) has not been sent, the main routine (1621) is executed.
Proceed to step. On the other hand, if it is determined that the display flag (DISF) is sent, the output terminal (Pl
, 1) outputs two pulse signals (#851).

This pulse signal is transferred to the camera body (CA) as a flash display end signal (FflES) via the signal line (7!2), and notifies the camera body (CA) of the end of <FD mode>. After that, the display flag (DISF)
) and the interrupt flag (FIN72F) (#852), the process advances to step (#621) of the main routine.

Returning to FIG. 15 and continuing the explanation, in step (1621), the timer (TF) for measuring the power holding time of the electronic flash device (FD) is reset, and then this timer (TF) is reset.
) starts (1) 622). In other words, as will be explained later, while the timer (Tri) is measuring time, a loop from the next step (1) 623) will be executed, but the loop from the camera body (CA) will be executed. Interrupt to the interrupt input terminal (FINTI) or interrupt input terminal (FINT2) for displaying flash photography information
If an interruption occurs, it is determined that there is a high possibility that a photographic operation will be performed, and from that point on, the electronic flash device (P
In this step (#62LI1622), the timer (TF) is reset and restarted in order to restart the measurement of the power supply holding time of I,).

Subsequently, it is determined whether the set illumination angle is [auto] as described earlier (1) 623). If the set coverage angle is determined to be [Auto], then
It is determined whether the photographing lens (LU) is attached (#625). Specifically, whether or not the photographing lens (LIi) is attached is determined based on the data of the control aperture value (^V) manually input from the camera body (CA) in step (1) 614).

In other words, as already explained, when the photographic lens (LE) is not attached, specific warning data is set to the control aperture value (AV), and it is possible to check whether or not this warning data is present. By shooting lens (LH)
It determines whether or not it is attached.

Then, if it is determined that the photographic lens (LH) is attached, the angle of view corresponding to the focal length value (f) of the photographic lens (LH) that is serially transferred in step (161B) is satisfied. After setting the irradiation angle value (fva) to the control irradiation angle value (fvA) (#626), (#62B)
Proceed to step. In addition, if it is determined that the photographing lens (LH) is not attached, the control illumination angle value (fv
After setting A) to a value (fvo) that satisfies the angle of view corresponding to [fv=28m] (1627), the process proceeds to step (1) 62B).

Furthermore, in step (1) 623>, if the set coverage angle is other than [auto], the manually set coverage angle value (fvm) is set as the control coverage angle value (fvA), and then (1)
Proceed to steps 624) and (1628).

0B Next, the flash computer (120; t) checks the state of the input terminal (FIST) to determine whether the automatic light control operation is completed (1) 628). This terminal (
If it is determined that the automatic light adjustment operation is completed when FIIT) is at the "I-I" level, bit (b4) of data to be transferred to the camera body (CA) is set (1) 629).

In addition, if this terminal (FDT) is at “L” level and it is determined that the automatic dimming operation has not been completed, bit (b4
) (#630).

Next, the flash computer (12) changes the illumination angle to correspond to the focal length value (fv) of the photographic lens (1, [ri).Specifically, the illumination angle is changed by By keeping a certain xenon tube (not shown) fixed and moving the diffuser plate (not shown) located in front of it back and forth, the relative distance between the xenon tube and the diffuser plate can be changed. The motor (M) in Figure 1 or Figure 12 moves this diffuser plate back and forth.
3), and the flash computer (12) controls the drive of this motor (M3) in order to change the irradiation angle.

That is, first, (llfi24.1)626. #627
) The control coverage angle value (fv^) set in step ) and the current magnification fB detected from the coverage angle detection circuit (13)! The illumination angle 41 (fvN) corresponding to the position of the plate is compared (tt631.1632).

In step (#631), the control coverage angle value (fv^) is larger than the current coverage angle value (fvN) (“νA >
fvN), this indicates that the current position of the diffuser plate is on the wide-angle side of the position corresponding to the focal length value (fv) of the photographing lens (LE). In this case,
Output terminal (MOI) to rotate the illumination angle changing motor (M3) in the normal direction and move the diffuser plate to the telephoto side.

(Mn2) outputs a motor forward rotation control signal to the motor drive control circuit (21) (1634).

On the other hand, in step (1) 632), the control beam angle value (f
vA) is smaller than the current coverage angle value (fvN) (fv
Conversely, if it is determined that A < fvN), this indicates that the diffuser plate is on the telephoto side. In this case, the output terminal (MOI) is used to reverse the illumination angle changing motor (M3) and move the diffuser plate to the wide-angle side.

(Mn2) outputs a motor reversal control signal to the motor drive control circuit (21) (1635).

Then, when a control signal is output to drive and rotate the illumination angle changing motor (M3) in either the forward or reverse direction;
Subsequently, after setting the motor drive flag (MOTF) without indicating that this motor (M3) is being driven (163
6), proceed to step (+1640).

In step (1) 631) or (1632), the magnitude relationship between the control illumination angle value (fvA) and the illumination angle A1 (fvN) corresponding to the current position of the diffuser plate is determined to be any of the above-mentioned relationships. If it is determined that there is no beam, this indicates that the diffuser plate is located at a position that satisfies the control beam angle value (fvA).

In this case, the motor drive flag (MOTF)
(1) 725).

When it is determined that this flag (MOTF) is set to "1", that is, when the motor (M3) is being driven, the output terminal (MOI) is set to stop the motor (M3).
, (Mn2) should output the control signal for motor stop1
After resetting the motor drive flag (MOTF) (638), the process proceeds to steps (1639) and (1640). −
On the other hand, if the motor drive flag (MOTF) is determined to be "0", that is, if the motor (M3) is stopped, the output terminal (Mol) is
After outputting the motor holding control signal from (Mn2), the process proceeds to steps (1) 637) and (#640).

At the step (+1640), the input terminal (IP19)
The state of the main capacitor (C2) is checked to determine whether charging of the main capacitor (C2) is completed. Input terminal (IPI9)
When it is determined that “H” level charging is completed, the data bit (b) to be transferred to the camera body (CA) is
After setting 3) (+1641), proceed to step (#643). On the other hand, if it is determined that the input terminal (IP19) is at "L" level and charging is not completed, after resetting bit (b3) (#642), (164
Proceed to step 3).

In step (1) 643), it is determined whether this photographing operation is interval photographing based on control from the interval device (IT) based on the data input in step (161B). If it is determined that this shooting operation is not interval shooting, (+1644)
Proceed to step 2 and set the timer (TF) for measuring power hold time.
It is determined whether three minutes have elapsed since the start at step (1622). If it is determined that 3 minutes have not elapsed, return to step (1) 623) and (
Repeat the loop from 1) 623 to 1) 644). on the other hand,
If it is determined in step (1) 644 that three minutes have elapsed, the process proceeds to step (#646).

In addition, if it is determined that interval shooting is being performed in step (#643), the process proceeds to step ($1645) and the timer (TF) for measuring power holding time is set to (1622
), it is determined whether one minute has elapsed since the start. If it is determined that one minute has not elapsed, the process returns to step (1) 623) and repeats the loop of (#623 to #645) in the same way as before. on the other hand,
If it is determined in step (1645) that one minute has passed, the process proceeds to step (1646).

In step (1) 646), the interrupt flag (1' I
N72F) to determine whether this flow is due to an interrupt to the interrupt input terminal (FTNT2). If the interrupt flag (FIN72F) is "1" and it is determined that the interrupt is to the interrupt input terminal (FINT2), this electronic flash device (Fl) transfers a start signal to start its operation. When attached to a camera body (CA) that cannot be used, or when this electronic flash device (Pl,) is used alone (including when the camera body (C^) is not powered on), either Switch (S6) ~ (S
IO) is operated, this flag (FINT2
After resetting F) (#647), set the power hold time control counter (N) to [24] (1) 648)
. Next, after enabling count interrupts (1) 649)
, (1) 653).

On the other hand, at step (+1646), the interrupt flag (FI
NT2F) is 0'' and it is determined that there is no interrupt to the interrupt input terminal (fllNT2), the output terminal (DCC
) to the “II” level and boost control transistor 1 (T
r3) is set to the “OFF” state (1) 650).

As a result, the boosting operation by the boosting circuit (16) is stopped. Subsequently, the output terminal (PWC) is set to the "L" level, and the power supply transistors (Tr2) are turned "OFF" (1) 65]). As a result, power supply to the control unit (14) and display unit (15) is stopped, and the electronic flash device ff, (
The operation of each part of p+, ) is stopped. And, as already explained, R3-flip-flop circuit (1) for light-emitting memory
After setting the output terminal (APRE) to the “1)” level for a certain period of time in order to reset S1), (1652), (+165
Proceed to step 3).

In step (1) 653), the three output terminals mentioned above (IICC), (PWC), (API?E)
Set all other output terminals to "I," level. after that,
After enabling interrupts to the interrupt input terminal (FTNT2) (
1654), the flash computer (I2) stops.

Next, the operation in the double flow (1) 643 to #654 will be further explained.

During interval photography, the operation of the electronic flash device f is made to stop one minute after the timer for measuring power supply holding time (TF) starts.

In other words, in interval shooting, after the shooting operation is completed, continuing to operate the electronic flash device (Fl) for about 15 minutes, which is the normal power holding time, does not involve the actual shooting operation. Despite this, batteries (BA3) are the power source.
), which is undesirable. Therefore, in the case of interval photography, the power holding time should be shorter than usual.

Specifically, the power holding time in this case is as follows.

That is, in the case of interval photography, the interval device (I
When a photometry start signal (PSS) is output from T), an interrupt to the camera computer (2) occurs.

Then, as the program is executed, the camera computer (2) repeatedly displays the electronic flash device W (Fl,).
A camera mode signal (CMS) indicating <FC mode> is transferred to. Every time this signal (CMS) is received, an interrupt is generated to the interrupt input terminal (FINTI) of the flash computer (12), and the flowchart shown in FIG. 15 is executed. In this state, (1621, 1622
) step, the timer (T'F) for measuring the power hold time is always reset and restarted, so (1) 64
The process does not proceed to the flow after step 6).

Photometry start signal (PSS) from interval device (IT)
) is input and 10 seconds have elapsed, the camera computer (2) stops. As a result, no interrupts to the flash computer (12) occur, and (1623
~#645) will be repeatedly executed, but at the latest 1 after the photometry start signal (pss) is output.
When the minute has elapsed, a release signal (PSS) is output from the interval device N (IT). Therefore, an interruption to the camera computer (2) occurs again, and accordingly,
As mentioned above, an interrupt also occurs to the flash computer (12). Therefore, the power holding time measurement timer (TF) is reset and restarted again, which is repeated.

A photographing operation will be performed in response to this release signal (PSS-), but after the photographing operation is completed, the camera computer (2) will stop after 10 seconds have elapsed, as before. Then, since no interruption occurs to the flash computer (12), (#623 to 1645)
The loop will be executed, and when one minute has passed (
After step 1646), the flow after step 650) (1) is executed.

As a result, the operation of the electronic flash device (Pl,) is stopped. Therefore, the power retention time of the electronic flash device (PI) after completion of the photographing operation by interval photographing is approximately [1 minute and 10 seconds].

On the other hand, if it is not interval shooting and there is no interrupt to the interrupt input terminal (FTNT2) of the electronic flash device (PC), that is, if the activation signal to the electronic flash device (Fl) is not transferred. If the camera body (CA) is equipped with a power supply holding time measurement timer (T
F) The operation of the electronic flash device (PL) is to be stopped after three minutes have elapsed since the start.

In other words, in the combination of the electronic flash device (PL) and the camera body (CA) described in this embodiment, the camera body (CA
) The electronic flash bag W (Fl,) starts its operation every time a camera mode signal (CMS) as a start signal is transferred from the electronic flash device ff (Fl,) to the electronic flash device ff (Fl,). In the case of such a combination, in a different sense from the case of interval shooting mentioned earlier, after the shooting operation is completed, the normal power holding time of about 15
Continuing to operate the electronic flash device (Pl,) for several minutes consumes the battery (RA3) as a power source.

That is, as long as the electronic flash device (PL) continues to operate, the booster circuit (16) is repeatedly turned on and off in order to keep the charging voltage of the main capacitor (C2) below the voltage required for light emission. . Each time the on/off operation is performed frequently, a large amount of current is generated, and as a result, the battery (B^3) is consumed more quickly. On the other hand, even after the operation of the electronic flash bag W (PL) is stopped, the charging voltage of the main capacitor (C2) does not drop suddenly, but rather maintains a voltage relatively close to the voltage required for light emission. Therefore, by starting the operation of the electronic flash device (Fl) again, the charged N voltage of the main capacitor (C2) will be
The voltage is restored to the voltage required for light emission in an extremely short period of time.

Moreover, in order to perform a shooting operation, it is necessary to determine the n output amount and adjust the focus, and even if these were performed automatically, the main capacitor (C2
) is also possible to complete charging.

Therefore, in such a case, an electronic flash device (Fl,
) is in a state where it can start operation in response to an activation signal transferred from the camera body (CA), the power holding time is shorter than usual.

The power holding time in this case is about 3 minutes and 10 seconds because almost the same operation as in the case of interval photography is performed.

In addition, if none of the above-mentioned cases exist, that is, is it attached to the camera body (C^) which cannot transmit the activation signal to the electronic flash device (Fl), or is it attached to the electronic flash bag? If any of the operation switches (S6) to (S10) are operated when W (PL) is used alone (including when the camera body (CA) is not powered on),
Based on the determination at step (+1646), the flow from step (1) 647) onward is executed. And (1)6
In step 4B), set the counter (N) for controlling the power supply holding time.
is set to [24], so together with the 3 minutes measured in the step at (I+644), the power holding time in this case is about [15 minutes and 10 seconds].

Next, the operation in the case of count interrupt will be explained based on the flowchart of FIG. 16.

Interruption to this flow is performed every 30 seconds when count interruption is permitted after the power holding time control counter (N) is set.

When this interruption occurs, first, it is determined whether a light emission operation has been performed (1700). As mentioned above, this judgment is made at the input terminal (12) of the flash computer (12) to which the output signal from the R3-flip-flop circuit (R3I) for the light emission memory that is set when light is emitted is input. This is done by checking the status of the APOI.

If it is determined that the input terminal (APOT) is at the "L" level and no light emission operation is being performed, the process proceeds to step (1703). On the other hand, if the input terminal (APOI) is at the "H" level and it is determined that the light emitting operation has been performed, the power holding time control counter (N) is set to [30] (R701). As a result, each time a light emission operation is performed,
From that point on, the power hold time is updated to 1) 5 minutes].

Next, R3-flip-flop circuit for light-emitting memory (
1? In order to reset the output terminal (S1), after setting the output terminal (ApRI) to the "I" level for a certain period of time (1702), (1)
703).

In step (R703), the power holding time control counter (N) is counted down by "1", and then it is determined whether or not this counter (N) has reached "O" (R704). If it is determined that the counter (N) is not "0", the flash computer (12) stops. On the other hand, when it is determined that the counter (N) is "O", the output terminal (nCC) is set to the "17" level (R705).

As a result, as already mentioned, the boosting operation by the boosting circuit (16) is stopped. Subsequently, the output terminal (PWC) is set to the "I" level (1) 706). As a result, as described above, power supply to the control section (14) and display section (15) is stopped, and the operation of the electronic flash device (Fl) is stopped. The flash computer (12) then stops.

In the embodiments discussed above, the camera body (CA)
The display device (4) displays flash photography information from the electronic flash device (Fl□) using each switch (S6) to (S10).
) is displayed continuously when it is closed, but instead of this, it is also possible to display it for a certain period of time.

Next, an example thereof will be explained based on the flowchart of FIG. This flowchart is a modification of the subroutine <Display 1> called at step (R40) in the main routine of the camera computer (2).

First, with reference to FIG. 7, I would like to explain the steps that perform the same operations as the subroutine shown in Display 1>, but the same step numbers will be given and the explanation will be omitted. In this subroutine, operations that are different from the subroutine <Display 1> in the previous embodiment are performed in the flow after step (1413). In other words, wait until the charging of the main capacitor (C2) of the electronic flash device (PL) is completed in step (R41)), and display the character [FL] when charging is completed (R412). In the embodiment, the same operation as the subroutine of Roku Display 1> is performed.

Subsequently, the camera computer (2) determines the state of the display determination flag (TIF) (R413). This flag (TIF) is set when the subroutine shown below is called for the first time. If this flag (TIF) is determined to be “0”,
It is assumed that this subroutine is called for the first time, and
After resetting the display control timer (TO) (1) 41
4) Start (R415). Subsequently, after setting the display determination flag (TIF) (1416), the process returns to the main routine.

On the other hand, in step (1) 413), the display determination flag (
TTF) is determined to be “1”, (14
Proceeding to step 17), it is determined whether 2 seconds have elapsed since the display control timer (TD) was started in step (R415). If it is determined that 2 seconds have not elapsed, the process directly returns to the main routine. In addition, if it is determined that 2 seconds have elapsed, the display determination flag (TIF) should be reset (1) 41B), and a pulse signal for resetting the R8-flip-flop circuit (R53) shown in Figure 1) should be sent. Output (t1419). This ends the display. Then, return to the main routine. That is, in this case, although not shown,
It is necessary to add a signal line from the camera computer (2) to the reset terminal (R) of the R3-flip-flop circuit (R33) shown in Figure 1).

Next, still another example will be shown.

In the previous embodiment, all of the flash photography information from the electronic flash device (PL) was configured to be displayed on the display device (4) of the camera body (CA). This means that information other than that required for shooting with constant light without using PL) will be displayed, which will increase the number of display segments and complicate the circuit configuration, increasing the cost of the camera body (CA). There is a risk. Regarding the complexity of the circuit configuration, it goes without saying that the circuit itself corresponding to the display segment is becoming more complex, and the calculated values by the APEX method are
Since the data must be decoded and displayed, the number of decoders will also increase.

Further embodiments shown below make it possible to solve these problems.

In the electronic flash device (PL) in this embodiment, the switches constituting the switch group (23) are different from those in the previous embodiment. That is, the switches (Sll) to (S16) other than the display switch (SIO) are configured as status switches, and the flash photography information of the electronic flash device (PL) is displayed depending on the state of each switch (Sll) to (S16) itself. However, only the linked distance information during flash photography is displayed on the display device (4) of the camera body (CA). and,
This linked distance information is generated by using a decoder and a segment that display the aperture information, taking advantage of the fact that the data series closely matches the data series of the aperture information.
It is configured to display linked distance information.

To explain the similarity of this data series, as is well known, the aperture information of the photographing lens (+,
The F number (17N) of I, the distance between the electronic flash device (Fl, ) and the subject (+, N) as interlocking distance information, and the guide number (GN) that is the light emission amount information of the electronic flash device (PL). ), the following equation 0 holds true.

G N = F N F number (FN) as aperture information
changes by a factor of five, such as [1,4], [2], [2,8], etc. Therefore, the interlocking distance information calculated based on the 0 formula also changes by a factor of five.

Next, the configuration of the switch group (23) of the electronic flash bag ff (PL) in this embodiment will be explained using FIG. 19.

In the figure (old) and (CI) are the same diodes and capacitors as shown in FIG. 1 in the previous embodiment.

(Sll) is a light emission mode switching slide switch that indicates TTL automatic light control mode or manual light emission mode, and in the closed state T T 1. , indicates automatic light control mode, and indicates manual light emission mode when opened. (S12) and (S13) are the light emission amount (full, 1/
This is a switch whose combination of states changes depending on the setting of a light emission amount switching slide switch (not shown) indicating 2.1/4.1/8). Also, (S14), (S
15) and (316) are switches whose combination of states changes according to the set illumination angle, and the illumination angle is controlled by a dial-type illumination angle setting switch (not shown).
[rv-28■l], [fv=35sml,
[fv=50mm], []fv-70m
m].

It is configured so that it changes by l steps, such as in an automatic mode.

In addition, each of the above-mentioned switches (Sll) to (316) is
Input terminal (IPII) of flash computer (12)
).

(II'13a) , (IP13b) , (IP1
4a), (IP14b), and (TP14c), and their status signals are in turn input to the flash computer (12).

Further, (S10) has the same configuration as the normally open button type display switch explained in the previous embodiment, and in this embodiment, this display switch (S10)
By closing the camera body ((:A) display word N(
4) is configured to display linked distance information. This switch (S10) connects the input terminal (IP15) of the flash computer (12) and the interrupt input terminal (FI
NT2).

In other words, during operation of the flash computer (12), the state of the input terminal (IP15) is determined, and depending on the state, a flash display start signal (
FrlSS) or flash display end signal (FD[!
S). In addition, when the electronic flash device (PL) is attached to a camera body (CA) that cannot output a start signal to the electronic flash device (PL), and when the electronic flash device (PL) (including when the power is not turned on),
When this switch (510) is closed, an interrupt is generated at the interrupt input terminal (FINT2), causing the flash computer (12) to execute a predetermined interrupt routine.

The configuration of the electronic flash device (PL) in this example is as follows.
Except for the configuration of the double switch group (23), the configuration is exactly the same as that of the electronic flash device (Fl,) described in the previous embodiment. The execution program of the flash computer (12) is slightly modified by changing the configuration of the switch group (23). Next, only the changes will be briefly explained.

First, in the flowchart of the operation when the main switch (SM) is closed, shown in FIG. 14, (1) 501)
The type of data set in each step is different. That is,
Data on the amount of light emitted and the light emitting mode are displayed on each switch (Sll).
~(S16) Since it will be displayed in its own state, it is not set. Furthermore, the display unit data is not set because it is displayed only in meters (m).

Then, the interrupt input terminal (FINTI) shown in FIG.
In the flowchart of the operation when an interrupt occurs, (
The operation performed in step 1605) is different.

That is, in the previous embodiment, the state of each output terminal was determined based on the data initialized or changed in step (#501), but in this embodiment, the state of each input terminal is Terminal (IPII).

(IP13a) , (IPI3b) , (IP14
a) Check , (rP14h), and (IP14c) to determine the status of each switch (Sll) to (Sl6). Then, each determined switch (Sll) ~ (
Depending on the state of Sl(i), the output terminal (TTL/l'l
).

(GNS) status.

Furthermore, the subroutine of "data setting" shown in the flowchart of FIG. 17 in the previous embodiment becomes the flowchart shown in FIG. 20. In other words, to change the date and time (
1) Steps 823 to 1830) are not performed, and (
1) In step B22), set “ to the display flag (mouth TSF).
After setting "l", immediately proceed to the main routine (1) 621.
).

The flowchart other than the above-mentioned changes is the same as that described in the previous embodiment. In addition, in the previous example,
When data is changed and set, the flash display start signal (FDSS) for displaying flash photography information is always transferred to the camera body (CA), but in this embodiment, the display switch Only by pressing (310), a flash display start signal (FDSS) is transferred to the camera body (CA) and flash photography information is displayed.

Next, changes to the camera body (CA) will be explained.

First, regarding the configuration, there are changes in the content displayed by the display device (4) and the configuration of the circuit associated therewith. The circuit configuration is related to the internal hardware of the camera computer (2), so illustrations and explanations will be omitted.
The display operation will be explained using a flowchart.

FIG. 21 shows a flowchart 1 which is a modification of the <Display 1> subroutine called at step (140) of the execution program of the camera computer (2).

When this subroutine is called, (1) 31
The maximum interlocking distance value (DVma
x) and the register (AVI?) for displaying aperture information.
), the data in this register (AVR) is decoded by a decoder for displaying aperture information, and then displayed using a segment for displaying aperture information (#
451). Next, replace the character [F] that is displayed when displaying the F number as aperture information,
After displaying the character [m] indicating that the display is in meters (m) (1) 452), the process returns to the main routine.

In other words, as explained earlier, the linked distance during flash photography and the F number as aperture information are both geometric progressions with H as a multiple, so the camera body (C In the display device (4) of the camera body (CA
) to reduce the cost of the control device.

Although not shown in the figure, the <Display 2> subroutine does not display the characters [FL]. Also,
The subroutine shown in Figure 3 is exactly the same as in the previous embodiment.

Next, the liquid crystal display according to each of the above display subroutines will be explained using FIGS. 22(a) to 22(c). Second
Figure 2 (a) shows a state in which all display contents are displayed.

FIG. 22 (II) shows the display according to the subroutine of Foil Display 1>. The characters [4, Om] indicate that the maximum distance that can be photographed in conjunction with flash photography is [4,0 m]. Further, FIG. 22(C) 19 shows the display according to the subroutines of Display 2> and Display 3>. The characters [F 5.6] and [Tv6
0] indicates the control aperture value (8V) and the control exposure time value (TV).

-Since the display is configured as described above, (1) in the flowchart shown in FIG.
) 8) and (+1) 9) are not displayed to indicate completion of the automatic light control operation. In addition, since it is configured to display only the maximum interlocking distance, the minimum interlocking distance value (DVm
In), we do not perform the operation 1γ to obtain (1)313
The minimum light emission amount value (IVmin) is not set in step ) or step (13+6).

In addition, the maximum interlocking distance value at step (1) 320) (
1) To explain the calculation of Vmax), when the IsO sensitivity of the film is [100], the guide number (G
The relationship between N) and the luminescence amount value (TV) is shown in Table 4 on the next page.

Then, using the luminescence amount value (TV) shown in this table,
The maximum interlocking distance value (DVmax) mentioned above is determined. For example, if the ISO sensitivity of the film is [100] (the corresponding film speed value (SV) is [5]), the guide number (GN
) is [1)] and full flash (the corresponding maximum light output value (IVmax) is [2]), and the F number is [2,8]
(The corresponding aperture value (AV) is [3]), then DVmax = S Sea ITV-AV □ ■
By calculation based on the formula, the maximum interlocking distance value (DVIIa
x) becomes [4]. At this time, the display on the display device (4) is performed by decoding the maximum interlocking distance value (DVmax) using a method similar to the APEX method using an aperture information display decoder, as shown in FIG. 22 (1)). The corresponding characters [4.0m] are displayed.

〔Effect of the invention〕

As described above, the photographing device according to the present invention can activate the camera without performing any operation on the camera side by the setting operation by the flash photography information setting means of the electronic flash device. It is now possible to perform preparatory operations, check the aperture value and shutter speed for flash photography, etc. with simple operations.

Moreover, according to the embodiment of the present invention, by taking advantage of the fact that the setting operation by the flash photography information setting means is often performed with the intention of flash photography, this setting operation starts the boost operation of the electronic flash device. This makes it possible to shift to flash photography more quickly than when both the camera and electronic flash device are activated by an operation on the camera side.

Therefore, overall, it has become possible to start up the flash photography device when performing flash photography with a simple operation.

[Brief explanation of drawings]

The drawings show an embodiment of the photographing device according to the present invention, and FIG. 1 is a circuit diagram of the control system of the photographing device, and FIGS. 2 to 9 are flowcharts showing the operation of the control circuit of the camera body.
Figures 10 (a) to 10) are schematic diagrams showing the state of display of shooting information on the display device of the camera body, Figure 1) is a circuit diagram of the interface circuit and automatic light control circuit of the camera body, and Figure 12 The figure is a circuit diagram of the control section and switch group of the electronic flash device, and FIG. 13 is the circuit diagram of the display section of the electronic flash device.
14 to 17 are flowcharts showing the operation of the control circuit of the electronic flash device, FIG. 18 is a flowchart corresponding to FIG. 8 showing another embodiment, and FIGS. 19 to 2
2 shows yet another embodiment, FIG. 19 is a circuit diagram of a switch group of an electronic flash device, FIGS. 20 and 21 are flowcharts corresponding to FIGS. 17 and 8, respectively, and FIG.
Figures (A) to (C) are schematic diagrams showing the state of display on the display device of the camera body corresponding to Figures (A) to (C) of FIG. 10. (2)... Starting means, (12)... Setting operation detecting means, (23)... Light emission condition setting means, ([ri... Shooting Actuating device for (Fl,)・
...electronic flash device, (JM) ...connection means, (SS) ...boost start means.

Claims (2)

[Claims] (1) A camera having a starting means for starting a photographing preparation operation by a photographing actuating means, an electronic flash device having a flash photographing information setting means, and a connecting means for electrically connecting the camera and the electronic flash device. 1. A flash photography device comprising: a flash photography device, wherein the electronic flash device is provided with a setting operation detection means for outputting a starting signal to the starting means in response to a setting operation by the flash photography information setting means. (2) The flash photography device according to claim 1, wherein the electronic flash device is provided with a boost start means for starting a boost operation in response to a setting operation by the flash photography information setting means.