JPS60190070U - Printed board - Google Patents

Printed board

Info

Publication number
JPS60190070U
JPS60190070U JP7772184U JP7772184U JPS60190070U JP S60190070 U JPS60190070 U JP S60190070U JP 7772184 U JP7772184 U JP 7772184U JP 7772184 U JP7772184 U JP 7772184U JP S60190070 U JPS60190070 U JP S60190070U
Authority
JP
Japan
Prior art keywords
land
conductive layer
printed board
hole
periphery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7772184U
Other languages
Japanese (ja)
Inventor
安福 比登司
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP7772184U priority Critical patent/JPS60190070U/en
Publication of JPS60190070U publication Critical patent/JPS60190070U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図及び第2図は本考案の一実施例を示し、第1図は
部分平面図、第2図は断面図、第3図及び第4図は参考
例を示すための第1図相当図である。 図面中、1は基板、2は孔、3はランド、4は導電層の
非形成部、5はソルダレジストである。
1 and 2 show one embodiment of the present invention, FIG. 1 is a partial plan view, FIG. 2 is a sectional view, and FIGS. 3 and 4 are equivalent to FIG. 1 for showing reference examples. It is a diagram. In the drawings, 1 is a substrate, 2 is a hole, 3 is a land, 4 is a portion where no conductive layer is formed, and 5 is a solder resist.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板に形成したリード線挿通用の孔の周囲に導電層によ
りランドを形成し、該ランドに溶融半田を付着させるよ
うにしたものにおいて、前記孔の周縁の一部から前記ラ
ンドの外周側に向って途中部位まで延びる導電層の非形
成部を形成し、ソルダレジストを前記導電層の非形成部
を覆うよう設けたことを特徴とするプリント基板。
In a device in which a land is formed using a conductive layer around a hole for inserting a lead wire formed in a board, and molten solder is attached to the land, from a part of the periphery of the hole toward the outer periphery of the land. What is claimed is: 1. A printed circuit board characterized in that a part where a conductive layer is not formed extends to a part of the way, and a solder resist is provided to cover the part where the conductive layer is not formed.
JP7772184U 1984-05-24 1984-05-24 Printed board Pending JPS60190070U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7772184U JPS60190070U (en) 1984-05-24 1984-05-24 Printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7772184U JPS60190070U (en) 1984-05-24 1984-05-24 Printed board

Publications (1)

Publication Number Publication Date
JPS60190070U true JPS60190070U (en) 1985-12-16

Family

ID=30621046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7772184U Pending JPS60190070U (en) 1984-05-24 1984-05-24 Printed board

Country Status (1)

Country Link
JP (1) JPS60190070U (en)

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