JPS60188858A - Effective value meter - Google Patents

Effective value meter

Info

Publication number
JPS60188858A
JPS60188858A JP4400584A JP4400584A JPS60188858A JP S60188858 A JPS60188858 A JP S60188858A JP 4400584 A JP4400584 A JP 4400584A JP 4400584 A JP4400584 A JP 4400584A JP S60188858 A JPS60188858 A JP S60188858A
Authority
JP
Japan
Prior art keywords
effective value
period
converter
sampling
measured signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4400584A
Other languages
Japanese (ja)
Inventor
Osami Asai
浅井 修身
Setsuo Arikawa
有川 節夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4400584A priority Critical patent/JPS60188858A/en
Publication of JPS60188858A publication Critical patent/JPS60188858A/en
Pending legal-status Critical Current

Links

Landscapes

  • Measurement Of Current Or Voltage (AREA)

Abstract

PURPOSE:To measure the effective value of an AC distorted wave in a short time by making the measured signal directly to numerical data and calculating the effective value by arithmetic operation. CONSTITUTION:An effective value meter is constituted mainly of an A/D converter 12 and a CPU14 that controls the converter and fetches in output signals. The CPU14 outputs sweep data successively to a D/A converter 3, and at the same time, detects pulse signals of a maximum value detecting circuit 8 and registers a measured signal constituting period to a built-in memory, and calculates a measured signal period tecm. Then, the number of times of sampling is determind by dividing the period tecm by sampling period tCLK and this is used after increasing it by integer times to improve the accuracy of measurement. The specified number of times of sampling is made by a sampling circuit consisting of a converter 12, sample hold circuit 10 and a delay circuit 11, and measured signals are recorded in a memory as a numerical value data string. Gain correction of an amplifier for a gain adjusting 9 is made by operating the numerical value data and the effective value of a measured signal Vrms is obtained.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は生産ラインにおけるIC等の電気特性検査に係
り、特に交流ひずみ波実効値を高速計測する実効値メー
タに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to the inspection of electrical characteristics of ICs and the like in a production line, and particularly to an effective value meter that measures the effective value of AC distorted waves at high speed.

〔発明の背景〕[Background of the invention]

ビデオ帯域をカバーする従来の実効値メータは熱電対を
使用しているため、811I足時間が長い欠点かあった
。すなわち測定電流で熱電対の接点を加熱し、この温度
上昇により熱を対に発生する直流起電力を濁定する方法
のため、接点か熱平衡に至るに要する安定時間かあり、
測定時間は長かった。市販品の応答時間は1.5〜7秒
(モデル3400A : YHP 、モデル93:ブン
トン。
Conventional effective value meters that cover the video band use thermocouples, which has the disadvantage of taking a long time to measure the 811I. In other words, the measurement current heats the thermocouple contacts, and this temperature rise causes heat to be generated in the pair.This method uses a method to stabilize the DC electromotive force, so there is a stabilization time required for the contacts to reach thermal equilibrium.
The measurement time was long. The response time of commercially available products is 1.5 to 7 seconds (Model 3400A: YHP, Model 93: Bunton.

モデル8920A:フレーク)程腋であり、生産ライン
用笑効値メータとしては測定時間か長く不適当であった
Model 8920A: flake) was not suitable as a production line effective value meter, and the measurement time was long.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、交流ひずみ波実効値を短時間で計測可
能な実効値メータを提供することにある。
An object of the present invention is to provide an effective value meter that can measure the effective value of AC distorted waves in a short time.

〔発明の概埜〕[Outline of the invention]

従来は電気量を熱量に変えて実効値換算し、熱電対で再
び電気量にもどすため応答時間が長。
Conventionally, the amount of electricity was converted to heat, converted to an effective value, and then converted back to the amount of electricity using a thermocouple, which required a long response time.

い欠点かあった。これに対し本発明はADCで電気量を
直接、数値データに変換した後、演算処理で実効値を゛
めるため、熱への変換か必要なく、上記従来技術の欠点
を釉継できる。また周波数分析の手法により被測定11
.1号周期tecm〔発明の実施例〕 パルス信号を出す極大値検出回路、9はCPU出力電圧
値を入力、固定し出力するサンプル・は遅延回路11か
らのCLKで8/HIO出力信号: k S−(T)を
数値データ:DIiに変換するADC113はAI)C
12出力データ:DIiを入力として入力データの自乗
か出力データ:DOiとなる今、周波数成分Fp、Fq
およびFrから成る被ン定信号の実効値をめるものとす
る。フロー−ヤードを第2図に示す。動作は被測定信号
同J: 、t ecrnをめる第1ステツプ(#1〜#
9と実効値: t rmsをめる第2ステツプ(#1〜
+ 14 )から成る。タイムチャートを第3図番示す
There were some drawbacks. On the other hand, the present invention directly converts the amount of electricity into numerical data using an ADC and then calculates the effective value through arithmetic processing, so there is no need to convert it into heat, and the drawbacks of the prior art described above can be overcome. In addition, using the frequency analysis method,
.. No. 1 period tecm [Embodiment of the invention] Maximum value detection circuit that outputs a pulse signal, 9 inputs and fixes the CPU output voltage value, and outputs a sample 8/HIO output signal with CLK from the delay circuit 11: k S - ADC113 that converts (T) into numerical data: DIi is AI)C
12 Output data: The square of the input data with DIi as input, or the output data: DOi Now, the frequency components Fp, Fq
and Fr. The flow yard is shown in Figure 2. The operation is the first step (#1 to ##) of measuring the signal to be measured.
9 and effective value: Second step to calculate t rms (#1~
+14). The time chart is shown in Figure 3.

引データ: Dui %D AC3へ逐次出力し、同F
これを検知したとき、当該被測定信号構成周〕:tiを
内蔵するエントリテーブル〔メモ+JAii=l〜n)
〕に登録し、被測定信号周期;ecmを計算する。
Reference data: Dui %D Sequentially output to AC3, same F
When this is detected, the relevant measured signal configuration frequency]: Entry table with built-in ti [Memo + JAii = l to n)
] and calculate the measured signal period; ecm.

第4図は掃引データ:D″t+−1+ D A C3出
力1圧、同じ(VC04入力端子:rj、VCO4j振
周波数:fIならびに当該被測定信号構成周j:tiの
1対1対応関係を示す。
Figure 4 shows the one-to-one correspondence of sweep data: D''t+-1+ D A C3 output 1 voltage, same (VC04 input terminal: rj, VCO4j vibration frequency: fI and the relevant measured signal configuration frequency j: ti) .

第5図はエンI−IJテーブルを示す。以下、1+11 一」 ) 当i −」 を 柾。FIG. 5 shows the EnI-IJ table. Below, 1+11 one" ) I -” of Masaru.

5 1 3 い状態&ゴゐりんない。従って、記録なきときは測定不
可でありトラブル処理する。#9で上記の当該周期:t
iの最小公倍数周期t ecmを算出する。
5 1 3 Bad condition & no goirin. Therefore, if there is no record, measurement is not possible and troubleshooting is required. The above period in #9: t
Calculate the least common multiple period t ecm of i.

第3図の時刻TsからVCO4発振周波数の掃引を開始
する。時刻’rl)l’I’QおよびTrで極大値検出
回路8パルス信号が検出されるので、エントリテーブル
のメモリA1に当該構成周期”ptメモ1JA2に同周
期” Q +そしてメモ1JA3に同周期:trを記録
する。時刻Teで掃引を完了し、第1ステツプを終える
Sweeping of the VCO 4 oscillation frequency is started from time Ts in FIG. Since the maximum value detection circuit 8 pulse signal is detected at time 'rl)l'I'Q and Tr, the corresponding configuration period is stored in memory A1 of the entry table as "pt Same period as memo 1JA2" Q + and same period as memo 1JA3 :Record tr. The sweep is completed at time Te, ending the first step.

第2ステツプ 初めに第6図によりA D C12゜8
/HIQおよび遅延回路11から成るサンブリンク回路
の動作を述べる。CPU14は時刻T1でCLK−i立
上げ11“とじてサンプリング動作開始1をADC12
、S/HIO等に指示する。S/HICはCLK立上り
時の入力信号値:k r (’I’1)i捕えこの値を
固定して出力する。一方、遅延回路11を経由したCL
Kは遅れて時刻T2で立上り′1“となりADC12へ
印加される。ADC12は時刻T2のCLKを受けて変
換終了信号(以下、EOCと略す)を立下げCPU14
へ変換開始を知らせると同時に上記アナロタ値kr(T
t)のディジタル変換を開始する。時刻T3でADC1
2はディジタル変換を終了し、′BOCを立上げてCI
) U14へ変換終了を知らせる。CPU14は上記変
換終了を受けつけると同時にCLKを立下げ′0“とす
る。ADC12出力データはマトリックス回路13人力
データ:DIiであるから、その出力データ:DOiは
アナロタ値k F (TI)の自乗に等しい。CPU1
4はCLKを立下げた後、上記出力データ:DOi を
メモ1JBiに記録する。
2nd step First, according to Figure 6, ADC12°8
The operation of the sunblink circuit consisting of /HIQ and delay circuit 11 will now be described. At time T1, the CPU 14 starts the sampling operation 1 by raising the CLK-i 11" and outputs the signal to the ADC 12.
, S/HIO, etc. The S/HIC captures the input signal value: k r ('I'1)i at the rising edge of CLK, fixes this value, and outputs it. On the other hand, CL via the delay circuit 11
K later rises to '1'' at time T2 and is applied to the ADC 12. Upon receiving CLK at time T2, the ADC 12 lowers the conversion end signal (hereinafter abbreviated as EOC) to the CPU 14.
At the same time, the above analog value kr(T
Start the digital conversion of t). ADC1 at time T3
2 completes the digital conversion, starts up 'BOC, and turns on CI.
) Notify U14 of completion of conversion. At the same time as the CPU 14 receives the completion of the conversion, it lowers the CLK to '0''. Since the ADC 12 output data is the matrix circuit 13 manual data: DIi, the output data: DOi is the square of the analog value k F (TI). Equal.CPU1
4 records the above output data: DOi in the memory 1JBi after falling CLK.

以上で第1回目のサンブリンクは終了であり、引続き時
刻T4から第2回目のサンブリンクを1始する。同様に
時刻T4以後の各部動作は第1回目の繰返しであり、時
刻Tt−T4がサンブリンク周期t CLKである。以
下、詳説する。
This is the end of the first Sunblink, and the second Sunblink is subsequently started from time T4. Similarly, the operation of each part after time T4 is the first repetition, and time Tt-T4 is the sunblink period t CLK. The details will be explained below.

第2図の410はサンプリング回数:Sをめる。Sは最
小公倍数周期:tecmiザンブリング周期: t c
LKで除してめ、測定精度を高めるためこれを正整数倍
して用いる。#11は連続S同サンブリンクを行ない、
被測定信号を数値データ列としてメモリBiに記録する
。メモリBiを第7図に示す。#12は上記数値データ
の加算平均:v75−算出する。#13は加算平均:テ
の平方根をめる。#14はAMP9利得:にの補正を行
ない被測定信号実効値: r rmsを得る。
410 in FIG. 2 indicates the number of sampling times: S. S is the least common multiple period: tecmi Zumbling period: t c
Divide by LK, and multiply this by a positive integer to increase measurement accuracy. #11 performs consecutive S same sunblinks,
The signal to be measured is recorded in the memory Bi as a numerical data string. The memory Bi is shown in FIG. #12 calculates the additive average of the above numerical data: v75. #13 is the additive average: Calculate the square root of Te. #14 corrects the AMP9 gain to obtain the effective value of the signal under measurement: r rms.

第3図の時刻Te以後CPU14は最小公倍数周期: 
t ecmとサンブリンク回数:Sをめ、時刻TI、T
48丈で連続8回のサンブリンクを実行する。引続き加
算平均値ニア、平方根、7そして実効値: r rms
をめて表示し、時刻Tfですべての測定を完了する。
After time Te in FIG. 3, the CPU 14 operates at the least common multiple period:
t ecm and number of sunblinks: S, time TI, T
Perform 8 consecutive sunblinks with 48 lengths. Continue adding average value near, square root, 7 and rms value: r rms
All measurements are completed at time Tf.

以上まとめて測定の全所要時間は時刻TsよりTf才で
である。
In summary, the total time required for the measurement is Tf longer than time Ts.

本実施例はビデオ帯域(DC〜6MHz)信号の測定を
対象とし、VCO発振周波数掃引範囲を20〜3’OM
Hz、 I Pフィルタ通過周波数ヲ20MHzサンブ
リンク周期: t CLKを10 秒に設定した本実施
例ではランプ電圧発生器としてDACを用いCP Uで
匍」御したことにより、ランプ電圧をディジタル化して
CP Uに読込覧せるためのS/HとADCが不要とな
り、回路の簡単化小形化、低価格化か災現できた。また
AIIPにより被測定信号の利得調整を行ったことによ
りA I) Cの入力レンジを最大、有効に利用でき、
8ビツトながら高速ADCで±0.4%程度の測定精度
を確保できた。さらにマトリックス回路の使用で自乗波
′JLを代行し、測定時間の短縮を図った結果、測定時
間は従来比の70%まで短縮できた。
This example targets the measurement of video band (DC to 6MHz) signals, and the VCO oscillation frequency sweep range is 20 to 3'OM.
Hz, IP filter passing frequency: 20 MHz Sunblink period: t In this example, where CLK is set to 10 seconds, a DAC is used as the lamp voltage generator and is controlled by the CPU, so that the lamp voltage is digitized and output from the CPU. The S/H and ADC for reading and viewing on the U are no longer required, making the circuit simpler, smaller, and cheaper. In addition, by adjusting the gain of the signal under test using AIIP, the input range of AI can be used to its fullest and most effective.
Despite being 8-bit, we were able to secure a measurement accuracy of approximately ±0.4% using a high-speed ADC. Furthermore, by using a matrix circuit to replace the square wave 'JL, the measurement time was reduced by 70% compared to the conventional method.

〔発明の効果〕〔Effect of the invention〕

本発明によれば被測定信号を直接数値データ化し、演算
処理により実効値を算出するため、熱伝対による実効値
算出法に比して測定時間を短縮できる。さらに上記数値
データ取込み時間を被測定信号周期の贅数倍に設定する
ため、1周期にわたって数値データを均等に得ることか
でき、上記データ取込み時間を理論的最短時間まで短縮
して測定でき、測定の高速化がはかれる。
According to the present invention, since the signal to be measured is directly converted into numerical data and the effective value is calculated through arithmetic processing, the measurement time can be shortened compared to the effective value calculation method using a thermocouple. Furthermore, since the numerical data acquisition time is set to a multiple of the period of the signal to be measured, numerical data can be obtained evenly over one cycle, and the data acquisition time can be shortened to the theoretical minimum time for measurement. The speed can be increased.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例のブロック図、第2図はフロ
ーチャート図、第3図はタイムチャート図、第6図はサ
ンプリング動作の詳細タイムチャート図、第4図は掃引
データ、VCO,、発振周波数ならひに被測定信号構成
周期の対応関係説明図、第5図はエントリーテーブルの
内容説明図、第7図はメモ1JBiの内容説明図である
。 1・・・被1++定信号 4・・・■CO5・・・ミキ
サ 8・・・極大値検出回路12・・・A’DC13・
・・マトリックス回路14・・・CPU 劾 1 図 第2Il!l 躬3図 vJ4図 第5図 第7図
Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a flow chart, Fig. 3 is a time chart, Fig. 6 is a detailed time chart of sampling operation, Fig. 4 is a sweep data, VCO, FIG. 5 is an explanatory diagram of the contents of the entry table, and FIG. 7 is an explanatory diagram of the contents of memo 1JBi. 1...Target 1++ constant signal 4...■CO5...Mixer 8...Local maximum value detection circuit 12...A'DC13.
...Matrix circuit 14...CPU 1 Figure 2Il! l Figure 3 v Figure 4 Figure 5 Figure 7

Claims (1)

【特許請求の範囲】[Claims] 1、 アナログ・ディジタル変換器と、該アナログ・デ
ィジタル変換器を匍制御してその出力信号を取込む手段
を備えた計算機から成り、被測定信号を前記アナログ・
ディジタル変換器でディジタル変換して得たn個の時系
列数値データζこ対して演界処理を実行するブロクラム
を内蔵し、被1111定信号実効値を得ることを特徴と
する実効値メータ。
1. It consists of an analog-to-digital converter and a computer equipped with means for controlling the analog-to-digital converter and capturing its output signal, and converts the signal under measurement into the analog-to-digital converter.
An effective value meter characterized in that it has a built-in block for performing field processing on n time-series numerical data ζ obtained by digital conversion with a digital converter, and obtains an effective value of a 1111 constant signal.
JP4400584A 1984-03-09 1984-03-09 Effective value meter Pending JPS60188858A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4400584A JPS60188858A (en) 1984-03-09 1984-03-09 Effective value meter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4400584A JPS60188858A (en) 1984-03-09 1984-03-09 Effective value meter

Publications (1)

Publication Number Publication Date
JPS60188858A true JPS60188858A (en) 1985-09-26

Family

ID=12679586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4400584A Pending JPS60188858A (en) 1984-03-09 1984-03-09 Effective value meter

Country Status (1)

Country Link
JP (1) JPS60188858A (en)

Similar Documents

Publication Publication Date Title
JPH0447269B2 (en)
US6242900B1 (en) System for measuring partial discharge using digital peak detection
US8280667B2 (en) Test apparatus, performance board and calibration board
JPS6335149B2 (en)
CN108287300B (en) Method and device for measuring junction temperature of insulated gate field effect transistor in working state
JPS60188858A (en) Effective value meter
JPH11202003A (en) Rms converter, method and apparatus for measuring rms of power line signal at high rate
JPH04105073A (en) Measuring device for effective value
WO1992021984A1 (en) Apparatus for measuring average value of impulsive signal
JPH0339270B2 (en)
JP3314843B2 (en) AC measuring device
JPS60188860A (en) Effective value meter
JP2000284008A (en) Frequency measuring method and device
JPH07128084A (en) Measured data memory
JPH0339263B2 (en)
JP3284145B2 (en) PLL synchronous measuring device
Tankeliun et al. Hybrid time-base for sampling oscilloscope
JPH08114636A (en) Jitter measuring circuit
JP5455776B2 (en) Current measuring device
JP2002090393A (en) Input circuit for measuring instrument
JP5454913B2 (en) High precision arbitrary waveform signal generator
JPH0430551B2 (en)
TW200411151A (en) Digital controlled pyro-electric sensing signal sampling circuit
JP3496936B1 (en) Inspection system for semiconductor device with analog-to-digital (AD) converter
JPH0430550B2 (en)