JPS60183822A - 最尤誤り訂正回路 - Google Patents

最尤誤り訂正回路

Info

Publication number
JPS60183822A
JPS60183822A JP3986384A JP3986384A JPS60183822A JP S60183822 A JPS60183822 A JP S60183822A JP 3986384 A JP3986384 A JP 3986384A JP 3986384 A JP3986384 A JP 3986384A JP S60183822 A JPS60183822 A JP S60183822A
Authority
JP
Japan
Prior art keywords
maximum likelihood
error correction
circuit
burst
storage areas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3986384A
Other languages
English (en)
Japanese (ja)
Other versions
JPH026255B2 (enExample
Inventor
Gakuo Atsugi
岳夫 厚木
Hideo Suzuki
秀夫 鈴木
Masato Tajima
田島　正登
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
NTT Inc
Original Assignee
Toshiba Corp
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Nippon Telegraph and Telephone Corp filed Critical Toshiba Corp
Priority to JP3986384A priority Critical patent/JPS60183822A/ja
Publication of JPS60183822A publication Critical patent/JPS60183822A/ja
Publication of JPH026255B2 publication Critical patent/JPH026255B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
JP3986384A 1984-03-02 1984-03-02 最尤誤り訂正回路 Granted JPS60183822A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3986384A JPS60183822A (ja) 1984-03-02 1984-03-02 最尤誤り訂正回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3986384A JPS60183822A (ja) 1984-03-02 1984-03-02 最尤誤り訂正回路

Publications (2)

Publication Number Publication Date
JPS60183822A true JPS60183822A (ja) 1985-09-19
JPH026255B2 JPH026255B2 (enExample) 1990-02-08

Family

ID=12564803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3986384A Granted JPS60183822A (ja) 1984-03-02 1984-03-02 最尤誤り訂正回路

Country Status (1)

Country Link
JP (1) JPS60183822A (enExample)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS542614A (en) * 1977-06-03 1979-01-10 Western Electric Co Method of and device for reducing interference between signals

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS542614A (en) * 1977-06-03 1979-01-10 Western Electric Co Method of and device for reducing interference between signals

Also Published As

Publication number Publication date
JPH026255B2 (enExample) 1990-02-08

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