JPS60182176A - Manufacture of amorphous silicon solar battery - Google Patents
Manufacture of amorphous silicon solar batteryInfo
- Publication number
- JPS60182176A JPS60182176A JP59036074A JP3607484A JPS60182176A JP S60182176 A JPS60182176 A JP S60182176A JP 59036074 A JP59036074 A JP 59036074A JP 3607484 A JP3607484 A JP 3607484A JP S60182176 A JPS60182176 A JP S60182176A
- Authority
- JP
- Japan
- Prior art keywords
- amorphous silicon
- film
- substrate
- silicon solar
- solar cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910021417 amorphous silicon Inorganic materials 0.000 title claims abstract description 35
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 11
- 239000010935 stainless steel Substances 0.000 claims abstract description 11
- 229910001220 stainless steel Inorganic materials 0.000 claims abstract description 11
- 238000005530 etching Methods 0.000 claims abstract description 9
- 239000002952 polymeric resin Substances 0.000 claims description 11
- 229920003002 synthetic resin Polymers 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 5
- 230000007547 defect Effects 0.000 abstract description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- 230000006866 deterioration Effects 0.000 abstract description 4
- 238000005268 plasma chemical vapour deposition Methods 0.000 abstract description 3
- 229910052681 coesite Inorganic materials 0.000 abstract description 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 2
- 239000000377 silicon dioxide Substances 0.000 abstract description 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 2
- 238000004544 sputter deposition Methods 0.000 abstract description 2
- 229910052682 stishovite Inorganic materials 0.000 abstract description 2
- 229910052905 tridymite Inorganic materials 0.000 abstract description 2
- 238000000059 patterning Methods 0.000 abstract 2
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(III) oxide Inorganic materials [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 abstract 1
- 239000002120 nanofilm Substances 0.000 abstract 1
- 239000010408 film Substances 0.000 description 43
- 230000000694 effects Effects 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000001771 impaired effect Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 244000175448 Citrus madurensis Species 0.000 description 1
- 235000017317 Fortunella Nutrition 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
- H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
- H01L31/03921—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は非晶質シリコン太陽電池の製造方法に係わシ、
特に非晶質シリコン膜上に成膜される上部電極のパター
ン形成方法に関するものである。[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a method for manufacturing an amorphous silicon solar cell.
In particular, the present invention relates to a method for forming a pattern of an upper electrode formed on an amorphous silicon film.
一般に、非晶質シリコンからなる太陽電池の基板として
は、透光性ガラス板もしくはステンレス板材が多くの優
れた特徴を有していることから、近年ではその主流とな
っている。−万、非晶質シリコンを用いた太陽電池はセ
ル１個当りで螢光打丁で得られる開放電圧が約０．７
Ｖ前後であり、この太陽電池を例えば電卓等の電源とし
て用いた場合、少なくとも３個以上のセルを直列接続す
る必要がある。通常、基板としてガラス板を用いた場合
は、表面が平滑であり、かつ十分な絶縁性を有している
ため、このガラス基板上に直列接続構造の太陽電池を形
成することは極めて容易である。Generally, in recent years, transparent glass plates or stainless steel plates have become mainstream as substrates for solar cells made of amorphous silicon because they have many excellent features. - Solar cells using amorphous silicon have an open circuit voltage of about 0.7 per cell that can be obtained with a fluorescent knife.
When this solar cell is used as a power source for a calculator, for example, it is necessary to connect at least three or more cells in series. Normally, when a glass plate is used as a substrate, the surface is smooth and has sufficient insulation properties, so it is extremely easy to form solar cells with a series connection structure on this glass substrate. .
しかしながら、最近では可撓性基板を用いた太陽電池の
要求が高まり、この場合、上述したガラス基板の使用は
不可能である。そこで、可撓性基板としてステンレスフ
ィルムや高分子樹脂膜を用いは電極、非晶質シリコン膜
等をマスクを用いて形成する必要がある。しかしながら
、マスクにょシパターシを形成すると、電極間の短絡や
欠陥等の電気的特性を損ねるという問題があった。However, recently there has been an increasing demand for solar cells using flexible substrates, and in this case it is impossible to use the above-mentioned glass substrate. Therefore, when a stainless steel film or a polymer resin film is used as a flexible substrate, it is necessary to form electrodes, an amorphous silicon film, etc. using a mask. However, when a mask pattern is formed, there is a problem in that electrical characteristics are impaired, such as short circuits and defects between electrodes.
そのため、この対策として既に本発明者等により可撓性
かつ耐熱性を有するマスクに高分子樹脂膜を塗布し、こ
のマスクを使用して上部電極等のパターンを形成するこ
とによって前述した短絡および欠陥等の発生の少ない非
晶質シリコン太陽電池を製造する方法が提案されている
。Therefore, as a countermeasure to this problem, the inventors have already coated a flexible and heat-resistant mask with a polymer resin film, and used this mask to form patterns for the upper electrode, etc., thereby preventing the short circuits and defects mentioned above. A method of manufacturing an amorphous silicon solar cell that causes less occurrence of such problems has been proposed.
−
［発明の目的〕
本発明は、前述した欠点に鑑みてなされたものであり、
前述した本発明者等の既出願とは異なる非晶質シリコン
太陽電池の製造方法に係るもので、その目的とするとこ
ろは、上部電極形成時に生じる欠陥、短絡等の発生を防
止し、電気的特性の低下を抑制した非晶質シリコン太陽
電池の製造方法を提供することにある。- [Object of the invention] The present invention has been made in view of the above-mentioned drawbacks, and
This relates to a method for manufacturing an amorphous silicon solar cell that is different from the previous application filed by the present inventors, and its purpose is to prevent defects, short circuits, etc. that occur during the formation of the upper electrode, and to prevent electrical An object of the present invention is to provide a method for manufacturing an amorphous silicon solar cell that suppresses deterioration of characteristics.
このような目的を達成するために本発明は、町癲性かつ
耐熱性を有する基板上に非晶質シリコン膜形成後、上部
電極を全面拠成膜し、この上に反射防止膜を所望の上部
電極パターン形状にマスク成膜した後に上部電極をこの
反射防止膜をマスクとしてエツチングしてパターン形成
するものである。In order to achieve such an object, the present invention involves forming an amorphous silicon film on a substrate that is flexible and heat resistant, then forming an upper electrode over the entire surface, and then coating a desired anti-reflection film thereon. After forming a mask film in the shape of an upper electrode pattern, the upper electrode is etched using the antireflection film as a mask to form a pattern.
次に図面を用いて本発明の実施例を詳細に説明する。 Next, embodiments of the present invention will be described in detail using the drawings.
第１図は本発明による非晶質シリコン太陽電池の製造方
法の一例を説明するだめの非晶質シリコン太陽電池の要
部平面図であり、第２図はそのＩ−■′断面図である。FIG. 1 is a plan view of a main part of an amorphous silicon solar cell for explaining an example of the method for manufacturing an amorphous silicon solar cell according to the present invention, and FIG. 2 is a sectional view taken along the line I-■'. .
これらの図において、まず、可撓性かつ耐熱性を有する
例えば板厚的１００μｍのステンレス基板１の上面に耐
熱性を有する高分子樹脂膜２を厚さ約５μ０１程度に形
成する。この場合、基板１０表面を樹脂膜２との接着性
の観点から処理してもよい。また樹脂膜２の形成方法と
しては、液状の樹脂をスピンナー、スプレーもしくはデ
ィップ法により一様に塗布し、これを約３５０°Ｃ程度
の温度で焼成して形成する。次にこの樹脂膜２上にマス
クを介してステンレスをスパッタしてＷＡＮ約２０００
λ程度の下部電極３ａ、 ３ｂ、 ３ｃ、 ３ｄをそれ
ぞれ所定間隔幅で形成する。次にこれらの各下部電極３
ａ、 ３ｂ、 ３ｃ、 ３ａが形成された高分子樹脂膜
２上にプラズマＣＶＤ法によシ、基板ｌの温度約２５υ
°ＣでＲ’＋’または”＋’＋ｐの順に非晶質シリコン
膜４を形成し、さらにこの非晶質シリコン膜今上にマス
ク金柑いず全面にｌｎ２ Ｕ３を約８００λの厚さにス
パッタリングして後述する上部電極と々る透明導電膜を
形成する。次にこの透明導電膜上の前記各下部電極３ａ
、 ３ｂ、 ３ｃ、 ３ｄと対向する上面にマスクを用
いてＳｉＯ２を約２０００＾の厚さにスパッタリングし
て反射防止膜としての５ｉ（Ｊ２膜６ａ＋ ６ｂ＋ ６
ｃ、 ６ｄを形成する。次に非晶質シリコン膜今上に全
面均一に成膜された透明導電膜を゛、前記ＳｉＯ２膜６
ａ、 ６ｂ。In these figures, first, a heat-resistant polymer resin film 2 is formed to a thickness of approximately 5 μm on the upper surface of a flexible and heat-resistant stainless steel substrate 1 having a thickness of, for example, 100 μm. In this case, the surface of the substrate 10 may be treated from the viewpoint of adhesion to the resin film 2. The resin film 2 is formed by uniformly applying a liquid resin using a spinner, spraying, or dipping method, and baking it at a temperature of about 350°C. Next, stainless steel was sputtered on this resin film 2 through a mask and the WAN was approximately 2000.
Lower electrodes 3a, 3b, 3c, and 3d of approximately λ are formed at predetermined intervals. Next, each of these lower electrodes 3
A, 3b, 3c, and 3a are formed on the polymer resin film 2 by plasma CVD at a temperature of about 25υ of the substrate l.
An amorphous silicon film 4 is formed in the order of R'+' or "+'+p" at °C, and ln2 U3 is sputtered to a thickness of about 800λ on the entire surface of the mask kumquat on this amorphous silicon film. Then, a transparent conductive film is formed which covers the upper electrode, which will be described later.Next, each of the lower electrodes 3a on this transparent conductive film is formed.
, 3b, 3c, and 3d using a mask to sputter SiO2 to a thickness of about 2000^ to form 5i (J2 film 6a+6b+6) as an antireflection film.
c, forming 6d. Next, a transparent conductive film is formed uniformly over the entire surface of the amorphous silicon film.
a, 6b.
６ｃ、 ６ｄをマスクとしてエツチングすることにより
、上部電極５ａ＋ ５ｂ＋ ５ｃ、 ５ａをそれぞれパ
ターン形成して４個直列接続された非晶質シリコン太陽
電池を完成する。この場合、４個の非晶質シリコン太陽
電池の相互の接続は各上部電極５ａ＋ ５ｂ＋ ５ｃ、
５ｃｌの電極パターンの形成と同時に形成され、また
、上部電極５ｄの一端部と下部電極３ａの一端部には出
力眠圧取り出し用の端子５ｄ′、３ａ′がそれぞれ形成
されている。By etching using 6c and 6d as masks, upper electrodes 5a+5b+5c and 5a are patterned, respectively, thereby completing four amorphous silicon solar cells connected in series. In this case, the mutual connections of the four amorphous silicon solar cells are each upper electrode 5a+ 5b+ 5c,
Terminals 5d' and 3a' for taking out the output sleep pressure are formed at one end of the upper electrode 5d and one end of the lower electrode 3a, respectively.
このような製造方法によれば、非晶質シリコン膜今上に
マスクを用いて上部電極５ａ、 ５ｂ、 ５ｃ、 ５ｄ
を形成する代りにエツチングでパターン形成する場合上
部電極マスクにより非晶質シリコン膜４およびＦ部電極
３ａ、 ３ｂ、 ３ｃ、 ３ｄに生じる傷および欠陥が
減少するので、太陽電池の特性が損なわれることがなく
、長期間にわたって約２００ｔｕｘの螢光打丁において
、約２．８Ｖの開放電圧と約１８μＡの灯絡電流が得ら
れた。なお、この場合、セル１個（受光面積１ ｃｖｉ
ｌ ）当りの開放電圧は約０．７０Ｖであり、セル間の
短絡による損失は全く生じなかった。−また、上部＠極
５ａ、 ５＋）、 ５ＣＩ ５ｄをエンｆ ７グで形成
することにより、初期特性での歩留りは平均６０チで最
高９０％となるとともに、パターン相互間の短絡が皆無
となり、電気的特性の低下も全く発生しなかった。また
、−ヒ部′嘔惟５ａ、’５ｂ、 ５ｃ、 ５ｄのパター
ンである５ｉｔＪｚ膜６ａ、 ６ｂ、 （５ｃ、 ６ｄ
のマスクの大きさは、下部電極３ａ、 ３ｂ、 ３ｃ、
３ｄの大きさよりも小さくする必要はなく、むしろ大
きくした方が短絡に至る場は軽減ざＩしるので効果的で
ある。さらにパターン形成された５ｉ（Ｊｚ膜６ａ、
６ｂ、 ６Ｃ＋ ６ａは、透明導電膜のエツチングの際
に耐え得るだけの緻密な膜でなければならず、膜厚は５
００Å〜ｌ ｐａｎの範囲が望ましい。ここで５００
入以［では、マスクとしての機能が不十分となり、１μ
ｍ以上では膜剥れを生じる恐れがある。特性、生産性等
を考慮すれば１０００人〜５０００ ”ｈの膜厚が最適
である。さらに、マスクとして用いる反射防止模はＳｉ
Ｕ□についてのみ説明したが、これに限定されるもので
なく、透光性の絶縁膜でかつ上部電極のエツチングに耐
えるものであればよく、例えばＭ２Ｏ１，８１３Ｎ４等
でも同様の効果が得られる。また、成暎法もスパッタに
限らず、真空蒸着、プラズマＣＶＤ、イオンブレーティ
ング等でもさしつかえない。そして、下部電極材料もス
テンレスに限定さ！しるものでなくエツチング液による
腐食、耐薬品性が問題となった場合、シリサイド系の材
料を使用することが好ましく、ステンレスと同等の効果
が得られる。According to such a manufacturing method, the upper electrodes 5a, 5b, 5c, 5d are formed using a mask on the amorphous silicon film.
If a pattern is formed by etching instead of forming a pattern, the upper electrode mask reduces scratches and defects that occur in the amorphous silicon film 4 and the F part electrodes 3a, 3b, 3c, and 3d, so that the characteristics of the solar cell are not impaired. An open circuit voltage of about 2.8 V and a light circuit current of about 18 μA were obtained in a fluorescent lamp of about 200 tux over a long period of time without any irradiation. In this case, one cell (light receiving area 1 cvi
The open circuit voltage per cell was approximately 0.70 V, and no loss occurred due to short circuit between cells. -Also, by forming the upper @poles 5a, 5+) and 5CI 5d with engraving f7, the yield in the initial characteristics is up to 90% with an average of 60 chips, and there is no short circuit between patterns. No deterioration of electrical characteristics occurred at all. In addition, 5itJz membranes 6a, 6b, (5c, 6d
The sizes of the masks are as follows: lower electrodes 3a, 3b, 3c,
It is not necessary to make the size smaller than 3d; in fact, it is more effective to make it larger because the field that leads to a short circuit will be reduced. Furthermore, patterned 5i (Jz film 6a,
6b, 6C+ 6a must be a dense film that can withstand the etching of the transparent conductive film, and the film thickness is 5
A range of 00 Å to l pan is desirable. 500 here
In this case, the function as a mask becomes insufficient, and 1μ
m or more, there is a risk of film peeling. Considering characteristics, productivity, etc., a film thickness of 1,000 to 5,000 h is optimal.Furthermore, the antireflection pattern used as a mask is made of Si.
Although only U□ has been described, it is not limited thereto, and any film may be used as long as it is a light-transmitting insulating film and can withstand etching of the upper electrode. For example, the same effect can be obtained with M2O1, 813N4, etc. Furthermore, the deposition method is not limited to sputtering, and may also be vacuum evaporation, plasma CVD, ion blating, or the like. And the lower electrode material is also limited to stainless steel! If the problem is not corrosion due to etching liquid or chemical resistance, it is preferable to use a silicide-based material, which can provide the same effect as stainless steel.
また、前記実施例において、非晶質シリコン膜を形成す
る可撓性かつ耐熱性を有する基板として、板厚約１００
μＩｎのステンレス基板を用いた場合について説明した
が、本発明はこれに限定されるも１００μＦＢＩの金属
基板、例えばｒｅ−Ｎｉ合金板または高分子樹脂膜とし
て例えばポリイミド系のカプトン（商品名）を用いた場
合においても前述と全く同様の効果が得られた。また、
これらの基板の厚さも特に１００μｍに限定されるもの
ではない。In the above embodiment, the flexible and heat-resistant substrate on which the amorphous silicon film is formed has a thickness of approximately 100 mm.
Although the case where a μIn stainless steel substrate is used has been described, the present invention is not limited to this, but a 100μFBI metal substrate, such as a re-Ni alloy plate or a polyimide Kapton (trade name) as a polymer resin film, is used. The same effect as described above was obtained even in the case where Also,
The thickness of these substrates is not particularly limited to 100 μm either.
また、前記実施例において、基板上に形成する高分子樹
脂薄膜は、約５μｍの厚さに形成した場合について説明
したが、この膜厚は基板の板厚によっても異なるので、
概略０．１〜１００μｍの範囲で形成すれば良い。この
場合、膜厚は０．１μｍ以下では絶縁性が得られず、１
００μｍ以上となると、折９曲げたときに膜剥れが生じ
ることから、この膜厚は０．１〜１００μｍの範囲が良
く、さらには、膜特性。Furthermore, in the above embodiment, the case where the polymer resin thin film formed on the substrate was formed to have a thickness of about 5 μm was explained, but since this film thickness varies depending on the thickness of the substrate,
The thickness may be approximately 0.1 to 100 μm. In this case, if the film thickness is less than 0.1 μm, insulation cannot be obtained;
If the thickness is 0.00 μm or more, the film will peel off when it is bent. Therefore, the film thickness should preferably be in the range of 0.1 to 100 μm, and furthermore, the film properties may be affected.
生産性等の点から考慮して２〜１０μｍの範囲が最適で
ある。In view of productivity and the like, a range of 2 to 10 μm is optimal.
以上説明したように本発明によれば、非晶質シリコン膜
、電極を形成する可撓性かつ耐熱性を有する基板上に作
製される非晶質シリコン膜の上部電極をエツチングによ
り形成することによシ、上部電極形成時に生じる欠陥、
短絡の発生が皆無となり、電気的特性の経時劣化を確実
に抑制することができるので、信頼性の高い、高品質、
高性能の非晶質シリコン太陽電池が歩貿シ良く得られる
という極めて優れた効果が得られる。As explained above, according to the present invention, the upper electrode of the amorphous silicon film produced on the flexible and heat-resistant substrate on which the amorphous silicon film and electrode are formed is formed by etching. However, defects that occur during the formation of the upper electrode,
This eliminates the occurrence of short circuits and reliably suppresses deterioration of electrical characteristics over time, resulting in highly reliable, high quality,
An extremely excellent effect is obtained in that a high-performance amorphous silicon solar cell can be easily obtained in trade.
第１図は本発明による非晶質シリコン太陽電池の製造方
法の一例を説明するための非晶質シリコン太陽電池の要
部平面図、第２図は第１図のＩ −■断面図である。
１・・・拳ステンレス基板、２・拳・・高分子樹脂膜、
３ａ、３ｂ、３ｃ、３ｄ ・ｏｓｓ下部電極、３ａ・・
・拳端子、４・・・・非晶質シリコン膜、５ａ。FIG. 1 is a plan view of a main part of an amorphous silicon solar cell for explaining an example of the method for manufacturing an amorphous silicon solar cell according to the present invention, and FIG. 2 is a sectional view taken along line I-■ in FIG. 1. . 1...Fist stainless steel substrate, 2.Fist...polymer resin film,
3a, 3b, 3c, 3d ・oss lower electrode, 3a...
- Fist terminal, 4...Amorphous silicon film, 5a.
Claims (1)
形成された下部電極と、前記下部電極上に形成された非
晶質シリコン膜と、前記非晶質シリコン膜上に形成され
た上部電極とを少なくとも備えた非晶質シリコン太陽電
池において、前記非晶質シリコン膜の上面全面に前記上
部電極となる金属膜を積層し、さらにこの金属膜上の所
定位置に反射防止膜を形成した後にこの反射防止膜をマ
スクとして前記金属膜をエツチングして上部電極を形成
することを特徴とした非晶質シリコン太陽電池の製造方
法。 ２、前記基板は表面に高分子樹脂膜を有するステンレス
板としたことを特徴とする特許請求の範囲第１項記載の
非晶質シリコン太陽電池の製造方法。 ３、 前記基板は高分子樹脂板としたことを特徴とする
特許請求の範囲第１項記載の非晶質シリコン太陽電池の
製造方法。 ４、前記基板は、表面に高分子樹脂膜を有する高分子樹
脂板としたことを特徴とする特許詞求の範囲第１項記載
の非晶質シリコン太陽電池の製造方法。[Claims] 1. A flexible and heat-resistant substrate, a lower electrode formed on the substrate, an amorphous silicon film formed on the lower electrode, and the amorphous silicon. In an amorphous silicon solar cell having at least an upper electrode formed on a film, a metal film serving as the upper electrode is laminated on the entire upper surface of the amorphous silicon film, and a metal film is further laminated at a predetermined position on the metal film. 1. A method of manufacturing an amorphous silicon solar cell, comprising forming an anti-reflection film on the surface of the substrate, and then etching the metal film using the anti-reflection film as a mask to form an upper electrode. 2. The method of manufacturing an amorphous silicon solar cell according to claim 1, wherein the substrate is a stainless steel plate having a polymer resin film on its surface. 3. The method of manufacturing an amorphous silicon solar cell according to claim 1, wherein the substrate is a polymer resin plate. 4. The method for manufacturing an amorphous silicon solar cell according to claim 1, wherein the substrate is a polymer resin plate having a polymer resin film on its surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59036074A JPS60182176A (en) | 1984-02-29 | 1984-02-29 | Manufacture of amorphous silicon solar battery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59036074A JPS60182176A (en) | 1984-02-29 | 1984-02-29 | Manufacture of amorphous silicon solar battery |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60182176A true JPS60182176A (en) | 1985-09-17 |
Family
ID=12459589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59036074A Pending JPS60182176A (en) | 1984-02-29 | 1984-02-29 | Manufacture of amorphous silicon solar battery |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60182176A (en) |
-
1984
- 1984-02-29 JP JP59036074A patent/JPS60182176A/en active Pending
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