JPS60181075U - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS60181075U
JPS60181075U JP6873984U JP6873984U JPS60181075U JP S60181075 U JPS60181075 U JP S60181075U JP 6873984 U JP6873984 U JP 6873984U JP 6873984 U JP6873984 U JP 6873984U JP S60181075 U JPS60181075 U JP S60181075U
Authority
JP
Japan
Prior art keywords
integrated circuit
hybrid integrated
circuit device
electrical components
external connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6873984U
Other languages
Japanese (ja)
Inventor
長廻 茂
志田 征也
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP6873984U priority Critical patent/JPS60181075U/en
Publication of JPS60181075U publication Critical patent/JPS60181075U/en
Pending legal-status Critical Current

Links

Landscapes

  • Molten Solder (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図aは本考案の一実施例を示す構成図、第1図すは
第1図aの側面図、第2図aは従来装置を示す構成図、
第2図すは第2図aの側面図である。 1・・・混成集積回路基板、2・・・チップ形セラミッ
クコンデンサ、3・・・膜抵抗素子、4・・・膜導体、
5・・・外部接続端子、6・・・外部接続端子用電極、
7・・・はんだ槽、10・・・絶縁性衝立板。
FIG. 1a is a block diagram showing an embodiment of the present invention, FIG. 1 is a side view of FIG. 1a, and FIG. 2a is a block diagram showing a conventional device.
Figure 2 is a side view of Figure 2a. DESCRIPTION OF SYMBOLS 1... Hybrid integrated circuit board, 2... Chip type ceramic capacitor, 3... Film resistance element, 4... Film conductor,
5... External connection terminal, 6... External connection terminal electrode,
7... Solder bath, 10... Insulating screen plate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 混成集積回路基板に搭載された電気部品の外部接続端子
用電極をはさんだ槽に浸し、該電極に外部接続端子をは
んだ付けする混成集積回路装置において、はんだ槽の液
面と電気部品との間を隔離する絶縁性衝立板を電気部品
と電極との間に設けたことを特徴とする混成集積回路装
置。
In a hybrid integrated circuit device in which electrodes for external connection terminals of electrical components mounted on a hybrid integrated circuit board are immersed in a bath sandwiching them, and external connection terminals are soldered to the electrodes, the temperature between the liquid level of the solder bath and the electrical components is A hybrid integrated circuit device characterized in that an insulating screen plate is provided between an electrical component and an electrode to isolate the electrical components.
JP6873984U 1984-05-11 1984-05-11 Hybrid integrated circuit device Pending JPS60181075U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6873984U JPS60181075U (en) 1984-05-11 1984-05-11 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6873984U JPS60181075U (en) 1984-05-11 1984-05-11 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS60181075U true JPS60181075U (en) 1985-12-02

Family

ID=30603761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6873984U Pending JPS60181075U (en) 1984-05-11 1984-05-11 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS60181075U (en)

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