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Fujitsu Ltd
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Fujitsu Ltd
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Publication date
Application filed by Fujitsu LtdfiledCriticalFujitsu Ltd
Priority to JP3580284ApriorityCriticalpatent/JPS60179846A/ja
Publication of JPS60179846ApublicationCriticalpatent/JPS60179846A/ja
Publication of JPH0235331B2publicationCriticalpatent/JPH0235331B2/ja
Processing of memory access exceptions along with prefetched instructions within the instruction pipeline of a virtual memory system-based digital computer
Single-chip pipeline processor for fetching/flushing instruction/data caches in response to first/second hit/mishit signal respectively detected in corresponding to their logical addresses