JPS6017931Y2 - Ultra high frequency transistor oscillator - Google Patents

Description

[Detailed explanation of the invention] This invention is an I
This relates to a feedback type oscillator.

As a method of configuring an oscillator using a TR, there is a method of maintaining oscillation by controlling the phase and amplitude from the output terminal of the TR to the input terminal and feeding back ultra-high frequency power.

As a method based on this principle, for example, a configuration as shown in FIG. 1a is adopted, and TR
A matching circuit 2.2' is provided on the input side and the output side of 1.

In such a circuit configuration, the feedback loop and the input/output matching circuit must be designed at one time, and it is not possible to easily correct deviations from design values due to variations in element characteristics or parasitic reactance.

Furthermore, in this configuration, the entire circuit is designed using the small signal S parameter of the TR, which causes significant inconvenience in optimizing the circuit as an oscillator, which essentially operates with a large signal.

In addition, the size and length of the feedback circuit itself becomes large, which causes feedback not only in the desired band but also in the low frequency band, causing spurious oscillations and jumps in the oscillation frequency, and increasing noise. It was also accompanied by

Another feedback method is to perform ultra-high frequency coupling between a first terminal pair and a second terminal pair of transistors constituting a two-terminal pair circuit by a feedback circuit having an admittance Y1=jBi. It is conceivable to provide admittance Y2=JB2 in one of the pair part and the second terminal pair part.

B1. As for the value of B2, the combination of B1 and B2 that provides the maximum oscillation output can be easily determined by using the transistor characteristics of the field effect transistor and the equivalent circuit.

When using, for example, a Schottky barrier field effect transistor as the field effect transistor, it is advantageous to use the gate and source as the first terminal pair and the drain and source as the second terminal pair.

At this time, the input admittance looking into the -th terminal pair is dominated by the barrier capacitance of the Schottky barrier between the gate and the source, so it is capacitive.

For this reason, B1 needs to have a negative value, and admittance Y□ forming the feedback circuit needs to be inductive.

Conventionally, the method of connecting the emitter and collector or emitter and base of bipolar transistors with a simple capacitor, which is often used at low frequencies, is not suitable for microwave band oscillators using field effect transistors as described above. Cannot be hired.

In order to eliminate the above-mentioned drawbacks, this invention provides a feedback circuit consisting of the minimum necessary elements, that is, a series connection of only a strip line and a capacitance, and furthermore, Reactance circuit (
Alternatively, an output matching circuit (or output matching circuit) is provided in the second terminal pair portion, and the object is to provide an oscillator with a simple configuration and easy to design a large signal circuit.

An ultra-high frequency field effect transistor oscillator, which is an embodiment of this invention, will be described below with reference to the drawings.

FIG. 2 shows a field effect transistor (hereinafter abbreviated as FET) chip and a feedback circuit provided on a metal plate.

An alumina ceramic substrate 3 having an opening in the center is used as a heat sink and is brazed onto a metal plate 4 which also serves as a ground electrode.

A FET chip 5 having source, gate and drain electrodes is brazed to a metal plate 4 in an opening of an alumina ceramic substrate 3.

The source electrode 6 is grounded to the metal plate 4, ie, the ground electrode, through a metal film 6' applied to the surface and side surfaces of the FET chip.

On the alumina ceramic substrate 3, a feedback circuit and PE
Strip lines 7, 7' forming part of the T input/output circuit are formed by vapor deposition, electrodeposition and photolithography, and a capacitive element 8 is connected on the strip lines.

One electrode of the capacitive element 8 is soldered directly onto the strip line 7, and the other electrode is connected to the strip line 7' by a bonding wire 9.

A gate electrode 10 and a drain electrode 11 on the FET chip 5 are connected to strip lines 7 and 7' by bonding wires 10' and 11', respectively.

The following procedure is used to design the reactance circuit and output matching circuit.

First, as shown in Figure 2, the FET chip and FET
Two terminals A of the circuit (within the dotted line in Figure 3) including a feedback circuit designed and manufactured based on the S-parameter of the chip,
B is a variable matching circuit 12.12 as shown in Figure 3.
', Bias circuit that supplies DC power to the FET 13.1
The matching circuits 12 and 12' are adjusted so that the ultra-high frequency output to the 50Ω transmission line at the desired frequency at the output end C is maximized.

Next, f of the reactance circuit consisting of 12.13 as seen from A.

Measure the impedance 4 at C, and connect a 500 non-reflective termination to C, and f of the output matching circuit consisting of 12' and 13' as seen from B.

Measure the impedance at.

Based on this measurement result, an oscillator as shown in FIG. 4 is constructed.

In other words, the impedance seen from A' is f.

A reactance circuit including a gate bias circuit as shown in FIG. 21 is constructed on an alumina ceramic substrate 14 whose back surface is metallized by a strip line 15 and a chip capacitor 16 for ultra-high frequency bias.
Also, when a 50Ω non-reflection termination is connected to output terminal C', B
Impedance f as seen from '.

including a drain bias circuit such as 4 in odor;
The output matching circuit is constructed by a strip line 18 and a chip capacitor 19 for blocking direct current on an alumina ceramic substrate 17 whose back surface is metallized.

Finally, for the circuit including the feedback circuit and FET chip as shown in Figure 2 (within the dotted line in Figure 4), A, A', and B
An oscillator is constructed by electrically connecting B' and B'.

When operating the oscillator, connect points F and G to the metallized back surface of the alumina ceramic substrate 14.17 and the metal plate 3, and apply a negative voltage to point D and a positive voltage to point E. Ultrahigh frequency output is taken out from the output terminal C' to the 50Ω transmission line.

Since the oscillator obtained by this invention has the above structure, the negative resistance region of the oscillator is determined by the length of the strip line as an inductive element and the size of the capacitive element, which also serves as a direct current cutter. It is almost determined by the oscillation frequency, and there is no spurious oscillation, and oscillation with a clean spectrum can be obtained.

In addition, at each stage of configuring the oscillator, we measure the S parameters of a single FRT chip, design and manufacture a three-terminal element consisting of an FET chip and feedback loop, and measure its S parameters. Since the procedure of quantity optimization can be taken, optimization of the oscillator during large signal operation becomes extremely easy.

In addition, in the explanation of the above embodiment, the case was described in which ultra-high frequency output is taken out from the drain side, but depending on the characteristics of the FET chip, it may be necessary to provide an output matching circuit on the gate side and a reactance circuit on the drain side. Needless to say, there are cases where this happens.

Furthermore, it is obvious that this invention can be applied not only to FETs with a grounded source electrode, but also to FETs with a grounded gate and a grounded drain.

[Brief explanation of drawings]

FIG. 1a shows an example of the configuration of a conventional transistor oscillator, where 1 is a transistor and 2 and 2' are matching circuits. FIG. 1 is a drawing showing another construction method, in which the transistor 2' is a matching circuit. FIG. 2 shows a field effect transistor chip and a feedback circuit provided on a metal plate to explain an embodiment of this invention, where 3 is an alumina ceramic substrate, 4 is a metal plate, and 5 is an electric field transistor chip. transistor chip, 6 is the source electrode,
6' is a metal film, 7°7' is a strip line, 8 is a capacitance, 10 is a gate electrode, 11 is a drain electrode, 9.1
0.11 indicates a bonding wire. Also, A and B in the figure are the two terminals of this circuit. Figure 3 shows a measurement circuit for designing reactance circuits and output matching circuits, and the dotted lines are field effect transistor chips and feedback circuits provided on a metal plate as shown in Figure 2. is a variable matching circuit, 13.13'
is a bias circuit. Further, C in the figure is a terminal that takes out the output to a 50Ω transmission line. FIG. 4 shows a plan view of an oscillator that is an embodiment of this invention, and the dotted lines in the figure are the field effect transistor chip and feedback circuit provided on the metal plate shown in FIG.
4.17 is an alumina ceramic substrate, 15.18 is a strip line, and 16.19 is a chip capacitor. Also, A' in the figure. B' is a terminal F connected to A and B respectively, G is a grounded terminal, D and E are terminals for applying DC voltage, and C is a terminal for taking out super high frequency output to a 50Ω transmission line.

Claims (1)

[Scope of utility model registration request] The drain terminal of the first terminal pair and the gate terminal of the second terminal pair of the field effect transistors constituting the two-terminal pair circuit are ultra-high frequency coupling, and an output matching circuit is provided in one of the first terminal pair part and the second terminal pair part, and a reactance circuit is provided in the other terminal pair part, respectively, outside the feedback circuit. An ultra-high frequency transistor oscillator featuring