JPS6016715A - Transversal filter - Google Patents

Abstract

PURPOSE:To obtain a characteristic as designed by driving a shift register having M-tap by a clock having a frequency being N-times that of an input signal and reading an ROM with a tap output at the interval of (N-1) and adding the read results so as to omit a phase shift circuit and an analog adder circuit. CONSTITUTION:A clock having a frequency four times that of an input data at a signal input terminal 2 is applied to a terminal 10 and one input data is stored in four registers. Thus, an address input of each ROM is changed by the input speed of the data and the operating speed of the ROM can be as much as the speed of the input data. A signal shifted by 1/4 period of the input data is inputted sequentially to ROMs 6a-6d and a sampled value at each 1/4 period of the input data having a desired impulse response stored in each ROM is read. This is added by a full adder 12, converted into an analog signal at a DA converter 7 and outputted though a low pass filter 9.

Description

[Detailed Description of the Invention] This invention is based on an example (spectrum shaping of a digital signal).
This applies to transversal filters used for waveform shaping.

<Prior art> Conventionally, the iTf circuit of a binary transversal filter has been constructed with a resistor network, but as a means to improve coverage, a memory circuit such as a ROM (read only memory) and a D/F circuit have been used. A construction method as shown in FIG. 1, in which the A converter is substituted, has become known. That is, two clocks of digital signal data from the Hakuzuki input terminal 2 are sequentially input into the shift register 5 by one clock pulse from the clock input terminal 1. The clock information from clock terminal 1 is 1 at a frequency A that is more than twice the maximum frequency of input data.
It is ゜. Eight ROMs 6 are output using the output of each tap (/foot stage) of the soft register 5 as an address, and the R
The output of OM 6 is DA = analogue at converter 7;
, j;, and furthermore, harmonic components are removed by a low-pass filter 9 and outputted to an output terminal 3. If j is the current tap output in the transversal filter, '5,
i'i'I see that
C weight (-j weight 71?, these weights (; j weight circuit output is analog 1111 element '4- Ljl lj each 'Jll '9 pieces, depending on the contents of nft register 5 and the addition output 1.1-1 of ROM 6, which addresses the inner ear of the / throat / sufu 5 so that
The addition output of the m-region ITjy and Nizo is the digital 111, and the ROM 6 requires 2 words, assuming that the number of tuffs in the shift register 5 is M, and jt l, b, The hill h; becomes large and becomes 1, and the clock speed of the clock end +' 1 causes the bladder 1 of ROM6 to become 1.
Since it is necessary to perform J-f L, a ROM 6 with a high operating speed and large capacity is required, which is expensive.

During this time, a special application was made in 1984 to decide on JF i > II.
1.82150+:, r l ・Rance Versal Filter" was proposed. The stiffness versatile filter is the second
As shown in 1￥1 ((-In order to reduce the capacity of the memory circuit (ROM) and not increase the operating speed of the element,
Tsukuda input ☆; 1" 11 The data input to child 2 is distributed into 4 series and output to the register, and on the other hand, the clock of clock terminal 1 (g is +T
/2 phase shift R'5 4 a + 4 1) , 4 C sequentially shifts the π/2 phase, and four clock signals having different phases on these π/2 sides are applied to the valley shift registers 5a to 5.
ROMs 6a to 6 are designed to provide desired spectral characteristics.
d respectively, and these tax outputs are respectively DA.
It is converted into an analog signal by conversion d57a to 7d, and output boosting circuit 8 of these four series DA converters 7a to 7d
After analog addition is applied and harmonics are removed by a low-pass filter 9, a desired waveform is obtained at the output terminal 3.

Since this circuit configuration requires a multiphase clock signal (in the case of the 21st part, a four-phase clock signal of π/2*J¥=), the phase shifters 4a to 4C are essential elements. In addition, if the phase shifters 4a to 4C have a bad degree (a), the sampling time will shift, so the weighting coefficients that are optimally weighted will change isometrically and Φ, resulting in a waveform as designed. Obtaining the response characteristics becomes difficult.

Furthermore, analog addition of the four series by the adder circuit 8 is an innovation characteristic (9: and resistance accuracy), which includes the problem of deteriorating the synthesized waveform. The purpose of the memory circuit is to reduce the amount of noise and reduce the operating speed of the element, and to create waveform response characteristics that are 8" wide without the need for a phase shifter or an analog add-on circuit. It is possible to easily obtain a T7i transver length filter.

According to this invention, the clock frequency S'< of N(
(N - 1) (15
1-1... False 102 attacks (lVi/N pieces) tag Deba with 1 scabbard and 1~, 11f' 1st J Tanofu each 1-re/koN
By the tap output of yo II, N (Ii.iσ] no seven times j,!? .;The appearance has changed, its υ11 ;1-Deno Jrt I
) Due to A conversion gain, φ, - imitation, 1 to analog 1h'
Shiru 7.

- No bfii l Tari> This 'easily applied f11' is 1MB" using a 36-tap /ft register driven at a clock frequency 824 times that of the input digital signal, An explanation will be given of the sunshade to be used. Fig. 3 shows an example of this.
The same reference numerals are used for parts corresponding to those in Figure 2.

A clock signal of four times the repetition frequency of the input data of the signal input terminal 2 is inputted to the clock input terminal 1o, and the shift register 11 of IVI (36) taps is shifted by this clock signal. of shift register 11 (
N-1), in this example every 13th (M/N=9)
) is set as one set of tap blades, and N is sequentially shifted by l taps.
=4 sets of tag outputs are supplied to N=4 ROMs 6a to 6d, respectively. That is, the shift register 11's shift registers SR1, SR5, SR9---SR3. M) Each output is input to ROh 6a, /foot stage S R 2 ,
SR6, SR10,---SR34 each output cover ROM6bK is input, /foot stage SR3
, SR7, SR1.1, --... SR35 are inputted to ROM6c, and each output of shift stage SR4, SR8, SR12, --SR36 is inputted to ROM6d. is input. These I-1 0
+ν■ (each of i il ~ 6fJ) (Hino l- output is whole egg f) 8z12 and 7jiJ14 IL1 all 1 all no Jτ
7f: 'i I 2 ty) addition oak', D A B
: *Transformed into analog signal Y signal by device 7 and passed to band pass filter 01'1.6 level 11 3, It OM 6
a to 6d input data C) It operates at 7q or 4 times the clock frequency e of the other part 1d input booter.

This section: 3rd section V (shown in Figure 4 of the transversal filter 1) operating principle 1r, 1, Fig. 4 1 to 1) 0. Since the digital signal input to the -1 input terminal 2 is shifted at a clock frequency of 4fc which is multiplied by I:N (= 4) and taken into the ivy 11, each tap output receives 1, l:N times (tessellation). 17 of f1-, bow or hail 1, therefore ROM6a~1moO]\/16d input changes with a period of 'I'('= i/ f c )
11J - The operating speed 1α of each ROM is the clock frequency ``(・iJ is 1, and for each ROM 6a to 6d, it is 1゛/
4z-) -4' it fv signal is input next to IIr+. As shown in FIG. 4, the ROIVI 6 a to RO power has a digital signal of bits at a period T, shifted by T/4! For the 1111th hail, bring them to Imaka'
When the El units 1-2 perform digital addition, a digital signal with a period of T/4 and a maximum of +2 bits is obtained. In this way, the output of the clock frequency T is 4.
A high-speed, large-capacity ROM (ROM6 in Fig. 1) that has an address of M (= 36) bits
) is equivalent to heavy υ cropping.

51a is an example in which the basic circuit shown in FIG. 3 is applied to spectrum shaping of multilevel No. 48, and parts corresponding to t=J as in FIG. 3 are given the same reference numerals. A binary signal (A is input from the input terminal 20 to the shift register 110 with the clock signal of the clock terminal 10, and is combined with the binary digital signal of the input terminal 2 to form a four-value digital signal. As in the case of Fig. 3, the tap output is for each (N-1) ROM60a to 60
d. ROiVl 60 a ~ 60 d
is added to the outputs of the ROMs 6a to 6d by the full adder 12. ROIFF shows the weight of ROM60a-60d
6 a to 6 d Te (7) Make it 1/2 of the curvature, or make the weight of the cursor only (= J ke completely 1? ,
for ROM 6 a to 6 d (7J) addition] 1
Output by adding even 1f! A-7'-3 is subjected to spectrum shaping from the digital signals from the Lj""j input terminals 2 and 2o, and a four-valued signal 11 is applied thereto. It is obvious that if this configuration is developed, it will be possible to easily perform spectrum shaping even for multivalued signals. .

Note that IVI/N does not necessarily have to be an integer,
If this is not an integer, one or more of the plurality of ROMs to be used will have fewer inputs than the other ROMs.

As explained above, in this invention, in a binary transversal fill in which a J:M tap soft register is serially υJ at a clock frequency of N times, it has an address of Δ4/N. Since a weighting synthesis circuit can be constructed with N pieces of ROM of small capacity δ, a full adder, and a DA converter, it is possible to construct a weighting synthesis circuit using N pieces of ROM of small capacity δ, a full adder, and a DA converter. 9. No phase shifter is required compared to a binary transversal filter configured with a lead filter. It has advantages such as being able to perform the process as a digital signal without deterioration due to phase or difference, no deterioration due to custom-designed impedance of one force applying circuit, and being suitable for LSI implementation. In addition, there is an advantage that increasing the number of soft registers, ROMs, and all-encompassing devices can be easily applied to spectrum shaping of multilevel signals.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a conventional binary transversal filter that has been digitized, Fig. 2 is a block diagram 1y1 showing a proposed binary transversal filter, and Fig. 3 is a block diagram showing a binary signal according to the present invention. FIG. 4 is a time chart showing the operating principle of FIG. 3, and FIG. 5 is a block diagram showing the configuration of a binary transversal filter to which the present invention is applied and which obtains a quaternary code. FIG. 1: Kurosoku person Kashiji1i child, 2: Communication > y input terminal,
3: Output terminal, 4a-41]: π/2 phase shifter, 5a-5
d: M/4 tap shift register, 6.6a to 6d,
60a-60b: ttoM,. 7a to 7d: I) A converter, 8: Analog addition circuit, 9
: Low-pass filter, 10: N-multiplied clock signal input 911h, 11: M (36) tap shift register, 12: Added Q4 unit. ! 1″Jπ1 Applicant from Japan, Bakakiwako and 1-Representative Person Kusano Naka 2t71 叉7I72 Figure 3 Figure 1

Claims (1)

[Claims] (1) Binary Q"--Digital No. 13 is input, and its input is the clock frequency number (N times 1/D (N is 2
(an integer less than or equal to 1), and drives multiple (M) taps to 41
A transformer consists of a soft register that connects the valley tap, a weighting circuit that adds the output of each tap with a weight, and a low-pass filter connected to its output side. In the barzal filter, 1) The report is the synthesis circuit 1.'1, (N-1) I [61 years old...KinoF'! zuλ'I (8/I / N j solid) tuff 1
11 inputs 11 threads 11 7.111f'j Input the outputs of N sets of taps shifted by 1 knob in i, and the number of peaks in i.
N memory circuits, an adder that adds the outputs of these memory circuits, and a D/A converter that requires the same number of human inputs as the output of the full adder. I. Lansbar, Khanilk, who recommended this.