JPS60165010A - Circuit board for slide contact - Google Patents
Circuit board for slide contactInfo
- Publication number
- JPS60165010A JPS60165010A JP2043284A JP2043284A JPS60165010A JP S60165010 A JPS60165010 A JP S60165010A JP 2043284 A JP2043284 A JP 2043284A JP 2043284 A JP2043284 A JP 2043284A JP S60165010 A JPS60165010 A JP S60165010A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- glass layer
- resistor
- slide contact
- circuit pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011521 glass Substances 0.000 claims description 17
- 230000003746 surface roughness Effects 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 2
- 238000007639 printing Methods 0.000 claims description 2
- 238000010304 firing Methods 0.000 description 8
- 239000004020 conductor Substances 0.000 description 5
- 238000007650 screen-printing Methods 0.000 description 3
- 238000011156 evaluation Methods 0.000 description 2
- 230000007774 longterm Effects 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
- Manufacture Of Switches (AREA)
- Contacts (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
(発明の利用分野)
本発明は、ポテンショメータ、スイッチ等のよ(従来技
術およびその問題点)
一般にポテンショメータ等においては、セラミック基板
上に、抵抗体ペーストを印刷・焼成して抵抗体ヲ形成し
ている。この従来のポテンショメータ用の回路板の表面
粗さを示したのが第1図で、同図から明らかなように基
板表面がそもそも2〜3μm前後の荒れをもっているも
のに、10数μm厚で抵抗体を形成すると、抵抗体表面
は最大云ピークと最服谷との比較において7〜’i3p
m程度の差を生じる上に、3〜4μm前後の凹凸が連続
して生じる。従ろて、この抵抗体上を摺接する摺動接点
(マルチ接触片等)は高速・長期使用において摩耗し易
い上、接触圧もバラツキ易く、信頼性に欠けるものであ
り、例えば250万サイクル(1サイクルとは摺動接点
が抵抗体上を1往復することを言う)の寿命試験を側底
クリアできるものではなかった。[Detailed Description of the Invention] (Field of Application of the Invention) The present invention is applicable to potentiometers, switches, etc. (prior art and problems thereof) Generally, in potentiometers, etc., a resistor paste is printed and fired on a ceramic substrate. A resistor is formed. Figure 1 shows the surface roughness of this conventional circuit board for potentiometers.As is clear from the figure, the board surface has roughness of around 2 to 3 μm to begin with, but a resistor with a thickness of 10-odd μm is used. When the resistor surface is formed, the resistor surface has a 7~'i3p in comparison between the maximum peak and the highest peak.
In addition to a difference of approximately 3 m, irregularities of approximately 3 to 4 μm are continuously formed. Therefore, the sliding contacts (multi-contact pieces, etc.) that slide on the resistor are likely to wear out during high-speed, long-term use, and the contact pressure also tends to vary, making them unreliable. For example, after 2.5 million cycles ( (One cycle means that the sliding contact moves back and forth over the resistor once.) It was not possible to pass the life test on the bottom side.
(発明の目的)
本発明は上記の点に鑑み成されたもので、その目的とす
るところは、表面が平滑な摺動接点用の回路パターンを
もつ回路板を提供することにより、寿命の向上、接触信
頼性の向上を企るにある。(Objective of the Invention) The present invention has been made in view of the above points, and its object is to improve the lifespan by providing a circuit board having a circuit pattern for sliding contacts with a smooth surface. The aim is to improve contact reliability.
(発明の概要)
本発明はこの目的を達成するために、基板上に表面が鏡
面となったガラス層を形成し、該ガラス層上に摺動接点
が摺接する回路パターンを形成したことを特徴とする。(Summary of the Invention) In order to achieve this object, the present invention is characterized in that a glass layer with a mirror surface is formed on a substrate, and a circuit pattern on which a sliding contact slides is formed on the glass layer. shall be.
(発明の実施例)
第2図は本発明の1実施例に係るポテンショメータ用の
回路板の概要断面図を示している。Embodiment of the Invention FIG. 2 shows a schematic cross-sectional view of a circuit board for a potentiometer according to an embodiment of the invention.
同図において、1はアルミナセラミックから成る板厚1
.0謹程度の基板で、その表面は前記した従来構成と同
等の表面粗さとなっている。2は基板1上に形成した1
0〜20μm厚のガラス層で、該実施例においては約1
5pffl厚に設定されている。In the same figure, 1 is a plate thickness 1 made of alumina ceramic.
.. The substrate has a roughness of about 0.000, and its surface has a surface roughness equivalent to that of the conventional structure described above. 2 is 1 formed on substrate 1
A glass layer of 0-20 μm thick, in this example about 1
The thickness is set to 5pffl.
上記カラス層2は、 5iQ2、PbO,B2O3を含
有したガラスペーストをスクリーン印刷で所定厚さに塗
゛匪した後、焼成して溶剤をとばして形成したもので表
面が鏡面となっている。このカラス層2の鏡面化度合は
その焼成温度、成分に太き(依存し、発明者は種々検討
の結果、上記成分のガラスペーストで、一定の焼成条件
を採った時に、摺動接点用回路板として好適な鏡面とな
ることを見出した。The glass layer 2 is formed by applying a glass paste containing 5iQ2, PbO, and B2O3 to a predetermined thickness by screen printing, and then firing it to remove the solvent, and has a mirror surface. The degree of mirror polishing of the glass layer 2 depends on its firing temperature and components (depending on the firing temperature, and after various studies, the inventor found that when using glass paste with the above components and under certain firing conditions, the sliding contact circuit It has been found that the mirror surface is suitable for use as a board.
即ち、上記ガラス層2の軟化温度は約750℃であり、
焼成温度を750℃、790℃、830℃、850℃、
870℃とした時の外観および実用性の評価を示した第
3図から明らかなように、焼成温度が850℃、870
℃である時が表面が鏡面で実用性に耐える。(ここで、
第3図で○で示した評価は前記250万サイクルの寿命
を完全にクリアするという意味の実用性を満たすことを
示し、△は○より劣る、×は実用性なしの評価をそれぞ
れ示している。)よって、前記軟化温度より100℃程
度以上高い焼成温度でガラス層2を焼成することが必要
であり、この条件を44足した時にはガラス層2の表面
は第4図の如く全くの平滑状態となる。That is, the softening temperature of the glass layer 2 is about 750°C,
The firing temperature is 750°C, 790°C, 830°C, 850°C,
As is clear from Figure 3, which shows the evaluation of appearance and practicality at 870°C, the firing temperature was 850°C, 870°C.
℃, the surface is mirror-like and suitable for practical use. (here,
In Figure 3, the evaluation indicated by ○ indicates that the practicality is satisfied in the sense of completely clearing the above-mentioned 2.5 million cycle life, △ indicates that it is inferior to ○, and × indicates that there is no practicality. . ) Therefore, it is necessary to fire the glass layer 2 at a firing temperature that is about 100°C or more higher than the softening temperature, and when this condition is added to 44, the surface of the glass layer 2 will be completely smooth as shown in Figure 4. Become.
3は、前記ガラス層2上に形成した抵抗体で1、該実施
例においてはRuO2系抵抗ペーストをスクリーン印刷
で塗布し、約850’Cで焼成しである。Reference numeral 3 denotes a resistor 1 formed on the glass layer 2, in which RuO2-based resistor paste is applied by screen printing and fired at about 850'C.
この抵抗体3の膜厚は10〜30μm程度に設定され、
該実施例においてはこれを約15μmとしである。4は
、同じくカラス層2」二に形成した導電体(集電体)で
、該実施例においては、Ag−Pd系導電ペーストをス
クリーン印刷で塗布し、約850℃で焼成しである。こ
の導電体4の膜厚は10〜30pm程度に設定され、該
実施例においてはこれを約15μmとしである。5は、
抵抗体3および導電体4上を摺接するマルチブラシ型の
摺動接触片である。The film thickness of this resistor 3 is set to about 10 to 30 μm,
In this example, this is about 15 μm. Reference numeral 4 denotes a conductor (current collector) similarly formed on the glass layer 2. In this example, an Ag-Pd based conductive paste was applied by screen printing and baked at about 850°C. The thickness of the conductor 4 is set to about 10 to 30 pm, and in this embodiment, it is about 15 μm. 5 is
This is a multi-brush type sliding contact piece that slides on the resistor 3 and conductor 4.
上記構成の回路板において、抵抗体3の表面粗さを測定
して見ると、第4図示のようにl p+?c程度の凹凸
が略々均等に存在し、まれに2μm程度の凹凸が存在す
るのみで、抵抗体3の表面は極めて平滑であることが判
明した。また、この回路板を用いた耐久試験において、
250万サイクルの長期使用においても実用性能に何等
問題がないことが確認された。In the circuit board having the above configuration, when the surface roughness of the resistor 3 is measured, it is found that l p+? It was found that the surface of the resistor 3 was extremely smooth, with irregularities of approximately 1.0 m in diameter being approximately evenly distributed, and irregularities of approximately 2 .mu.m being present in rare cases. In addition, in a durability test using this circuit board,
It was confirmed that there were no problems with practical performance even after long-term use of 2.5 million cycles.
なお、上記実施例においては抵抗体3、導電体4として
比較的高温度焼成の材料を用い、150℃程度の環境下
においても使用可能なポテンショメータ用の回路板を示
したが、本発明はこれに限定されるものではなく、回路
パターンの膜厚も任意である。In the above embodiment, materials fired at a relatively high temperature were used for the resistor 3 and the conductor 4, and a circuit board for a potentiometer was shown that can be used even in an environment of about 150°C. The film thickness of the circuit pattern is also arbitrary.
(発明の効果)
以上のように本発明によれば、鏡面となったガラス層上
に摺動接点用の回路パターンを形成するので、回路パタ
ーンの表面が平滑となり、長寿命と高い接触信頼性を保
障できる。また、回路パターンは厚膜印刷技術で形成し
てもその表面粗度が良好で、生産性にも富むという利点
がある。(Effects of the Invention) As described above, according to the present invention, since the circuit pattern for the sliding contact is formed on the mirror-surfaced glass layer, the surface of the circuit pattern becomes smooth, resulting in long life and high contact reliability. can be guaranteed. Further, even when the circuit pattern is formed by thick film printing technology, the surface roughness is good and the productivity is high.
第1図は従来の回路板の表面粗度を示すグラフ、第2図
は本発明の1実施例に係る回路板の概要断面図、第3図
はガラス層の焼成温度と表面粗度との関係を示す表、第
4図は第2図の構成における表面粗度を示すグラフであ
る。
1・・・基板
2・・・カラス層
3・・・抵抗体
4・・導電体
5・・・摺動接触片
特許出願人 株式会社コノクル
第1図
第2図 第3図Fig. 1 is a graph showing the surface roughness of a conventional circuit board, Fig. 2 is a schematic sectional view of a circuit board according to an embodiment of the present invention, and Fig. 3 is a graph showing the relationship between the firing temperature of the glass layer and the surface roughness. A table showing the relationship, FIG. 4, is a graph showing the surface roughness in the configuration of FIG. 2. 1...Substrate 2...Crow layer 3...Resistor 4...Conductor 5...Sliding contact piece Patent applicant Konokuru Co., Ltd. Figure 1 Figure 2 Figure 3
Claims (1)
ガラス層上に摺動接点が摺接する回路パターンを厚膜印
刷で形成したことを特徴とする摺動接点用回路板。 (2)前記回路パターンの表面粗さが2μ7n以下であ
ることを特徴とする特許請求の範囲第(1)項記載の摺
動接点用回路板。 (3)前記ガラス層は、5IO2、PbO,B2O3を
含有した軟化点750℃前後の利料から成り、該軟化点
より100℃程度以上高い温度で焼成して表面を鏡面化
したことを特徴とする特許請求の範囲第(2)項記載の
摺動接点用回路板。[Claims] K) A sliding device characterized in that a glass layer with a mirror surface is formed on a substrate, and a circuit pattern on which sliding contacts slide is formed on the glass layer by thick film printing. Circuit board for contacts. (2) The circuit board for sliding contacts according to claim (1), wherein the circuit pattern has a surface roughness of 2μ7n or less. (3) The glass layer is made of a material containing 5IO2, PbO, and B2O3 and has a softening point of around 750°C, and is fired at a temperature about 100°C or more higher than the softening point to give a mirror surface. A circuit board for sliding contacts according to claim (2).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59020432A JPH0677419B2 (en) | 1984-02-07 | 1984-02-07 | Method for manufacturing sliding contact circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59020432A JPH0677419B2 (en) | 1984-02-07 | 1984-02-07 | Method for manufacturing sliding contact circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS60165010A true JPS60165010A (en) | 1985-08-28 |
JPH0677419B2 JPH0677419B2 (en) | 1994-09-28 |
Family
ID=12026878
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59020432A Expired - Lifetime JPH0677419B2 (en) | 1984-02-07 | 1984-02-07 | Method for manufacturing sliding contact circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0677419B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007317971A (en) * | 2006-05-29 | 2007-12-06 | Mikuni Corp | Position sensor |
WO2016056283A1 (en) * | 2014-10-10 | 2016-04-14 | 株式会社村田製作所 | Variable resistor |
-
1984
- 1984-02-07 JP JP59020432A patent/JPH0677419B2/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007317971A (en) * | 2006-05-29 | 2007-12-06 | Mikuni Corp | Position sensor |
WO2016056283A1 (en) * | 2014-10-10 | 2016-04-14 | 株式会社村田製作所 | Variable resistor |
JPWO2016056283A1 (en) * | 2014-10-10 | 2017-07-27 | 株式会社村田製作所 | Variable resistor |
Also Published As
Publication number | Publication date |
---|---|
JPH0677419B2 (en) | 1994-09-28 |
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