JPS60164390A - Method of producing printed circuit board - Google Patents

Method of producing printed circuit board

Info

Publication number
JPS60164390A
JPS60164390A JP1959984A JP1959984A JPS60164390A JP S60164390 A JPS60164390 A JP S60164390A JP 1959984 A JP1959984 A JP 1959984A JP 1959984 A JP1959984 A JP 1959984A JP S60164390 A JPS60164390 A JP S60164390A
Authority
JP
Japan
Prior art keywords
adhesive layer
plating
adhesive
printed wiring
roughening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1959984A
Other languages
Japanese (ja)
Other versions
JPH023557B2 (en
Inventor
横山 博義
正明 後藤
魚津 信夫
洋一 松田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi Condenser Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Condenser Co Ltd filed Critical Hitachi Condenser Co Ltd
Priority to JP1959984A priority Critical patent/JPS60164390A/en
Publication of JPS60164390A publication Critical patent/JPS60164390A/en
Publication of JPH023557B2 publication Critical patent/JPH023557B2/ja
Granted legal-status Critical Current

Links

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  • Chemically Coating (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は表面に接着剤層を有する絶縁基板に回路を形成
しうる印刷配線板の製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a printed wiring board on which a circuit can be formed on an insulating substrate having an adhesive layer on its surface.

電気機器の小型化は日進月歩であり、それとともに内部
に組み込まれる印刷配線板も益々、小型で印刷回路間の
狭い高密度のものが必要とされるようになっている。
The miniaturization of electrical equipment is progressing rapidly, and along with this, the printed wiring boards incorporated therein are increasingly required to be smaller and have higher density between printed circuits.

ところで、CG−4法等のように基板に予め接着剤層及
びめっきレジスト層を順次設け、接着剤層の粗化後に無
電解めっきによりめっきレジスト層以外の箇所にめっき
を設は回路を形成するような印刷配線板においては、無
電解めっきの際にめっきレジスト層に金属めっきが付着
し、成長する現象が起こる。そしてこのような金属めっ
きの成長が大きくなると絶縁不良や短絡不良が生じ、特
に高密度の印刷配線板になるとこのような不良が生じ易
い欠点があった。
By the way, as in the CG-4 method, an adhesive layer and a plating resist layer are sequentially provided on a substrate in advance, and after the adhesive layer is roughened, plating is applied to areas other than the plating resist layer by electroless plating to form a circuit. In such printed wiring boards, a phenomenon occurs in which metal plating adheres to and grows on the plating resist layer during electroless plating. When the growth of such metal plating increases, insulation defects and short circuit defects occur, and such defects are particularly likely to occur in high-density printed wiring boards.

このような欠点を改良するために、従来、接着剤を粗化
するために、硼弗化水素酸溶液を用いていたが、これを
無水クロム酸硫酸系溶液にした。これにより絶縁不良や
短絡不良が減少するという結果をみたが、反面、無電解
めっきにより形成された回路の半田耐熱性が低下すると
いう欠点が生じた。
In order to improve these drawbacks, a borofluoric acid solution was conventionally used to roughen the adhesive, but this was replaced with a chromic anhydride sulfuric acid solution. This resulted in a reduction in insulation defects and short-circuit defects, but on the other hand, there was a drawback in that the solder heat resistance of circuits formed by electroless plating decreased.

本発明は、以上の欠点を改良し、絶縁不良や短絡不良を
減少するとともに半田耐熱性を向上し)る印刷配線板の
製造方法の提供を目的とJるものである。
It is an object of the present invention to provide a method for manufacturing a printed wiring board that improves the above-mentioned drawbacks, reduces insulation defects and short circuit defects, and improves solder heat resistance.

本発明は、上記の目的を達成づるために、絶縁基板の表
面に設けられた接着剤層を無水クロム酸l1III酸弗
化アルカリ系粗化液により組化しIC後、無電解めっき
液により所定の回路を形成づ−る印刷配線板の製造方法
において、接着剤が10g/1以上溶融している無水ク
ロム酸硫酸弗化アルカリ系粗化液により接着剤層を粗化
づることを特徴と(る印刷配線板の製造方法を提供する
ものである。
In order to achieve the above-mentioned object, the present invention assembles an adhesive layer provided on the surface of an insulating substrate with an anhydrous chromic acid l1III acid fluoride alkaline roughening solution, and after IC, forms a predetermined adhesive layer with an electroless plating solution. A method for producing a printed wiring board for forming a circuit, characterized in that the adhesive layer is roughened with an alkali anhydrous chromic acid sulfate fluoride roughening solution in which adhesive is melted at 10 g/l or more (printed wiring board). A method for manufacturing a board is provided.

以下、本発明を実施例に基づいて説明Jる。The present invention will be explained below based on examples.

先ず、パラジウム系等のめっき用触媒入りの紙、−フェ
ノール樹脂基材や紙−Jポキシ樹脂基材等の絶縁基板の
表面に、めっき用触媒入りの接着剤を塗布して接着剤層
を形成する。次に、この接着剤層表面に、スクリーン印
刷により所定のパターンにめつ谷しジスI−インクを印
刷・乾燥して、めつきレジス+−mを設ける。そして接
着剤層及びめっきレジスト層が設けられた絶It基板を
、接着剤が1011/1以上溶融している無水クロム酸
硫酸弗化アルカリ系組化液中に浸漬して接着剤層を粗化
する。粗化液としては、特に0rO3が20〜60 、
g/It、 H,So、が150〜500 ml/克及
びNaFが10〜50’(1/lの成分からなるものを
用いる。接着剤層を粗化した後、絶縁基板を無電解銅め
っき溶液に浸漬し、接着剤1表面に銅めっき層からなる
回路を形成する。
First, an adhesive containing a plating catalyst is applied to the surface of an insulating substrate such as paper containing a plating catalyst such as palladium, a phenol resin base material, or a paper-J poxy resin base material to form an adhesive layer. do. Next, on the surface of this adhesive layer, a plating resist I-ink is printed in a predetermined pattern by screen printing and dried to provide a plating resist +-m. The adhesive layer is then roughened by immersing the printed circuit board with the adhesive layer and the plating resist layer in an alkali anhydrous chromic acid sulfate fluoride assembling solution in which the adhesive is melted at 1011/1 or higher. do. Especially as a roughening liquid, 0rO3 is 20 to 60,
g/It, H, So, 150-500 ml/k and NaF 10-50' (1/l). After roughening the adhesive layer, electroless copper plating is applied to the insulating substrate. A circuit made of a copper plating layer is formed on the surface of the adhesive 1 by immersing it in a solution.

ずなわら、上記本発明の実施例によれば、粗化液中に予
め接着剤が10g/1以上含まれ−Cいるため、接着剤
層の表面に適切な凹凸が生じ、接着剤層と銅めっき層と
の剥−I強皮が増大し、崖111耐熱性が向上する。ま
た、粗化液が無水クロム酸硫酸弗化アルカリ系粗化液で
あるため、その慢のめっき処理の際に、めっきレジスト
層に銅めっきが付着し難く、絶縁不良や短絡不良を防l
Lr−きる。
However, according to the above-mentioned embodiment of the present invention, since 10 g/1 or more of the adhesive is included in the roughening liquid in advance, appropriate unevenness is generated on the surface of the adhesive layer, and the adhesive layer and The peeling strength of the copper plating layer increases, and the heat resistance of the cliff 111 improves. In addition, since the roughening solution is an alkali-based roughening solution based on anhydrous chromic acid sulfate fluoride, it is difficult for copper plating to adhere to the plating resist layer during the slow plating process, which prevents poor insulation and short circuits.
Lr-Kill.

なお、粗化液中に含まれる接着剤mが1OL/2より少
ないと、半田耐熱性が接着剤を入れない従来のものとほ
とんど変わりがない。また、絶縁基板が特に紙−フェノ
ール樹脂基板の場合には、接着剤量は15 g/4以上
である方がより好ましい。
In addition, when the adhesive m contained in the roughening liquid is less than 1OL/2, the soldering heat resistance is almost the same as that of the conventional type without adhesive. Furthermore, when the insulating substrate is particularly a paper-phenolic resin substrate, it is more preferable that the amount of adhesive is 15 g/4 or more.

上記実施例rは、絶縁基板の表面にめっき用触媒入りの
接着剤層を股t〕だが、めっき用触媒の含まれない接着
剤層でもよく、この場合には、接着剤層の粗化後にめっ
き用触媒をその表面に塗布すればよい。
In Example R above, an adhesive layer containing a plating catalyst is provided on the surface of the insulating substrate, but an adhesive layer that does not contain a plating catalyst may also be used. In this case, after the adhesive layer is roughened, A plating catalyst may be applied to the surface.

次に、本発明の方法と従来方法により製造した印刷配線
板について半田耐熱性を比較する。
Next, the solder heat resistance of printed wiring boards manufactured by the method of the present invention and the conventional method will be compared.

絶縁基板としては、パラジウム系のめっき用触媒を含有
する紙−フェノール樹脂基材を用い、その表面にニトリ
ルゴムフェノール樹脂にめっき用触媒を含有した接着剤
層及びめっきレジスト層を設置プる。次に、この絶縁基
板を、l1rlL40℃の粗化液に12分間浸漬し、取
り出して乾燥する。粗化液は、C管゛0□ 30 Q/
 1 、II l−1z S Oq 、300IIll
/L及びNa F2OQ/1の成分からなる液に、絶縁
基板に設けた接着剤層と同一成分の接着剤をO〜50g
/I、含有したものを用いる。接着剤層を粗化した後、
無電解鋼めっき処理をして、m+すr+ 71 /l’
l 相kk −番■mW…せス 21.7;−のように
して形成した印刷配線板の試験片(2!+、4X25.
4 mm )を21度260℃の半田溶融液中に浸漬し
て、綱めっき層が剥離したりふくれたりするまテノfR
IIl−tl−測定して、半田耐熱性をめたところ図に
示す通りの結果が得られた。この図から朗らかな通り、
本発明によれば、接着剤を溶解しない従来例が2.5秒
であるのに対して、6秒以上となり2.4倍以上、半田
耐熱性が向上している。
As the insulating substrate, a paper-phenolic resin base material containing a palladium-based plating catalyst is used, and an adhesive layer and a plating resist layer containing a nitrile rubber phenol resin and a plating catalyst are provided on the surface thereof. Next, this insulating substrate is immersed in a roughening solution at 40° C. for 12 minutes, taken out and dried. The roughening liquid is placed in C tube ゛0□ 30 Q/
1, II l-1z SOq, 300IIll
Add 0~50g of adhesive having the same composition as the adhesive layer provided on the insulating substrate to a liquid consisting of /L and NaF2OQ/1.
/I, use the one containing. After roughening the adhesive layer,
After electroless steel plating treatment, m+sr+ 71/l'
l Phasekk -No.■mW...Sesu 21.7;- A printed wiring board test piece (2!+, 4X25.
4 mm) in a solder melt at 21 degrees and 260 degrees Celsius to prevent the wire plating layer from peeling or blistering.
IIl-tl- was measured to determine the soldering heat resistance, and the results shown in the figure were obtained. From this diagram, the cheerful street,
According to the present invention, the soldering heat resistance is improved by more than 2.4 times, which is 6 seconds or more, compared to 2.5 seconds in the conventional example in which the adhesive is not dissolved.

以上の通り、本発明によれば、絶縁不良や短絡不良を減
少しつるとともに半田耐熱性を向上し)る印刷配線板の
製造方法が得られる。
As described above, according to the present invention, there is provided a method for manufacturing a printed wiring board that reduces insulation defects and short circuit defects, improves solder heat resistance, and improves solder heat resistance.

4、mM(DHJ1’JmlA 図は接着剤溶解量に対重る半田耐熱性のグラフを示す。4, mM (DHJ1’JmlA The figure shows a graph of solder heat resistance versus the amount of adhesive melted.

Claims (1)

【特許請求の範囲】[Claims] (1)絶縁基板の表面に設けら塾た接着剤層を無水クロ
ム酸硫酸弗化アルカリ系粗化液により、粗化した後、無
電解めっき液により所定の回路を形成する印刷配線板の
製造方法において、接着剤が10g/f/、以上溶融し
ている無水クロム酸硫酸弗化アルカリ系輯化液により接
着剤層を粗化することを特徴とする印刷配線板の製造方
法。
(1) Manufacturing a printed wiring board by roughening the adhesive layer provided on the surface of an insulating substrate with an anhydrous chromic acid sulfate fluoride alkaline roughening solution, and then forming a predetermined circuit with an electroless plating solution. A method for producing a printed wiring board, characterized in that the adhesive layer is roughened using an alkali anhydrous chromic acid sulfate fluoride silting solution in which the adhesive is melted at a rate of 10 g/f/or more.
JP1959984A 1984-02-06 1984-02-06 Method of producing printed circuit board Granted JPS60164390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1959984A JPS60164390A (en) 1984-02-06 1984-02-06 Method of producing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1959984A JPS60164390A (en) 1984-02-06 1984-02-06 Method of producing printed circuit board

Publications (2)

Publication Number Publication Date
JPS60164390A true JPS60164390A (en) 1985-08-27
JPH023557B2 JPH023557B2 (en) 1990-01-24

Family

ID=12003684

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1959984A Granted JPS60164390A (en) 1984-02-06 1984-02-06 Method of producing printed circuit board

Country Status (1)

Country Link
JP (1) JPS60164390A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP4319182A1 (en) 2021-03-31 2024-02-07 Sony Group Corporation Information processing terminal, information processing method, and program

Also Published As

Publication number Publication date
JPH023557B2 (en) 1990-01-24

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