JPS60160697A - Method of producing printed circuit board - Google Patents
Method of producing printed circuit boardInfo
- Publication number
- JPS60160697A JPS60160697A JP1585384A JP1585384A JPS60160697A JP S60160697 A JPS60160697 A JP S60160697A JP 1585384 A JP1585384 A JP 1585384A JP 1585384 A JP1585384 A JP 1585384A JP S60160697 A JPS60160697 A JP S60160697A
- Authority
- JP
- Japan
- Prior art keywords
- adhesive layer
- plating
- insulating substrate
- sulfuric acid
- acid solution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】 本発明は印刷配線板の製造方法に関するものである。[Detailed description of the invention] The present invention relates to a method of manufacturing a printed wiring board.
印刷配線板は、組み込まれる機器が小型になるに従い、
小型で印刷回路間の距離のより狭い高密度のものが必要
とされている。As the devices into which printed wiring boards are incorporated become smaller,
There is a need for smaller sizes and higher densities with closer distances between printed circuits.
CG−4法等のアディティブ法により印刷配線板を製造
する場合には、絶縁基板に接着剤層、めっきレジスト層
を順次設け、その後レジスト以外の箇所に無電解めつぎ
により銅めっき等を形成している。このような製造方法
によると、通常、めっきレジスト層表面に銅めっき等が
析出し成長する規象が生じ、このため印刷回路間の絶縁
抵抗が低下し、ショート不良が生じる欠点があり、特に
高密度のものについてはその対策が重要な技術的課題と
なっている。When manufacturing printed wiring boards using an additive method such as the CG-4 method, an adhesive layer and a plating resist layer are sequentially provided on an insulating substrate, and then copper plating, etc. is formed on areas other than the resist by electroless plating. ing. This manufacturing method usually causes a phenomenon in which copper plating etc. precipitates and grows on the surface of the plating resist layer, which reduces the insulation resistance between the printed circuits and causes short-circuit defects. Countermeasures for high-density products are an important technical issue.
このような欠点を改良づるために、従来、絶縁基板に@
層された接着剤層を粗化Jる粗化液として硼弗化水素酸
溶液を用いていたが、これを無水クロム酸硫酸系溶液に
代え、これによりショー1〜不良の減少が可能になった
。しかしながら、クロム酸硫酸系溶液を粗化液として用
いることによりショート不良等を減少できたが、その反
面、印刷回路の半田耐熱性が低下し、またスルー小−ル
を設けた絶縁基板の場合にはスルーボール内のめつき付
着速度が遅くなる欠点があった。In order to improve these drawbacks, insulating substrates have traditionally been
A borohydrofluoric acid solution was used as the roughening liquid to roughen the adhesive layer, but this was replaced with a chromic anhydride sulfuric acid solution, which made it possible to reduce the number of defects. Ta. However, by using a chromate-sulfuric acid solution as a roughening solution, short-circuit defects etc. could be reduced, but on the other hand, the soldering heat resistance of printed circuits decreased, and in the case of insulating substrates with small through holes. had the disadvantage that the speed of plating inside the through ball was slow.
本発明は、以上の欠点を改良し、半田耐熱性等を向上し
うる印刷配線板の製造方法の提供を目的とづるものであ
る。The present invention aims to improve the above-mentioned drawbacks and provide a method for manufacturing a printed wiring board that can improve solder heat resistance and the like.
本発明は、上記の目的を達成づるために、めっき触媒を
含む絶縁基板に接着剤層及びめっきレジスト層を順次形
成した後、無水クロム酸硫酸系溶液により前記接着剤層
を粗化し、その後無電解めっき液に絶縁基板を浸漬して
回路を形成する印刷配線板の製造方法において、めっき
レジスト層を形成後の絶縁基板を加熱処理し、その後無
水クロム酸硫酸系溶液に浸漬して接着剤層を粗化するこ
とを特徴とする印刷配線板の製造方法を提供するもので
ある。In order to achieve the above object, the present invention sequentially forms an adhesive layer and a plating resist layer on an insulating substrate containing a plating catalyst, then roughens the adhesive layer with an anhydrous chromic acid sulfuric acid solution, and then removes the adhesive layer. In a printed wiring board manufacturing method in which a circuit is formed by dipping an insulating substrate in an electrolytic plating solution, the insulating substrate after forming a plating resist layer is heat-treated, and then immersed in a chromic anhydride-sulfuric acid solution to form an adhesive layer. The present invention provides a method for manufacturing a printed wiring board, which is characterized by roughening the surface of the printed wiring board.
以下、本発明を実施例に基づいて説明する。Hereinafter, the present invention will be explained based on examples.
先ず、パラジウム等のめっき用触媒入りの紙−フェノー
ル樹脂基材や紙−エポキシ樹脂基材等の絶縁基板に、め
っき用触媒入りの接着剤を塗布して接着剤層を設【ノる
。次に、接着剤層m麿後の絶縁基板にパンチ等によりス
ルーホールを設ける。First, an adhesive containing a plating catalyst is applied to an insulating substrate such as a paper-phenol resin base material or a paper-epoxy resin base material containing a plating catalyst such as palladium to form an adhesive layer. Next, through holes are formed in the insulating substrate after the adhesive layer has been removed by punching or the like.
なお、スルーホールはなくてもよい。絶縁基板にスルー
ホールを設けた後、スルーホールにシーダー処理を施し
てスルーホール内にめっき用触媒を付着する。シーダー
処理後、絶縁基板表面にめっきレジストを印刷する。そ
してこの接着剤層とめっきレジストIllが設りられた
絶縁基板を所定の条件で加熱処理する。加熱条件として
は、温度が140℃以上、時間が30分間以」二とする
。絶縁基板を加熱処理り無水クロム酸硫酸系溶液に浸漬
して接着剤層を粗化する。無水クロムll!硫酸系溶液
としては、組成が0r0320〜60g/j、、1−1
.So、 150〜500 ml/1 、及びNaF1
0〜50 g/lからなるものを用い、液温を好ましく
は30℃〜45℃とする。接着剤層を粗化した後、絶縁
基板を無電解銅めっき液に浸漬し、所定箇所に銅めっき
を析出して印刷回路を形成する。Note that the through hole may not be provided. After providing through holes in the insulating substrate, the through holes are subjected to seeder treatment to adhere a plating catalyst inside the through holes. After seeding, a plating resist is printed on the surface of the insulating substrate. Then, the insulating substrate provided with the adhesive layer and the plating resist Ill is heat-treated under predetermined conditions. The heating conditions are such that the temperature is 140° C. or higher and the time is 30 minutes or longer. The insulating substrate is heated and immersed in a chromic anhydride-sulfuric acid solution to roughen the adhesive layer. Anhydrous chrome! As a sulfuric acid solution, the composition is 0r0320~60g/j, 1-1
.. So, 150-500 ml/1, and NaF1
The liquid temperature is preferably 30°C to 45°C. After roughening the adhesive layer, the insulating substrate is immersed in an electroless copper plating solution to deposit copper plating at predetermined locations to form a printed circuit.
すなわち、上記実施例によれば、無水クロム義硫酸系溶
液により絶縁基板に積層した接着剤層を粗化する前に、
接着剤層表面を加熱しているため、接着剤層が予め暖め
られ、無水クロム酸硫酸系溶液による粗化が効果的に行
われ、接着剤層に適当な凹凸が生成する。それ故、接着
剤層とこの表面に段りられた銅めっぎ層からなる印刷回
路との密着性が向上し、印刷回路の半田耐熱性が向上す
るとともに、スルーホール内のめつき析出速度が早くな
り製造時間が短縮される。That is, according to the above embodiment, before roughening the adhesive layer laminated on the insulating substrate with an anhydrous chromium sulfuric acid solution,
Since the surface of the adhesive layer is heated, the adhesive layer is warmed in advance, and roughening by the anhydrous chromic acid/sulfuric acid solution is effectively performed, and appropriate irregularities are generated on the adhesive layer. Therefore, the adhesion between the adhesive layer and the printed circuit made of the stepped copper plating layer on this surface is improved, the solder heat resistance of the printed circuit is improved, and the plating precipitation rate inside the through hole is improved. is faster, reducing manufacturing time.
なお、無水クロム11111ii!を酸系溶液の温度は
、30℃〜45℃の範囲が好ましく、30℃より低いと
きは接着剤層の粗化時間が長くなり、ま/=、45℃よ
り高いときは粗化面が平滑化してくるため、事前に(j
なった加熱処理により得られる半田耐熱゛ 性を低下す
る欠点がある。In addition, anhydrous chromium 11111ii! The temperature of the acid solution is preferably in the range of 30°C to 45°C; if it is lower than 30°C, the roughening time of the adhesive layer will be longer; if it is higher than 45°C, the roughened surface will be smooth. (j
This has the disadvantage that the solder heat resistance obtained by the heat treatment is reduced.
次に、本発明の実施例と従来例についてヒール強度、半
田耐熱性及びスルーホールのめっき付着性について調べ
た結果を下記の表に示寸。半田耐熱性は、260℃の半
田溶融液に印刷配線板を浸漬した場合に印刷回路が剥離
したりふくれたり」“るまでの時間を示す。また、スル
ーホールのめっき付着性は絶縁基板を無電解銅めっき液
に浸漬した場合にスルーホールの抵抗が0.1iΩにな
るのに必要なめっき時間を示す。Next, the results of investigating the heel strength, solder heat resistance, and plating adhesion of through-holes for the embodiments of the present invention and conventional examples are shown in the table below. Solder heat resistance indicates the time it takes for the printed circuit to peel or bulge when the printed wiring board is immersed in a solder melt at 260°C.Also, the plating adhesion of through-holes indicates the time it takes for the printed circuit to peel or bulge when immersed in a solder melt at 260°C. The plating time required for the resistance of the through hole to become 0.1 iΩ when immersed in an electrolytic copper plating solution is shown.
また、実施例1)は
a)絶縁基板:パラジウム入りの二1〜リルゴム・フェ
ノール樹脂系の基板
に接着剤層を積層したちの
く日立化成工業株式会社製
ACL−141)
b)めっきレジスト層:めっきレジスト用インク(日立
化成工業株式会d
製1−I G M−028K−1)を
上記絶縁基板にスクリーン印
刷J”る。In addition, Example 1) is a) insulating substrate: ACL-141 manufactured by Chinoku Hitachi Chemical Co., Ltd., in which an adhesive layer is laminated on a palladium-containing 21-ril rubber/phenol resin substrate; b) plating resist layer : Screen print an ink for plating resist (1-IGM-028K-1 manufactured by Hitachi Chemical Co., Ltd.) on the above insulating substrate.
C)加熱処理:160″G、60分間
d)粗化処理:温U 40 ’CO)粗化Pa (Cン
r O,730Q/尤、濃硫酸300
tall/1 、Na F2O9/1 )中に12分間
浸漬する。C) Heat treatment: 160''G, 60 minutes d) Roughening treatment: Warm U40'CO) Roughening Pa (CrO,730Q/Y, concentrated sulfuric acid 300 tall/1, NaF2O9/1) in Soak for 12 minutes.
からなる各条件により製造される。さらに、実施例2)
は実施例1)において条4!4.0)が160℃、30
分間であり、
実施例3)は、実施例1)において来着C)が150’
C160分間であり、
実施例4)は、実施例′1)において条件d)の粗化液
の)黒度が35℃であり、
実施例5)は、実施例1)において条件d)の粗化液の
181食が25℃であり、
実施例6)は実施例1ンにおいて条件d〉の粗化液の温
度が50℃であり、
従来例は実施例1〉において条件C)を省略したもので
あり、
これ等の各条件により各々製造されでいる。Manufactured under the following conditions. Furthermore, Example 2)
In Example 1), Article 4!4.0) was heated to 160°C and 30°C.
In Example 3), arrival C) is 150' in Example 1).
In Example 4), the blackness of the roughening liquid under condition d) in Example '1) was 35°C, and in Example 5), the blackness was 35°C under condition d) in Example 1). In Example 6), the temperature of the roughening liquid in Condition d was 50°C in Example 1, and in the conventional example, Condition C) was omitted in Example 1. They are manufactured under these conditions.
表
表から明らかな通り、本発明によれば、従来例と比べて
、半田耐熱性が2.6倍以上、スルーホールめっき付着
性が約63%、ずなわち1.6倍以上の速度でめっきが
析出し、各特性とも向上している。As is clear from the table, according to the present invention, compared to the conventional example, the solder heat resistance is 2.6 times or more, the through-hole plating adhesion is about 63%, or the speed is 1.6 times or more. The plating has precipitated and all properties have improved.
なお、粗化液の温度が30℃〜45℃の範囲にあるもの
の方がその範囲外のものよりも、半田耐熱性が約2倍そ
してスルーホールめっきイ」容性が2.5倍となってお
り、前者の温度範囲の粗化液によりさらに特性が向上し
ていることが明らかである。In addition, those whose roughening liquid temperature is in the range of 30°C to 45°C have approximately twice the soldering heat resistance and 2.5 times the through-hole plating capacity than those outside that range. It is clear that the roughening liquid in the former temperature range further improves the properties.
以上の通り、本発明によれば、接着剤層の粗化の前に加
熱処理をすることにより半田耐熱性やスルーホールめっ
き(=I fi i!lの侵れIこ印刷配線板の製造方
法が得られる。As described above, according to the present invention, by performing heat treatment before roughening the adhesive layer, solder heat resistance and through-hole plating (= I fi i! l erosion) can be improved. is obtained.
特許出願人 日立コンデンサ株式会社Patent applicant: Hitachi Capacitor Co., Ltd.
Claims (1)
レジスト層を順次形成した後、無水りI」ム酸硫酸系溶
液により前記接着剤層を粗化し、その後無電解めっき液
に絶縁基板を浸漬して回路を形成する印刷配線板の製造
方法において、めつきレジスt−Sを形成後の絶縁基板
を加熱処理し、その後無水クロム酸硫酸系溶液に浸漬し
て接着剤層を粗化することを特徴とする印刷配線板の製
造方法。(1) After sequentially forming an adhesive layer and a plating resist layer on an insulating substrate containing a plating catalyst, the adhesive layer is roughened with an anhydrous sulfuric acid solution, and then the insulating substrate is coated with an electroless plating solution. In a method for manufacturing a printed wiring board in which a circuit is formed by dipping, the insulating substrate after forming the plating resist t-S is heat-treated, and then immersed in an anhydrous chromic acid-sulfuric acid solution to roughen the adhesive layer. A method for manufacturing a printed wiring board, characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1585384A JPS60160697A (en) | 1984-01-31 | 1984-01-31 | Method of producing printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1585384A JPS60160697A (en) | 1984-01-31 | 1984-01-31 | Method of producing printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60160697A true JPS60160697A (en) | 1985-08-22 |
Family
ID=11900366
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1585384A Pending JPS60160697A (en) | 1984-01-31 | 1984-01-31 | Method of producing printed circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60160697A (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5141226A (en) * | 1974-10-02 | 1976-04-07 | Nippon Kokan Kk | ASHIBAKASETSUTETSUKYOSOCHI |
JPS5235866A (en) * | 1975-09-16 | 1977-03-18 | Matsushita Electric Ind Co Ltd | Method of plating through hole of printed circuit board |
JPS5734386A (en) * | 1980-08-09 | 1982-02-24 | Matsushita Electric Works Ltd | Method of producing board for printed circuit |
JPS58128788A (en) * | 1982-01-27 | 1983-08-01 | 株式会社日立製作所 | Method of producing printed board |
-
1984
- 1984-01-31 JP JP1585384A patent/JPS60160697A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5141226A (en) * | 1974-10-02 | 1976-04-07 | Nippon Kokan Kk | ASHIBAKASETSUTETSUKYOSOCHI |
JPS5235866A (en) * | 1975-09-16 | 1977-03-18 | Matsushita Electric Ind Co Ltd | Method of plating through hole of printed circuit board |
JPS5734386A (en) * | 1980-08-09 | 1982-02-24 | Matsushita Electric Works Ltd | Method of producing board for printed circuit |
JPS58128788A (en) * | 1982-01-27 | 1983-08-01 | 株式会社日立製作所 | Method of producing printed board |
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