JPS60187094A - Method of producing through hole circuit board - Google Patents

Method of producing through hole circuit board

Info

Publication number
JPS60187094A
JPS60187094A JP4342084A JP4342084A JPS60187094A JP S60187094 A JPS60187094 A JP S60187094A JP 4342084 A JP4342084 A JP 4342084A JP 4342084 A JP4342084 A JP 4342084A JP S60187094 A JPS60187094 A JP S60187094A
Authority
JP
Japan
Prior art keywords
hole
conductor layer
circuit conductor
wiring circuit
insulating substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4342084A
Other languages
Japanese (ja)
Inventor
中村 恒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP4342084A priority Critical patent/JPS60187094A/en
Publication of JPS60187094A publication Critical patent/JPS60187094A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はビデオテープレコーダーやテレビなどの一般電
子機器に用いられるスルーホール配線板の製造方法に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing through-hole wiring boards used in general electronic equipment such as video tape recorders and televisions.

従来例の構成とその問題点 近年、電子機器の小型軽量化や高信頼化に対する要望が
高まってくるにつれ、スルーホール配線板の需要がます
ます増大している。
Conventional configurations and their problems In recent years, as the demand for smaller, lighter, and more reliable electronic equipment has increased, the demand for through-hole wiring boards has been increasing.

このスルーホール配線板は絶縁基板の表裏両面に形成し
た配線回路導体をその両者を貫通する孔を導通化するこ
とにより電気的に接続するものであり、その製造方法と
しては従来から様々な方法が実施されている。
This through-hole wiring board electrically connects wiring circuit conductors formed on both the front and back surfaces of an insulating substrate by making the holes that pass through both conductive. Various methods have been used to manufacture this board. It has been implemented.

その代表的な製造方法としては、第1図A−Gに示す製
造工程を経て作られるものである。
A typical manufacturing method thereof is through the manufacturing steps shown in FIGS. 1A to 1G.

すなわち、第1図Aに示すようなガラスエポキシや紙フ
ェノールなどから成る絶縁基板1の表裏両面全体に銅は
<2.2’を接着したいわゆる両面銅張積層板を用いて
、まず第1図Bに示すように、接続を必要とする所定の
位置に貫通孔3をあけ、次いで第1図Cに示すごとく、
この基板を塩化第1スズと塩化パラジウムなどの塩酸酸
性溶液から成る活性化処理液に浸漬して貫通孔内壁面を
含む。
That is, first, using a so-called double-sided copper-clad laminate in which copper is adhered to the entire front and back surfaces of an insulating substrate 1 made of glass epoxy, paper phenol, etc. as shown in FIG. As shown in Fig. 1B, a through hole 3 is drilled at a predetermined position where connection is required, and then, as shown in Fig. 1C,
This substrate is immersed in an activation treatment solution consisting of an acidic hydrochloric acid solution of stannous chloride and palladium chloride to contain the inner wall surface of the through hole.

基板全面にパラジウムの微粒子核から成る活性化層4を
付着させた後で第1図りに示すようにこの基板を銅錯塩
のアルカリ溶液とホルマリンとから成る無電解銅めっき
液に浸漬して貫通孔内壁面と基板全面に金属銅5を析出
させ、さらに第1図Eに示すように電解銅めっきを行な
って金属銅6を析出させて導体厚を増大させる。
After depositing an activation layer 4 consisting of fine particle nuclei of palladium on the entire surface of the substrate, as shown in the first diagram, this substrate is immersed in an electroless copper plating solution consisting of an alkaline solution of copper complex salt and formalin to form through holes. Metallic copper 5 is deposited on the inner wall surface and the entire surface of the substrate, and further, as shown in FIG. 1E, electrolytic copper plating is performed to deposit metallic copper 6 to increase the conductor thickness.

そして第1図Fに示すように貫通孔3と配線回路状に耐
エツチング性を有するマスク7を被覆し、不要部分の銅
を塩化第2鉄溶液や塩化第1銅溶液に浸漬することによ
り溶解除去し、第1図Gに示すような貫通孔を導通化し
たスルーホール配線板を作るものである。
Then, as shown in FIG. 1F, the through holes 3 and the wiring circuit are covered with an etching-resistant mask 7, and unnecessary copper is dissolved by immersing it in a ferric chloride solution or a cuprous chloride solution. By removing it, a through-hole wiring board with conductive through-holes as shown in FIG. 1G is made.

ところがこのような方法によるスルーホール配線板には
次のような欠点がある。
However, the through-hole wiring board manufactured by this method has the following drawbacks.

■ この製造方法では、活性化処理や電気銅めっき工程
などの湿式プロセスを必要とするため廃液処理などの設
備が大規模となる。
■ This manufacturing method requires wet processes such as activation treatment and electrolytic copper plating, which requires large-scale equipment for waste liquid treatment.

■ 活性化処理、めっき処理、打抜加工など、製造工程
が煩雑であり、経済性に欠ける。
■ The manufacturing process is complicated, including activation treatment, plating treatment, and punching, and it lacks economic efficiency.

■ めっき処理によりかなり厚い銅層を形成してからフ
ォトエツチング法により回路導体層を形成する場合、サ
イドエツチングによる回路導体層の線細りが起りやすく
、微細配線パターンの形成が困難となる。
(2) When a fairly thick copper layer is formed by plating and then a circuit conductor layer is formed by photoetching, lines in the circuit conductor layer tend to thin due to side etching, making it difficult to form fine wiring patterns.

■ 貫通孔の壁部に直接金属導体層が形成されるため、
使用する絶縁基板の材質によりスルーホール接続の信頼
性が大きく影響され、特に紙基材フェノール基板ではそ
の熱膨張係数が大きいため基材の膨張、収縮に対して金
属導体層が追従できずスルーホール接続の信頼性が低下
する。
■ Because the metal conductor layer is formed directly on the wall of the through hole,
The reliability of through-hole connections is greatly affected by the material of the insulating substrate used. Paper-based phenol substrates in particular have a large coefficient of thermal expansion, so the metal conductor layer cannot follow the expansion and contraction of the substrate, resulting in through-hole connections. Connection becomes less reliable.

■ 無電解銅めっき工程において、めっきの析出状態が
絶縁基板の材質や絶縁基板中に含まれる微量の不純物の
影響を受けやすい、特にテフロン、ポリイミド基板はめ
っきが付着しにくい、まだイオウなどの不純物は無電解
銅めっきの析出を著しく阻害し、良好なスルーホール接
続が行ないにくい。
■ In the electroless copper plating process, the deposition state of the plating is easily affected by the material of the insulating substrate and trace amounts of impurities contained in the insulating substrate. In particular, the plating is difficult to adhere to Teflon and polyimide substrates, which still contain impurities such as sulfur. This significantly inhibits the deposition of electroless copper plating, making it difficult to make good through-hole connections.

■ 活性化処理は処理液に孔加工を施こした基板全体を
浸漬して行なうため、絶縁基板周囲の側壁部や導通化を
必要としない貫通孔に導体層が形成されるだめ、打抜加
工を2回行なう必要がある。
■ Activation treatment is performed by immersing the entire board with holes drilled in the processing solution, so a conductor layer is formed on the side walls around the insulating substrate and through holes that do not require conductivity. You need to do it twice.

以上のような従来例の欠点を解消するスルーホール配線
板として例えば無電解銅めっきのみで絶縁基板上に直接
配線回路導体層の形成と、スルーホール接続を行なうア
ディティブ法、エツチング法により得られた配線回路導
体層を貫通する孔の中に銀ペーストを充填してスルーホ
ール接続する方法などが実施されているが、そのいずれ
の方法も上述した欠点を全て解消するものではない。
A through-hole wiring board that eliminates the drawbacks of the conventional examples described above can be obtained by, for example, forming a circuit conductor layer directly on an insulating substrate using only electroless copper plating, and using an additive method or an etching method to make through-hole connections. Although methods such as filling silver paste into holes penetrating the wiring circuit conductor layer and making through-hole connections have been implemented, none of these methods solves all of the above-mentioned drawbacks.

発明の目的 本発明の目的は、上記欠点に鑑み製造工程が比較的簡単
で、経済性にすぐれ、かつサイドエツチングを極力少な
くして微細配線化を容易にするとともに、スルーホール
接続の信頼性を著しく向上させることのできるスルーホ
ール配線板の製造方法を提供することである。
OBJECTS OF THE INVENTION In view of the above-mentioned drawbacks, an object of the present invention is to provide a manufacturing process that is relatively simple and economical, minimizes side etching to facilitate fine wiring, and improves the reliability of through-hole connections. It is an object of the present invention to provide a method for manufacturing a through-hole wiring board that can be significantly improved.

発明の構成 上記目的を達成するために、本発明のスルーホール配線
板は、絶縁基板の表裏両面に配線回路導体層を形成し、
接続を必要とする配線回路導体層を貫通する孔を設け、
貫通孔内壁面に導電性の樹脂を塗布し、その貫通孔周辺
部の配線回路導体層の一部が露出するように絶縁基板の
表裏両面に絶縁レジスト膜を形成した後で貫通孔内壁部
の導電樹脂層と、露出した配線回路導体層上に無電解め
っき法により導電金属層を析出する方法により作るもの
である。
Structure of the Invention In order to achieve the above object, the through-hole wiring board of the present invention forms wiring circuit conductor layers on both the front and back surfaces of an insulating substrate,
Provide a hole that penetrates the wiring circuit conductor layer that requires connection,
After applying a conductive resin to the inner wall of the through hole and forming an insulating resist film on both the front and back surfaces of the insulating substrate so that a part of the wiring circuit conductor layer around the through hole is exposed, the inner wall of the through hole is coated with a conductive resin. It is made by depositing a conductive metal layer on the conductive resin layer and the exposed wiring circuit conductor layer by electroless plating.

実施例の説明 以下本発明の実施例を図面を参照しながら詳細に説明す
る。
DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

第2図A−Eは本発明の一実施例におけるスルーホール
配線板の製造方法を訝明するための各製造工程における
印刷配線板の要部断面図である。
FIGS. 2A to 2E are cross-sectional views of essential parts of a printed wiring board in each manufacturing process for understanding the method of manufacturing a through-hole wiring board according to an embodiment of the present invention.

本発明におけるスルーホール配線板は先づ第2図Aに示
すように絶縁基板8の表裏両面に所望の配線回路導体層
9.clを形成する。
The through-hole wiring board according to the present invention first has a desired wiring circuit conductor layer 9 on both the front and back surfaces of an insulating substrate 8, as shown in FIG. 2A. form cl.

本実施例においては、絶縁基板8として紙基材フェノー
ル樹脂2紙基材エポキシ樹脂2紙基板ポリエステル樹脂
、ガラス基材エポキシ樹脂、ガラス基材テフロン樹脂、
ガラス基材ポリイミド樹脂。
In this embodiment, the insulating substrate 8 includes two paper base phenol resins, two paper base epoxy resins, two paper base polyester resins, a glass base epoxy resin, a glass base Teflon resin,
Glass base polyimide resin.

コンポジット樹脂などの合成樹脂基板や、アルミニウム
や鉄などの金属基板をエポキシ樹脂などで絶縁処理した
金属基板を使用し、これらの各種絶縁基板80表裏両面
の全体に銅はくなどの金属は<9.9’を接着すること
により両面銅張積層板を作り、この銅張積層板を用いて
、その表裏両面の銅は<9.9’の不要部分をフォトエ
ツチング法などの公知の方法によって溶解除去し、これ
により各種絶縁基板8の表裏両面に銅はくから成る所望
の配線回路導体9.9’を形成した。
A synthetic resin substrate such as a composite resin or a metal substrate made of aluminum or iron that is insulated with epoxy resin or the like is used, and the entire front and back surfaces of these various insulating substrates 80 are coated with metal such as copper foil <9 A double-sided copper-clad laminate is made by gluing .9', and using this copper-clad laminate, the unnecessary parts of the copper on both the front and back sides of <9.9' are dissolved by a known method such as photo-etching. As a result, desired wiring circuit conductors 9.9' made of copper foil were formed on both the front and back surfaces of various insulating substrates 8.

次に、第2図Bに示すように、絶縁基板8の表裏両面に
形成された接続を必要とする配線回路導体層間9.すに
ドリルや金型を用いたパンチング法によって所定の径を
有する貫通孔1oをあけるとともに、第2図Cに示すご
とく、この貫通孔10の内壁面と、その上下の配線回路
導体層92g′の一部にある程度の導電性を有する導電
性樹脂11を塗布し、加熱硬化させた。この工程におい
て使用した導電性樹脂11は、金、銀、銅、鉄、スズ。
Next, as shown in FIG. 2B, wiring circuit conductor layers 9 that require connections formed on both the front and back surfaces of the insulating substrate 8. A through hole 1o having a predetermined diameter is punched using a punching method using a drill or a mold, and as shown in FIG. A conductive resin 11 having a certain degree of conductivity was coated on a part of the substrate and cured by heating. The conductive resin 11 used in this step is gold, silver, copper, iron, and tin.

亜鉛、ニッケルやそれらの合金から成る金属微粉末を熱
硬化性を有する合成樹脂に均一に混合4分散して作った
比較的低粘度のものであり、これらに使用する金属粉末
は次工程の無電解めっきに対し、触媒核となるものでな
くてはならない。
It has a relatively low viscosity and is made by uniformly mixing and dispersing fine metal powder made of zinc, nickel, or their alloys in a thermosetting synthetic resin. It must serve as a catalyst nucleus for electrolytic plating.

また混合する合成樹脂材料は、使用する絶縁基板との密
着性にすぐれるとともに無電解めっきに対し十分な耐性
を持ち、しかも無電解めっき反応を妨害するような不純
物を含有しないことが必要であり、このような目的に合
致する合成樹脂として本実施例ではエポキシ樹脂に硬化
剤としてアミン系やイミダゾール系酸無水物系のものを
選定し、この樹脂に金属粉としてフレーク状の銀および
銅粉末を約60〜so%の重量比で混合した導電性樹脂
を調整し、この導電性樹脂をシルクスクリーン法やピン
接触法によって貫通孔の内壁面に塗布した。
In addition, the synthetic resin material to be mixed must have excellent adhesion to the insulating substrate used, sufficient resistance to electroless plating, and not contain any impurities that would interfere with the electroless plating reaction. In this example, as a synthetic resin that meets these purposes, an amine-based or imidazole-based acid anhydride-based epoxy resin was selected as a curing agent, and flaky silver and copper powder was added to this resin as a metal powder. A conductive resin mixed at a weight ratio of about 60 to so% was prepared, and this conductive resin was applied to the inner wall surface of the through hole by a silk screen method or a pin contact method.

この場合、貫通孔が導電性樹脂で孔づまりを起すことを
防止しなければならないが、その方法としては導電性樹
脂の粘度をできるだけ低くし、貫通孔に充填した後でそ
の貫通孔をコンプレサーを用いて強風を吹き付ける方法
が有効である。
In this case, it is necessary to prevent the through-hole from clogging with conductive resin, but the method for doing this is to lower the viscosity of the conductive resin as much as possible, fill the through-hole, and then use a compressor to seal the through-hole. An effective method is to blow strong wind.

それから、第2図りに示すように、貫通孔10とその周
辺部の配線回路導体層9.clの一部が露出するように
絶縁基板の表裏両面に耐薬品性を有する樹脂材料により
作られた絶縁レジストを選択的に塗布し、硬化すること
により絶縁レジスト膜12を形成する。
Then, as shown in the second diagram, the wiring circuit conductor layer 9 in the through hole 10 and its surrounding area. An insulating resist film 12 is formed by selectively applying an insulating resist made of a chemical-resistant resin material to both the front and back surfaces of the insulating substrate so that a portion of cl is exposed, and curing the resist.

この工程で使用する絶縁レジスト12としては、次工程
の無電解めっき処理に対し、十分な耐性を有することが
必要であるが、それ以外にンルダーレジストとしての役
目を果す必要があるため、耐熱性や耐絶縁性にすぐれた
特性が要求される。
The insulation resist 12 used in this process needs to have sufficient resistance to the electroless plating treatment in the next process, but it also needs to serve as a heat-resistant resist. Excellent properties are required in terms of strength and insulation resistance.

本実施例では、この目的に合致する絶縁樹脂材料として
、エポキシ樹脂やアクリル系樹脂にアルミナやシリカな
どの無機質充填材を混合したものやエポキシ樹脂とアク
リル樹脂を変性してドライフィルム化したものを用い、
それぞれスクリーン印刷法やフォト法を用いて所望のレ
ジストノ<ターンの形成を行った。
In this example, as an insulating resin material that meets this purpose, we used a mixture of epoxy resin or acrylic resin with an inorganic filler such as alumina or silica, or a dry film obtained by modifying epoxy resin and acrylic resin. use,
Desired resist turns were formed using a screen printing method and a photo method, respectively.

なお、この絶縁レジスト膜の形成工程は貫通孔壁に導電
性樹脂膜を形成した後ではなく、貫通孔をあけた直後の
工程で行なっても良い。
Note that the step of forming the insulating resist film may be performed not after forming the conductive resin film on the wall of the through hole, but immediately after forming the through hole.

このようにして配線回路導体層9,9′の必要個所に絶
縁レジスト膜12を形成した基板は無電解銅めっき液に
浸漬し、第2図Eに示すように貫通孔内壁部の導電性樹
脂層11およびその周辺部の配線回路導体層9.σに金
属銅から成る導電金属層13を析出させる。
The substrate on which the insulating resist film 12 has been formed at the necessary locations of the wiring circuit conductor layers 9, 9' in this way is immersed in an electroless copper plating solution, and as shown in FIG. Layer 11 and its surrounding wiring circuit conductor layer 9. A conductive metal layer 13 made of metallic copper is deposited on σ.

この工程における無電解銅めっきとしては次のような組
成のめっき浴を用い、pH12,5〜13.0に維持し
て3〜5時間浸漬することにより、6〜10μ厚 〔無電解めっき浴〕 硫酸銅 7〜8y/2 EDTA 10−169/It カセイソーダ 8〜10P/Il ホルマリン 3〜6ml/n の銅を析出させた。
For electroless copper plating in this step, a plating bath with the following composition is used, and by maintaining the pH at 12.5 to 13.0 and soaking for 3 to 5 hours, a 6 to 10 μ thick [electroless plating bath] Copper sulfate 7-8y/2 EDTA 10-169/It Caustic soda 8-10P/Il Formalin 3-6ml/n of copper was precipitated.

発明の詳細 な説明したように本発明によるスルーホール配線板は、
絶縁基板の表裏両面に接着した銅はくをエツチングする
ことにより配線回路導体層を形成してから、その両者を
貫通する孔をあけ、その内壁面に導電性の樹脂層を形成
し、しかる後に無電解銅めっきを行なって貫通孔と、そ
の周辺部の配線回路導体層上に金属銅から成る導電層を
析出する方法により作るものである。
As described in detail, the through-hole wiring board according to the present invention has the following features:
A wiring circuit conductor layer is formed by etching copper foil adhered to both the front and back surfaces of an insulating substrate, a hole is made through both, a conductive resin layer is formed on the inner wall surface, and then a conductive resin layer is formed on the inner wall surface. It is made by performing electroless copper plating to deposit a conductive layer made of metallic copper on the through hole and the wiring circuit conductor layer around the through hole.

従って本発明によるスルーホール配線板は従来例に比べ
次のような効果が得られる。
Therefore, the through-hole wiring board according to the present invention has the following effects compared to the conventional example.

■ 電解めっき工程を必要とせず、かつ貫通孔を導通化
するだめの活性化処理は導電性樹脂を用いて乾式プロセ
スにより行なうため、製造工程が簡略化されるとともに
、製造設備においても大がかりなものを必要としない。
■ No electrolytic plating process is required, and the activation process for making the through-holes conductive is performed by a dry process using conductive resin, which simplifies the manufacturing process and requires no large-scale manufacturing equipment. does not require.

■ 導通化を必要とする貫通孔のみに選択的に導電性樹
脂を塗布することができるので、孔加工程が1回で済み
、工数の低減化がはかれる。
(2) Since conductive resin can be selectively applied only to the through-holes that require conductivity, only one hole-machining process is required, reducing the number of man-hours.

■ 貫通孔の内壁面に露出した絶縁基板面は導電性樹脂
で完全に被覆されているため、無電解銅めっき工程にお
いて絶縁基板中に含まれる触媒毒となる不純物がしみ出
し、析出銅の特性のから成る絶縁基板に対しても良好な
導通化が得られるとともに、導電性樹脂層の上には極め
て密着性にすぐれた金属銅が析出するために、使用する
絶縁基板の種類にかかわりなくヒートサイクルによる絶
縁基板の膨張、収縮に対するスルーホール接続の信頼性
はきわめて良い。
■ Since the insulating substrate surface exposed on the inner wall surface of the through hole is completely covered with conductive resin, impurities that act as catalyst poisons contained in the insulating substrate during the electroless copper plating process seep out, and the characteristics of the deposited copper are affected. Good conductivity is obtained even for insulating substrates made of The reliability of through-hole connections against expansion and contraction of the insulating substrate due to cycles is extremely high.

■ 配線回路導体層の形成は比較的うすい金属はく(銅
はく)をエツチングして行なうために、サイドエツチン
グによる回路導体幅の細りが少なく、微細配線化した高
密度スルーホール配線板が得られる。
■ Since the wiring circuit conductor layer is formed by etching a relatively thin metal foil (copper foil), there is less narrowing of the circuit conductor width due to side etching, and a high-density through-hole wiring board with fine wiring can be obtained. It will be done.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図A−Gは従来のスルーホール配線板の製造工程を
説明するだめの主要製造工程における印刷配線基板の要
部断面図、第2図A−Eは本発明の一実施例におけるス
ルーホール配線板の製造方法を説明するだめの主要製造
工程における印刷配線基板の要部断面図である。 8・・・・・・絶縁基板、9.ヴ・・・・・・配線回路
導体層、10・・・・・・貫通孔、11・・・・・・導
電性樹脂層、12・・・・・・絶縁レジスト膜、13・
・・・・・導電金属層(無電解銅層)。
Figures 1A-G are cross-sectional views of main parts of a printed wiring board in the main manufacturing process to explain the manufacturing process of a conventional through-hole wiring board, and Figures 2A-E are through-holes in an embodiment of the present invention. FIG. 3 is a cross-sectional view of a main part of a printed wiring board in a main manufacturing process for explaining a method for manufacturing a wiring board. 8...Insulating substrate, 9. V... Wiring circuit conductor layer, 10... Through hole, 11... Conductive resin layer, 12... Insulating resist film, 13...
...Conductive metal layer (electroless copper layer).

Claims (1)

【特許請求の範囲】 0)絶縁基板の表裏両面に配線回路導体層を形成する工
程、前記接続を必要とする配線回路層を貫通する孔を設
ける工程、前記貫通孔内壁面に導電性の樹脂を塗布する
工程、前記貫通孔周辺部の配線回路導体層の一部が露出
するように絶縁基板の表裏両面の所定の位置に耐無電解
めっき性を有する絶縁レジスト膜を形成する工程、前記
露出した貫通孔とその周辺部の配線回路導体層上に無電
解めっき法により導電金属層を析出する工程から成るこ
とを特徴とするスルーホール配線板の製造方法。 (2)絶縁基板の表裏両面に形成する配線回路導体層は
、金属はくの不要部分を選択的に溶解除去するエツチン
グ法により形成することを特徴とする特許請求の範囲第
1項記載のスルーホール配線板の製造方法。
[Claims] 0) A step of forming a wiring circuit conductor layer on both the front and back surfaces of an insulating substrate, a step of providing a hole penetrating the wiring circuit layer that requires the connection, and a step of forming a conductive resin on the inner wall surface of the through hole. a step of forming an insulating resist film having electroless plating resistance at a predetermined position on both the front and back surfaces of the insulating substrate so that a part of the wiring circuit conductor layer around the through hole is exposed; A method for manufacturing a through-hole wiring board, comprising the step of depositing a conductive metal layer by electroless plating on the through-hole and the wiring circuit conductor layer around the through-hole. (2) The wiring circuit conductor layer formed on both the front and back surfaces of the insulating substrate is formed by an etching method that selectively dissolves and removes unnecessary parts of the metal foil. A method for manufacturing a hole wiring board.
JP4342084A 1984-03-07 1984-03-07 Method of producing through hole circuit board Pending JPS60187094A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4342084A JPS60187094A (en) 1984-03-07 1984-03-07 Method of producing through hole circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4342084A JPS60187094A (en) 1984-03-07 1984-03-07 Method of producing through hole circuit board

Publications (1)

Publication Number Publication Date
JPS60187094A true JPS60187094A (en) 1985-09-24

Family

ID=12663208

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4342084A Pending JPS60187094A (en) 1984-03-07 1984-03-07 Method of producing through hole circuit board

Country Status (1)

Country Link
JP (1) JPS60187094A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006070652A1 (en) * 2004-12-27 2006-07-06 Nec Corporation Semiconductor device and method for manufacturing same, wiring board and method for manufacturing same, semiconductor package, and electronic device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006070652A1 (en) * 2004-12-27 2006-07-06 Nec Corporation Semiconductor device and method for manufacturing same, wiring board and method for manufacturing same, semiconductor package, and electronic device
JPWO2006070652A1 (en) * 2004-12-27 2008-06-12 日本電気株式会社 Semiconductor device and manufacturing method thereof, wiring board and manufacturing method thereof, semiconductor package and electronic device

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