JPS60176293A - Method of producing printed circuit board - Google Patents

Method of producing printed circuit board

Info

Publication number
JPS60176293A
JPS60176293A JP3182284A JP3182284A JPS60176293A JP S60176293 A JPS60176293 A JP S60176293A JP 3182284 A JP3182284 A JP 3182284A JP 3182284 A JP3182284 A JP 3182284A JP S60176293 A JPS60176293 A JP S60176293A
Authority
JP
Japan
Prior art keywords
hole
holes
nickel plating
electroless nickel
conductive paint
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3182284A
Other languages
Japanese (ja)
Inventor
喜義 大坂
刈屋 憲一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Shin Kobe Electric Machinery Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Kobe Electric Machinery Co Ltd filed Critical Shin Kobe Electric Machinery Co Ltd
Priority to JP3182284A priority Critical patent/JPS60176293A/en
Publication of JPS60176293A publication Critical patent/JPS60176293A/en
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は、スルホールの形成している金属により発生す
るスルホール間の電食反応を防止した印刷配線板の製造
法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a printed wiring board that prevents electrolytic corrosion reaction between through holes caused by the metal forming the through holes.

近年の電子機器分野の発展に伴ない、民生用電子機器分
野においても、小型、軽量、高信頼性の追求が盛んにな
ってきた。印刷配線板も電子デバイスと同様、高密度配
線化、高密度実装が行なわれる様になり、現在では両面
スルホール回路基板の使用も活発になってきた。特に、
民生用機器分野では、産業用機器分野と異なり、信頼性
と同時に価格及び量産性が問題とされる。
BACKGROUND OF THE INVENTION With the recent development of the electronic equipment field, the pursuit of smaller size, lighter weight, and higher reliability has become active in the consumer electronic equipment field as well. Similar to electronic devices, printed wiring boards are becoming more densely wired and mounted, and double-sided through-hole circuit boards are now increasingly being used. especially,
In the field of consumer equipment, unlike the field of industrial equipment, issues include not only reliability but also price and mass productivity.

通常、スルホール回路板のスルホールは銅メッキにより
導通を図っているが、現在では、更に安価でかつ量産性
に富む導電性塗料によりスルホールの導通を図る方法が
行なわれるようになってきた。
Normally, the through-holes of a through-hole circuit board are made conductive by copper plating, but now a method of making the through-holes conductive is using conductive paint, which is cheaper and easier to mass-produce.

しかし、前記印刷配線板の製造方法には次の如き問題点
がある。すなわち、導電性塗料で形成されたスルホール
の導電層は、複数のスルホール間の電位差及びスルホー
ル基板周囲の湿度、温度等によりスルホール間で電食反
応を起し、高電位のスルホールよシ低電位のスルホール
へ向ってイオン化した導電性塗料中の金属が印刷回路板
の電気絶縁層中へ溶は出し、最終的にはスルホール間が
短絡する。この電食反応を防止−する方法は、種々提案
されてきたが完全なものはない。
However, the method of manufacturing the printed wiring board has the following problems. In other words, the conductive layer of the through-holes formed with conductive paint causes an electrolytic corrosion reaction between the through-holes due to the potential difference between the multiple through-holes and the humidity and temperature around the through-hole substrate, causing the through-holes with a high potential to become oxidized by the through-holes with a low potential. The ionized metal in the conductive paint moves toward the through-holes and dissolves into the electrical insulation layer of the printed circuit board, eventually causing a short circuit between the through-holes. Various methods have been proposed to prevent this electrolytic corrosion reaction, but none are perfect.

本発明は、スルホール間の電食反応を防止した印刷配線
板の製造法を提供することを目的とする。
An object of the present invention is to provide a method for manufacturing a printed wiring board that prevents electrolytic corrosion reactions between through holes.

本発明の詳細を図面を用い説明する。The details of the present invention will be explained using the drawings.

まず電気絶縁層1を介し両面に銅箔2−a12−bを有
する両面鋼張り積層板の所望の位置にスルホール3を明
ける(第1図)。しかる後、スルホール3の壁面に無電
解ニッケルメッキ層4を析出させ(第2図)、次に両面
銅張り積層板の銅箔2−a、2−bを、常法のエツチン
グ法等を用い所望の回路2’ −a 、 2’ −bと
する(第3図)。しかる後、前記無電解ニッケルメッキ
層4上に金属粉末を主成分とする導電性塗料層5を設け
、スルホールに電気導通信頼性を付与しスルホール回路
板を得る。本発明の詳細は以上の如き印刷配線板の製造
方法である。
First, a through hole 3 is made at a desired position in a double-sided steel-clad laminate having copper foils 2-a12-b on both sides through an electrically insulating layer 1 (FIG. 1). After that, an electroless nickel plating layer 4 is deposited on the wall surface of the through hole 3 (Fig. 2), and then the copper foils 2-a and 2-b of the double-sided copper-clad laminate are etched using a conventional etching method or the like. The desired circuits are set as 2'-a and 2'-b (Fig. 3). Thereafter, a conductive paint layer 5 containing metal powder as a main component is provided on the electroless nickel plating layer 4 to impart electrical continuity reliability to the through-holes, thereby obtaining a through-hole circuit board. The details of the present invention are a method for manufacturing a printed wiring board as described above.

第2図にて、スルホール3の壁面に無電解ニッケルメッ
キ層4を設けたが、これは金属ニッケルの極めて電食反
応を起しにくい性質を利用しようとするものであり、す
なわち第4図のように金属粉末を主成分とする導電性塗
料層5の下地に無電解ニッケルメッキ層4を設ける事は
、スルホール間における金属粉末を主成分とする導電性
塗料の電食反応を防止するものである。
In Fig. 2, an electroless nickel plating layer 4 is provided on the wall surface of the through hole 3, but this is intended to take advantage of the property of metallic nickel that is extremely resistant to electrolytic corrosion reactions, that is, as shown in Fig. 4. Providing the electroless nickel plating layer 4 on the base of the conductive paint layer 5 whose main component is metal powder as shown above prevents the electrolytic corrosion reaction of the conductive paint whose main component is metal powder between the through-holes. be.

また、無電解ニッケルメッキ層4の厚さであるが、通常
0.4μ程度であれば導電性塗料に用いられる金属粉末
の電食反応は起らないが、ニッケルメッキ層の厚みと電
食反応発生の関係は、無電解ニッケルメッキ層のメッキ
条件によっても異なるので特に限定しない。まだ、導電
性塗料は、スルホール全体に充填するように用いてもよ
い。
In addition, if the thickness of the electroless nickel plating layer 4 is about 0.4μ, the electrolytic corrosion reaction of metal powder used in conductive paint will not occur, but the electrolytic corrosion reaction will occur depending on the thickness of the nickel plating layer. The relationship in occurrence varies depending on the plating conditions of the electroless nickel plating layer, so it is not particularly limited. However, the conductive paint may be used to fill the entire through hole.

次に、本発明の詳細な説明する。Next, the present invention will be explained in detail.

実施例 市販の厚さ1.6鰭のガラス布基材エポキシ樹脂両面銅
張り積層板に、まずスルホール用ドリル穴を形成した。
Example First, drill holes for through-holes were formed in a commercially available glass cloth-based epoxy resin double-sided copper-clad laminate having a thickness of 1.6 fins.

次に、シブレイ・ファーイスト■の無電解ニッケルメッ
キプロセスにて前記スルホールに無電解ニッケルメッキ
を施した。すなわち、ドリル穴明は後高圧洗浄装置にて
穴内の洗浄を行ない、基板の脱脂等を目的として55°
Cに保温されたクリーナーPM−900に5分間浸漬、
続いてエッチPM−940を14.水3ぷ、硫酸(66
ボーメ)0.5.6.三酸化クロムl、 8 kyの比
率で建浴した酸性表面調整液に液温60°Cで5分間浸
漬し、次にキャタリス)9Fを1!、水Q、751、塩
酸0.25Aの比率で建浴したキャタリストに液温20
°Cで5分間浸漬し、続いて10%(体積比)に稀釈し
たキューボジットアクセレレーターに液温45°Cで2
分間浸漬した後、キー−ポジット無電解ニッケルPM−
980を12、水6Jの比率でかつ水酸化アンモニウム
でpHを9に調整した無電解ニッケルメッキ液に液温3
0”Cで10分間浸漬し、スルホール壁面に厚さ0.4
μの無電解ニッケルメッキ層を得た。次に、両面鋼張り
積層板の銅箔を所望の回路となる様に塩化第二銅を用い
、エツチング除去した。更に、無電解ニッケルメッキ層
上に銀粉末が主成分である導電性塗料を塗布し、しかる
後前記導電性塗料を硬化させる為130°Cで3時間加
5図に示すもので、スルホール数2個、スルホール間隔
2.5 m 、スルホール穴径0.9w*スルホールラ
ンド外径1,2簡なるもので2つのスルホールは導通し
ていない。
Next, electroless nickel plating was applied to the through holes using the electroless nickel plating process of Sibley First ■. In other words, after drilling a hole, the inside of the hole is cleaned using a high-pressure cleaning device, and the hole is cleaned at a 55° angle for the purpose of degreasing the board.
Immerse for 5 minutes in cleaner PM-900 kept warm at C.
Next, etch PM-940 for 14. 3 pu of water, sulfuric acid (66
Baume) 0.5.6. Immerse in an acidic surface conditioning solution prepared at a ratio of 1,8 ky of chromium trioxide at a temperature of 60°C for 5 minutes, then apply 9F (catalyst) to 1! , water Q, 751, and hydrochloric acid 0.25A in the ratio of catalyst and liquid temperature 20
5 minutes at 45 °C and then immersed in a 10% (by volume) diluted Cubozit accelerator for 2 hours at a liquid temperature of 45 °C.
After soaking for a minute, keyposite electroless nickel PM-
Electroless nickel plating solution with a ratio of 980 to 6 J of water and pH adjusted to 9 with ammonium hydroxide at a temperature of 3.
Immerse at 0"C for 10 minutes and apply a layer of 0.4mm to the through-hole wall.
An electroless nickel plating layer of μ was obtained. Next, the copper foil of the double-sided steel-clad laminate was etched away using cupric chloride so as to form a desired circuit. Furthermore, a conductive paint containing silver powder as a main component was applied on the electroless nickel plating layer, and then the conductive paint was cured at 130°C for 3 hours, as shown in Figure 5, and the number of through holes was 2. The through-hole spacing is 2.5 m, the through-hole diameter is 0.9 w * the through-hole land outer diameter is 1.2 m, and the two through-holes are not electrically connected.

比較例 実施例と同じ両面銅張り積層板を用いスルホール用ドリ
ル穴を形成した。次に両面銅張り積層板の銅箔を実施例
の回路と同じになる様塩化第二銅を用いエツチング除去
し、しかる後無電解ニッケルメッキ層を設けず、他は実
施例と同一方法にて銀粉末が主成分である導電性塗料層
をスルホール壁面に設はスルホール回路板を得た。
Comparative Example A drill hole for a through hole was formed using the same double-sided copper-clad laminate as in the example. Next, the copper foil of the double-sided copper-clad laminate was removed by etching using cupric chloride so that it became the same as the circuit of the example, and then the electroless nickel plating layer was not provided, but the other steps were the same as in the example. A conductive paint layer containing silver powder as a main component was provided on the through-hole wall to obtain a through-hole circuit board.

実施例、比較例で得られた回路板を下記試験条件で処理
し、スルホール間の絶縁抵抗の経時変化を測定した。
The circuit boards obtained in Examples and Comparative Examples were processed under the following test conditions, and changes over time in insulation resistance between through-holes were measured.

処 理:60“C90%FLH 印加電圧:40V(1)O) 第6図に試験結果を示す。Processing: 60"C90%FLH Applied voltage: 40V(1)O) Figure 6 shows the test results.

第6図で明らかなように、本発明にて得られたスルホー
ル回路板は、スルホール間の電食反応の防止が成され、
信頼性は著しく向上したつまた、本発明は、従来の銅ス
ルホールメッキ回路板の製造方法と比較し、スルホール
の導通を導電性塗料の塗布により得る事から安価に1か
つ量産性に富むものであり、本発明の工業的価値は極め
て大と判断する。
As is clear from FIG. 6, in the through-hole circuit board obtained by the present invention, the electrolytic corrosion reaction between the through-holes is prevented.
In addition to significantly improved reliability, the present invention is cheaper and more easily mass-produced than the conventional manufacturing method for copper through-hole plated circuit boards, as conduction through the through-holes is achieved by applying conductive paint. Therefore, it is judged that the industrial value of the present invention is extremely large.

【図面の簡単な説明】[Brief explanation of drawings]

第1図乃至第4図は本発明圧よる印刷配線板の製造工程
を示す要部断面図、第5図は印刷配線板の電食反応の発
生を確認するためのテストパターンの平面図、第6図は
本発明の実施例と比較例で得た印刷配線板のスルホール
間の絶縁抵抗の経時変化を示す曲線図である。 lは電気絶縁層、2−a、2−bは銅箔、2’−a、2
’−bは回路、3はスルホール、4はニッケルメッキ層
、5は導電性塗料層
1 to 4 are cross-sectional views of main parts showing the manufacturing process of a printed wiring board using the pressure of the present invention; FIG. 5 is a plan view of a test pattern for confirming the occurrence of an electrolytic corrosion reaction on a printed wiring board; FIG. 6 is a curve diagram showing changes over time in insulation resistance between through-holes of printed wiring boards obtained in Examples of the present invention and Comparative Examples. l is an electrical insulating layer, 2-a, 2-b are copper foils, 2'-a, 2
'-b is a circuit, 3 is a through hole, 4 is a nickel plating layer, 5 is a conductive paint layer

Claims (1)

【特許請求の範囲】[Claims] 両面銅張り積層板の所望の位置にスルホールを形成し、
しかる後当該穴壁面に無電解ニッケルメッキを析出させ
、ついで両面銅張9積層板の銅箔の不必要部を除去し所
定の回路とし、しかる後前記スルホールの無電解ニッケ
ルメッキ層上に金属粉末が主成分である導電性塗料層を
形成する事を特徴とした印刷配線板の製造法。
Form through-holes at desired positions on the double-sided copper-clad laminate,
After that, electroless nickel plating is deposited on the wall surface of the hole, unnecessary parts of the copper foil of the double-sided copper-clad 9-layer board are removed to form a predetermined circuit, and then metal powder is deposited on the electroless nickel plating layer of the through hole. A method for manufacturing printed wiring boards characterized by forming a conductive paint layer whose main component is
JP3182284A 1984-02-22 1984-02-22 Method of producing printed circuit board Pending JPS60176293A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3182284A JPS60176293A (en) 1984-02-22 1984-02-22 Method of producing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3182284A JPS60176293A (en) 1984-02-22 1984-02-22 Method of producing printed circuit board

Publications (1)

Publication Number Publication Date
JPS60176293A true JPS60176293A (en) 1985-09-10

Family

ID=12341773

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3182284A Pending JPS60176293A (en) 1984-02-22 1984-02-22 Method of producing printed circuit board

Country Status (1)

Country Link
JP (1) JPS60176293A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6184893A (en) * 1984-10-03 1986-04-30 沖電気工業株式会社 Silver through hole printed circuit board

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5271680A (en) * 1975-12-11 1977-06-15 Matsushita Electric Ind Co Ltd Printed circuit board and method of producing same
JPS5662390A (en) * 1979-10-26 1981-05-28 Matsushita Electric Ind Co Ltd Printed circuit board
JPS56135996A (en) * 1980-03-03 1981-10-23 Schering Ag Method of chemically and/or electrically selectively depositing metal film and method of producing printed wire

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5271680A (en) * 1975-12-11 1977-06-15 Matsushita Electric Ind Co Ltd Printed circuit board and method of producing same
JPS5662390A (en) * 1979-10-26 1981-05-28 Matsushita Electric Ind Co Ltd Printed circuit board
JPS56135996A (en) * 1980-03-03 1981-10-23 Schering Ag Method of chemically and/or electrically selectively depositing metal film and method of producing printed wire

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6184893A (en) * 1984-10-03 1986-04-30 沖電気工業株式会社 Silver through hole printed circuit board

Similar Documents

Publication Publication Date Title
US6563057B2 (en) Printed circuit board and method for manufacturing same
KR850001363B1 (en) Method for manufacturing a fine patterned thick film conductor structure
CN104349581B (en) Wired circuit board and its manufacture method
JPS6142993A (en) Method of forming conductor layer to resin
CN111405774B (en) Circuit board and manufacturing method thereof
CN105792533A (en) Manufacturing method of PCB and PCB
CN103781292A (en) Circuit board and manufacturing method thereof
JPH05327224A (en) Manufacture of multilayer wiring board and multi-layer wiring board manufactured by the manufacture
JPS60176293A (en) Method of producing printed circuit board
US3171796A (en) Method of plating holes
KR930000639B1 (en) Manufacturing method of multi layer printed circuit board
JPH1079568A (en) Manufacturing method of printed circuit board
JPS648478B2 (en)
US3433719A (en) Plating process for printed circuit boards
JPS59155994A (en) Method of producing printed circuit board
KR830002578B1 (en) Fine-patterned thick film conductor structure and manufacture method thereof
KR100468195B1 (en) A manufacturing process of multi-layer printed circuit board
JPH0555750A (en) Multilayer printed circuit board and manufacture of the same
JPS6167289A (en) Method of producing printed circuit board
CN111447753A (en) Circuit board and manufacturing method thereof
GB1145771A (en) Electrical circuit boards
JPS61107797A (en) Manufacture of two-sided wiring board
JPH0669634A (en) Manufacture of printed wiring board
JPS60187094A (en) Method of producing through hole circuit board
JPS60187095A (en) Method of producing through hole circuit board