JPS60160393A - Drive circuit for motor - Google Patents

Abstract

PURPOSE:To prevent a passing current from flowing when an input signal varies by connecting an auxiliary transistor with the base of transistors for flowing exciting currents to motor windings, and inputting an inverted signal to the bases of the transistors and auxiliary transistors. CONSTITUTION:When an input signal phi1 varies from H level to L level, an inversion signal phi1 also varies from L level to H level. A transistor Q1 does not immediately becomes OFF during the storing time TD1 but remain ON, while a transistor Q2 tends to immediately becomes OFF. However, since the transistor Q6 is ON during the storing time TD6, the transistor Q2 does not immediately become ON. Since TD6 TD1, the transistors Q1 and Q2 do not simultaneously become ON, and the passing current does not flow.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a motor drive circuit for bipolar drive step motors, direct current motors, and the like.

[Technical background of the invention and its problems]

In recent years, step motors used in floppy disk devices, printer devices, and the like have become smaller and have greater driving force as the overall devices have become smaller. There are two drive systems for step motors: a unipolar drive system in which the direction of the excitation current flowing through the stator winding is constant, and a bipolar drive system in which the direction of the excitation current is two directions, positive and negative. Piper drive systems are often used, which can effectively use windings and reduce size.

FIG. 1 shows a conventional bipolar drive type motor drive circuit. In FIG. 1, only the circuit for one motor winding L is shown. More similar circuits are required depending on the number of motor windings. Transistors Q/ and Q2 and transistors Q3 and Qhiro are connected to both ends of the motor winding 111 inches, respectively. These transistors Q/ and Ql
and Q3 and Q4' are connected in series and the power supply V. It is inserted between 0 and ground. The input signal φ/ is inputted to the paces of transistors Q/ and Q1≠ through n drivers DR/ and DR2f, respectively, and the input signal φ/ is inputted to the paces of transistors Q2 and Q4' through drivers DR3 and DRg, respectively.
An input signal φ/ which is an inversion of the input signal φ/ is input.

When the input signal φ is at the H level, the input signal is at the φ/iL level, transistors Q/ and Q≠ are turned on, and transistors Q2 and Q3 are turned off. Therefore motor winding LK
A rightward current, 1L1, flows. Conversely, the input signal φ/ is L
In the case of high level, input signal φ/ is at H level, transistors Q/ and Q≠ are turned off, and transistors Q2 and Q3 are turned on. Therefore, the current I in the opposite direction flows through the motor winding Ln.
L2 flows. In this way, the direction t! of the current flowing to the motor winding Ln due to the input signals φ/, φ/ is determined. ! On the contrary, bipolar drive is possible.

However, the storage time t when the transistor changes from on to off is much longer than when it changes from off to on. For this reason, the second
As shown in the figure, when the input signal φ/ changes from the L level to the H level, the transition of the transistors Q and 2 from on to off is delayed by the accumulation time tstrg.
There is a time when transistors Q/ and Q,2 and Q3 and Q,4t are on at the same time, and the power supply V. There was a problem in that a through current of 1 s flows from 0 to ground. Since this single current 1S is not limited by external elements, it becomes an extremely large voltage, and the transistors Q/+Q,2,Q3. Q
There was a risk that l and t would be destroyed. Also, even if the transistors Q/, Q2゜Q, 3, and Q are not destroyed,
Pulse-like shell communication (3) There was a risk that the circuit would malfunction due to the current 18.

For this reason, conventionally, the control circuit shown in FIG. 3 outputs the input signal φ/ at the timing shown in FIG.

φ/' was controlled to prevent the occurrence of a single current of 1.

That is, the rise of the input signal φ/ is delayed by approximately the accumulation time t from the fall of the input signal φ/, and the fall of the input signal C7 is delayed by approximately the accumulation time t from the rise of the input signal φ/. Transistors Q/ and Q, 2 and Q, and 3 and Q+ were prevented from turning on at the same time, thereby preventing the generation of through current 18.

The input signal φ/2 is input as shown in FIG.

A method was also adopted in which a resistor R and a capacitor were added to the signal # of φ and φ to delay the rise of the signal for several months and prevent the generation of a single current of 1 s.

However, according to such conventional methods, the control of the input signals φ/, φ/', φ, and φλ' is complicated, additional parts are required, and the control circuit/motor drive is complicated. There was a problem in that twice as many signal lines as the number of phases were required between the circuit λ and the circuit λ.

(4') [Object of the Invention] The present invention has been made in consideration of the above circumstances, and provides a complete motor drive circuit that does not generate a single current even with input signals and inverted signals that do not require timing adjustment. The purpose is to provide.

[Summary of the invention]

In order to achieve this object, the motor drive circuit according to the present invention connects all the auxiliary transistors to the paces of each transistor that flows the excitation current N to the motor windings, and the paces of each auxiliary transistor have their own By inputting all signals that are inverted from the pace of the connected transistors, generation of through current when the direction of the excitation current is reversed is prevented.

[Embodiments of the invention]

A motor drive circuit according to an embodiment of the present invention is shown in FIG. FIG. 6 shows a circuit for one motor winding, and the number of circuits corresponding to the number of motor windings is required. Power supply■
. Transistors Q/ and Q connected in series between 0 and ground
, 2, and a transistor string starting from transistors Q3 and Q+ connected in series are inserted. Both ends of the motor winding L are connected to the connection midpoints of these transistor rows, that is, the connection point between the emitter of transistor Q/ and the collector of transistor Q,2, and the connection point between the emitter of transistor Q3 and the collector of transistor q4. ing. An input signal φ/ is inputted to the paces of transistors Q/ and Q4' through dry nodes DR/ and DR4', respectively, and an input signal φ/ is inputted to the paces of transistors Q2 and Q3 through drivers DR2 and DRJ'i, respectively. An inverted signal that is an inversion of the signal φ/ is input.

In this embodiment, each transistor Q/, Q2+Q3+
Auxiliary transistors Qs, Q, t + Q7
It is characterized by the provision of rQr. These auxiliary transistors Q! ,CtA ,Q,7 ,Q is the transistor Q/,Q,2. Q3. It is provided to delay the change of Q4' from off to on. Auxiliary transistor Q at the pace of transistor Q, /! The collector of QJ is connected, and the emitter of auxiliary transistor QJ is grounded. The inverted signal φ/ of the input coefficient φ/ input to the pace of the transistor column No. is input to the pace of the auxiliary transistor Qj. Similarly, transistor Q2
Auxiliary transistors Q and J whose emitters are grounded are also connected to the auxiliary transistor QA.
An input signal φ/ is input to the pace. The collectors of auxiliary transistors Q7 and QJ' are also connected to the bases of transistors Q3 and Q4', respectively. This 1.
Also input to the auxiliary transistors Q7 and Q, and to the transistors Q7 and Q, are inverted signals of the signals input to the paces of the transistors Q3 and Q≠ to which they are connected. These jL auxiliary transistors Q, t, QA, Q7. It is certain that the storage time of Q is equal to or longer than the storage time of transistors Q, Q, Q, 2, Q3, and Q. More precisely, the auxiliary transistor Q! has an accumulation time of 727,792 or more times, auxiliary transistor Q6 has an accumulation time of 29 times or more, and auxiliary transistor Q7 has an accumulation time of more than 29 days.
has a storage time longer than the transistor Qhiro, and the auxiliary transistor Q♂ has a storage time longer than the transistor Q3(7).

Next, the operation will be explained using FIG. 7. Input signal φl is H
When the level is low, the inverted φ/ is at the L level, transistors Q/ and Q≠ are turned on, and transistors Q2 and Q3 are turned on.
turns off. Then, a rightward current IL1 flows through the motor winding L. Conversely, when input signal φ/ is at L level, inverted signal φ/ is at H level and transistor Q
/ and Q4' are turned off, and transistors Q, 2 and Q3 are turned off. Therefore, the leftward current iL in the motor winding L!
is misrepresented.

Now, when the input signal φ/ changes from the H level to the L level lI'c at time T1, the inverted signal φ also changes from the L level to the H level at the same time. Transistor Q/ does not immediately turn off during the storage time TD/ and remains on at tt even when the input signal φ/ to the pace changes from the ■ level to the L level. With respect to this fL, the transistor Q,2 tends to change from off to on. However, an auxiliary transistor Q6 is connected to the pace of these transistors Q and 2, and the auxiliary transistor Q and A have "its accumulation time T".
Since 111 of DA is on (lr), the potential of the pace of transistor Q2 does not go to H level, and transistor Q2 does not turn on immediately, but turns on only after the accumulation time TDA of auxiliary transistor Q6. Since T D t > T D /, transistors Q/ and Q2 cannot be turned on at the same time, and no communication current flows.

The same holds true when the input coefficient φ/ changes from the L level to the H level at time T2. Transistor Q2 remains on during the storage time TD, 2, which is turned off even when the pace inversion signal φ/ changes steadily from H level to L level. On the other hand, since the transistor Q/ is changing from off to on, it immediately turns on when the pace changes from L level to H level. However, the 62nd auxiliary transistor QJ connected to the pace of transistor Q/ is at time T2.
Even after the accumulation time TDj...1 is on, even though the input signal φ/ changes from the L level to the H level, the pace 'M' of the transistor Q/ does not decrease at all. It turns on for the first time after the accumulation time TDj. TDj〉
Since it is TDj, the transistors Q/ and Q,2 are not turned on at the same time, and there is no negative total current f.

Even if there is only one transistor Q3 and Q4'i/(f+), since auxiliary transistors Q7 and Q♂ are provided, they will not turn on at the same time, and no negative total current will flow.

As described above, according to this embodiment, the negative total current does not flow even without adjusting the timing of the input signals φ/ and φ/.

A motor drive circuit according to another embodiment of the present invention is shown in FIG. g. This embodiment is almost the same as the previous embodiment, but differs in that the inverted signal φ/full signal is taken on the motor drive circuit side using an impermeator NVi. In particular, it is necessary to adjust the timing, so this is a more advanced method. Therefore, in the case of the motor drive circuit, since only the input signal φ/ needs to be input, in the case of the ) phase, the phase between the control circuit / and the motor drive circuit 2 is The number can be halved to just two.

In the previous embodiment, the λ phase was used, but the same applies to a motor with more multiple phases. The transistor array for flowing the excited excitation type N is composed of one transistor on both the power supply side and the ground side.1. However, with two or more transistors #
It may be made into 4 parts. Installing multiple transistors in parallel
can be made to have a large excitation gi'fJ Although it is composed of transistors, it may also be composed of pnp (pnp) transistors.

Further, the motor drive circuit of the present invention can be used as a drive circuit for a DC motor other than a step motor if it is of a bipolar drive type.

〔Effect of the invention〕

As described above, according to the present invention, even if the input signal and its internal number are simply inverted, the negative sum j2 will not flow when the logic level of the input signal changes. As a result, the transistor may be destroyed or 1. The circuit reliability is improved without the occurrence of e-Rus-like interdigitation. Furthermore, since the entire inverted signal can be written simply by inverting the input coefficient, the total number of signal lines between the control circuit and (//) can be reduced. Therefore, it is possible to reduce the number of bins when creating an integrated circuit, making circuit design easier and reducing costs. It can be measured.

[Brief explanation of the drawing]

Figures 7, 3, and 5 are diagrams showing conventional motor drive circuits, Figures 2 and ≠ are time charts of the same motor drive circuit, and Figure 6 is a motor drive according to an embodiment of the present invention. Figure 7 is a circuit diagram of the circuit, Figure 7 is a time chart of one large motor drive circuit, Figure g is a circuit diagram of a motor drive circuit according to another embodiment of the present invention, and Figure 3 is a time chart of the same motor drive circuit. It is. Q' r Q, 2+ Q3* Qμ...Transistor, Q,,t. QA, Q, 7, QJ'・=-auxiliary transistor, DR/. DR2, DR3, DH4t...driver, engineering NV...
・Innovators. Applicant's agent Boar (/2) Figure 2 S d1 valley each Is -C' [F] 0000 (j

Claims (1)

[Claims] - a first transistor array having two transistors connected in series, each having a first transistor array and a first transistor array inserted between a source and a ground, between the connection midpoints of these first and second transistor arrays; insert a motor winding into the circuit, input the same input signal to the transistors on the power supply side of the first transistor row and the transistors on the ground side of the second transistor row, and input the same input signal to the power supply side transistor of the first transistor row. By inputting all the inverted signals of the input signal to the transistors of the transistor and the transistor on the ground side of the first transistor row, and changing the potential of the input signal, excitation current is applied to the motor windings in both conformal directions. In a bipolar drive type motor drive circuit, an auxiliary transistor whose storage time is longer than that of the transistor is connected to the pace of each of the transistors, and the pace of the auxiliary transistor is connected to the pace of the transistor to which it is connected. A motor drive circuit characterized in that the transistors in each transistor array are prevented from being turned on at the same time by inputting all inverted signals of the signals input to the pace.