JPS60152117A - Schmitt circuit - Google Patents

Abstract

PURPOSE:To attain waveform shaping of an input signal without malfunction by connecting an MOSFET whose drain and gate are connected and operated at the saturation region and an MOSFET to which an inverting signal of an output of an inverter is inputted in parallel to obtain a hysteresis. CONSTITUTION:Since a node (a) is at 5V with an FETQ2 turned off when an input IN is 0V, an FETQ6 is turned on and an output OUT is at 0V. When the input starts increasing and it exceeds the sum of the threshold values VTH of the FETQ2, Q3, the potential at the node (a) starts descending, the FETQ6 is turned off and the output OUT is increased. Then an FETQ4 is turned on by the output OUT and the level of nodes a, b fall down to 0V. When the input IN starts descending from 5V conversely, since the FETQ2 is turned on even at the arrival at the change point at the rising, the output OUT is unchanged and when the potential descends further and is lower than the threshold value of the FETQ2, the FETQ2 starts being turned off, and when the potential at the node (a) exceeds the threshold value of the FETQ6, the FETQ2 is turned on, the output OUT goes to 0V and the change point of the falling is only the threshold value of the FETQ2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a Schmitt circuit having hysteresis characteristics with respect to an input signal.

[Technical background of the invention and its problems]

The conventional Schmitt circuit, as shown in FIG.
An input signal IN is applied to the set input of the flip-flop configured by D circuit G4I and Gj through an inverter G/.
Input and reset human power RIC, two inverters GJ
, GJ to input the input signal IN manually. Threshold value V1 of inverter G/ and inverter GJ
The threshold value v2 is configured to have a so-called hysteresis characteristic such that Vl>V2.

Next, the operation when an input signal IN as shown in FIG. 2 is inputted will be explained. When the input signal IN rises from Ov and exceeds the threshold value v2 of the inverter G at time t1, the output of the inverter G3, that is, the reset manual power i becomes jVI
I1m changes, but since the output of the inverter G/, that is, the set human power S does not change, the output signal OUT remains Ov and does not change. , the sect human power S changes to Ov, and the output signal OUT! ■Changes to.

Next, when the input signal IN that has risen at KjV-4 starts to fall and becomes lower than the threshold value v1 at time t5, the set human power g becomes j
V, but since the reset human power R remains at jV, the output signal OUT! ■ remains unchanged. Human signal IN
further decreases and becomes lower than the threshold value v2 at time t11, the reset human power R changes by OIC, and the output signal OUT becomes j
Changes from V to Ov.

In this way, when the human input signal IN rises, the threshold value ■1
The output signal OUT changes at , and when it falls, the threshold value v
2, the output signal OUT changes.

However, such a conventional Schmitt circuit can be
S) When constructed using transistors, the number of elements increases, and when integrated circuits are formed, a large pattern area is required.

For example, in the 7-chip circuit shown in Figure m1, /l/, several NMOS) transistors are required. Furthermore, when shaping a noisy human signal, it is necessary to increase the difference between the threshold values v1 and v2 to prevent malfunctions. However, in order to change the threshold value of the inverter, it is necessary to change the size ratio of the load MO8) transistor and the drive MO8) transistor, and there is a limit to the range of variation.
It was difficult to obtain a threshold difference of 7 or more. There is also the problem that changing the size ratio of the transistors increases the baggage area.

[Purpose of the invention]

The present invention has been made in consideration of the above circumstances, and it is an object of the present invention to provide a Schmitt circuit that can shape a noisy human input signal without malfunction and can be configured with a small number of elements.

[Summary of the invention]

To achieve this objective, the Schmitt circuit according to the present invention operates in the saturation region by connecting the drain and the gate.
MOS) transistor and a second MO8I transistor whose gate receives an inverted signal of the output signal of the inverter are connected in parallel and inserted between the inverter and the radio wave to provide hysteresis to the human input signal to the inverter. It is configured to have h.

[Embodiments of the invention]

A Schmitt circuit according to a first embodiment of the present invention is shown in FIG. This Schmitt circuit is composed of NMOS. Depletion type MOS transistor Q/ for load and enhancement 1M08) transistor Q, 2 for drive
MOS) transistors Q3 and Q4' are added to the inverter I/, which is composed of the following. These MO8I transistors Q3 and Ql are connected in parallel and inserted between the source of the MOS transistor Q and ground. One M
OS) The transistor Q3 has its drain and gate connected and operates in the saturation phase region. the other MO8I
- The inverted signal of the inverter I10 is input to the gate of the transistor Q4'. That is, an inverter IJ consisting of a depletion type MOS transistor Qj for load and an enhancement type MO8) transistor Q6 for driving is provided, and the output signal OUT of this inverter IJ is inputted to the gate of MOS transistor Q4'. Input signal IN is input to inverter I/, and shaped output signal OUT is output from inverter 12.

Next, the operation will be explained. Van = t v, V, , = O
Let it be V. When the input signal IN is OV, the MOS transistors Q and 2 are turned off, so the output of the inverter xl, that is, the potential of the node a, is 11! ■It is.

Therefore, the MOS transistor QJ is turned on, and the output signal OUT is approximately Ov. Therefore, MOS transistor Q4I is off. Even if the input signal IN rapidly rises from OV and exceeds the threshold b value v'rii of the driving MOS) transistor Q-, the MOS) transistor Q
3 is connected, the potential of node a does not decrease, and the potential of node a begins to decrease only when the input signal IN becomes larger than the sum of the thresholds of MO8I - transistors Q2 and Q3. , MOS1-transistor Q6
is turned off, and the output signal OUT rises. That is, M.O.
By the threshold b value of the S transistor Q3, the imperta
This means that the threshold has increased. When the output signal OUT rises, the MO using this output signal OUT as the gate power
S) Transistor Q4 (turns on, and the potential of nodes a and b decreases by 1tttOVIlc!.If MOS) transistor Q4' is not present, the potential of node b will not fall below the threshold of transistor Q3, and MOS Transistor Q7 tends to turn on and cannot operate stably.

Next, the human power signal IN drops from jV:! Easy to use, MO
S) Since transistor Q& is turned on and node B is at IJOV, MO8I-ransistor Q remains on for N minutes even if the change at the time of startup of manually powered ID No. d IN is turned on, and the output signal OUT does not change. The input signal IN further decreases, and the transistor Q! When the b value becomes lower than the threshold b value, MOS) transistors Q and 2 begin to turn off, and node a
The potential of begins to rise. The mountain of node a, the position is MOS)
When the threshold of transistor Q6 is exceeded, it turns on and the output signal O
UT becomes OV. That is, when the human input signal falls, the threshold value of the inverter I/ is approximately the threshold value of the MOS transistors Q and 2.

In this way, the Schmitt circuit according to this practical example has a hysteresis characteristic as shown in FIG. This hysteresis width VH is a) 1MO8) transistor Q3
This corresponds to 1xl+M, which is a sufficiently large value. Furthermore, if a MOS transistor is provided in series with the MO8t transistor Q3, this hysteresis width Vll can be set independently. Furthermore, this Schmitt circuit can be constructed with a smaller number of elements, such as t MOS transistors.

A Schmitt circuit according to a first embodiment of the present invention is shown in FIG. This Schmitt circuit is composed of 0MO8. The human power signal IN is PMO8I - transistor Q// and N
(MOS) transistor Q/2 and a CMOS inverter I/2.

NMOS) transistors Q/3 and Q/4' are connected in parallel between the source of transistor Q/2 and ground.
is inserted. One NMO8I-ransistor Q/
No. 3 has its drain and gate connected and operates in the saturation region. other NMOS) transistor Q/+
The inverted signal of the inverter I10, that is, the output signal OUT is input to the gate of the inverter I10.

This output signal OUT is PMO8I-ransistor Q/3
and NMO8I-transistor Ql&
Obtained by S inverter I.

The operation of the Schmitt circuit according to this embodiment is similar to that of the first embodiment. In the case of a rising edge of the human input signal IN, the threshold value of the inverter/ is increased by the threshold value of the NMOS transistor Q/3 because the NMOS transistor Q/& is off. On the other hand, when the human input signal IN falls, the threshold voltage of the inverter is determined by the NMOS) transistor Q/4.
Since C is on, NMO8I-transistor Q/3 is virtually absent. As described above, even with a small number of elements, the Schmitt circuit according to this embodiment has hysteresis characteristics as shown in FIG.

Next, a Schmitt circuit according to a third embodiment of the present invention is shown in FIG. This Schmitt circuit is also the same as the second 17ij example, but it is also made of CMO8 (1'η), but it is also made of NMOS
) instead of transistors Q/3 and Q/4', 2MO8)
This is achieved by providing transistors Q/7 and Q/'g. That is, 2MO8l-transistor Q/7 and Q/g are connected in parallel to form a 2MO8l-transistor Q, which is symmetrical to the first embodiment.
Insert between the source of // and the power supply V1111. one 2
MO8) The transistor Q/7 has its drain and gate connected and operates in the saturation region. The output signal OUT is input to the gate of the other PMO8I transistor Q.

The operation of the Schmitt circuit according to this embodiment is also substantially the same as that of the first embodiment. When the human input signal IN rises, the output signal OUT is initially Ov, so the 2MO8) transistor Q15 is turned on, and the 2MO8) transistor Q/7 does not substantially exist. Therefore, the threshold value of inverter E/ is the threshold value when transistor Q/7 is present. If the human input signal OUT is falling, the output signal OUT is the first! ■Because it is PMOS
Transistor Q/7 turns off, and the threshold value of inverter I/ becomes lower by the threshold value of PMO8I-transistor Q/7. As described above, the Schmitt circuit according to this embodiment also has a hysteresis characteristic in that the threshold value changes differently when the input signal IN rises and falls.

In the previous embodiment, it was composed of NMO8t or 0MO8, but
It can also be configured with PMOS. 1, the inverter 12 is provided to invert the output of the inverter I/, but it does not necessarily have to be one, and an odd number may be provided. Further, instead of an inverter, a NAND gate or the like may be used. In short, any device that can invert the output of the inverter I/ will suffice.

〔Effect of the invention〕

According to the present invention as described above, it is possible to configure the device with a small number of MO8I transistors, for example, three MOS transistors, and the pattern area when integrated into a circuit can be reduced. As described above, the Schmitt circuit of the present invention is suitable for high integration.

Furthermore, the hysteresis width can be increased, and stable operation can be achieved even with noisy input signals.

In MOS LSI, signals with a lot of noise may be manually input, and the Schmitt circuit of the present invention is suitable for the human input section of MOS LSI. Furthermore, since the Schmitt circuit of the present invention can shape a human input signal with a small number of gate stages, the signal delay time is small, making it suitable for high-speed operation.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a conventional Schmitt circuit, Fig. 2 is a time chart of the same Schmitt circuit, and Fig. 3 is a circuit diagram of a conventional Schmitt circuit.
FIG. 4 is a graph showing the hysteresis characteristics of the Schmitt circuit according to the first embodiment of the present invention. FIG. 5 is a circuit diagram of the Schmitt circuit according to the first embodiment of the present invention. FIG. 7 is a circuit diagram of a Schmitt circuit according to a third embodiment. G/, GJ, GJ...Inverter, Gg, Qj...
NAND circuit, Ql, Qjt...Teflation f
iMO8), t resistor, Qj, QA...enhancement type MO8) transistor, Q'+Q''...MO
S) transistor, Qii, c4is...PMO8)
Ranjistor, Qlko, Ql3. Ql44. Qjt
---NMOS transistor, Ql7. Qlza, Ql
ri...PMOS transistor, I/, IJ...inverter. Chrysanthemum Figure 3 Figure 5 Figure 4 St or No. 18 (OLIT) v, Figure 6 VSS VSS Procedural Amendments October 1982/] Japanese Patent Office Commissioner Manabu Shiga 1 Indication of matter f4 1988 Patent Application No. No. 7557 No. 2 Name of the invention Schmidt circuit 3 Relationship with the case of the person making the amendment Patent applicant (307) Toshiba Corporation 4 Agent In the drawings, Figures 4 and 6 are attached to J: Sea urchin Mu IjE-! Jru.

Claims (1)

[Claims] An inverter constituted by a MOS) transistor, a first MOS) transistor inserted between the inverter and the power source and having its gate connected to the drain, and a first MOS) transistor connected in parallel with the MOS) transistor to output the output signal of the inverter. (second MOS in which the inverted signal of is input manually to the gate)
A Schmitt circuit comprising a transistor and having hysteresis characteristics with respect to an input signal of the inverter.