JPS60150860U - brightness control circuit - Google Patents
brightness control circuitInfo
- Publication number
- JPS60150860U JPS60150860U JP3835384U JP3835384U JPS60150860U JP S60150860 U JPS60150860 U JP S60150860U JP 3835384 U JP3835384 U JP 3835384U JP 3835384 U JP3835384 U JP 3835384U JP S60150860 U JPS60150860 U JP S60150860U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- base
- control circuit
- brightness control
- brightness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Television Receiver Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図面は本考案の輝度制御回路を示す回路図である。
主な図番の説明、１・・・入力端子、２・・・ＢＧＰ端
子、ｌ・・・直流再生回路、６・・・エミッタフォロア
トランジスタ、７，８・・・差動対トランジスタ、９゜
１０・・・制御トランジスタ、１１・・・映像出力用エ
ミッタフォロアトランジスタ、１８．１９・・・定電流
源、２２・・・直流電源端子。The drawing is a circuit diagram showing a brightness control circuit of the present invention. Explanation of main figure numbers, 1... Input terminal, 2... BGP terminal, l... DC regeneration circuit, 6... Emitter follower transistor, 7, 8... Differential pair transistor, 9° 10... Control transistor, 11... Emitter follower transistor for video output, 18.19... Constant current source, 22... DC power supply terminal.
Claims (1)
生回路の出力端にエミッタフォロアトランジスタのベー
スを接続すると共にエミッタに第１の制御トランジスタ
と抵抗を介して第２のトランジスタのベースを接続し、
該第１の制御トランジスタの入力側に差動対トランジス
タの一方のコレクタを接続すると共に第２の制御トラン
ジスタの入力側に該差動対トランジスタの他方のトラン
ジスタのコレクタを接続し、前記差動対トランジスタの
一方のベースと電源端子間に可変抵抗器を接続し、他方
のベースを基準電圧源に接続し、前記可変抵抗器により
輝度制御を行うことを特徴とした輝度制御回路。Connecting the base of the emitter follower transistor to the output terminal of the DC reproduction circuit to which the video signal and the burst gate pulse are applied, and connecting the base of the second transistor to the emitter via the first control transistor and the resistor,
The collector of one of the differential pair transistors is connected to the input side of the first control transistor, and the collector of the other transistor of the differential pair transistors is connected to the input side of the second control transistor. A brightness control circuit characterized in that a variable resistor is connected between one base of a transistor and a power supply terminal, the other base is connected to a reference voltage source, and brightness is controlled by the variable resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3835384U JPS60150860U (en) | 1984-03-16 | 1984-03-16 | brightness control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3835384U JPS60150860U (en) | 1984-03-16 | 1984-03-16 | brightness control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60150860U true JPS60150860U (en) | 1985-10-07 |
| JPH0413891Y2 JPH0413891Y2 (en) | 1992-03-30 |
Family
ID=30545280
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3835384U Granted JPS60150860U (en) | 1984-03-16 | 1984-03-16 | brightness control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60150860U (en) |
-
1984
- 1984-03-16 JP JP3835384U patent/JPS60150860U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0413891Y2 (en) | 1992-03-30 |
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