JPH0413891Y2 - - Google Patents
Info
- Publication number
- JPH0413891Y2 JPH0413891Y2 JP3835384U JP3835384U JPH0413891Y2 JP H0413891 Y2 JPH0413891 Y2 JP H0413891Y2 JP 3835384 U JP3835384 U JP 3835384U JP 3835384 U JP3835384 U JP 3835384U JP H0413891 Y2 JPH0413891 Y2 JP H0413891Y2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- emitter
- voltage
- emitter follower
- base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000003321 amplification Effects 0.000 description 6
- 238000003199 nucleic acid amplification method Methods 0.000 description 6
- 230000008929 regeneration Effects 0.000 description 6
- 238000011069 regeneration method Methods 0.000 description 6
- 230000007423 decrease Effects 0.000 description 5
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Television Receiver Circuits (AREA)
Description
【考案の詳細な説明】
(イ) 産業上の利用分野
本考案はテレビ受像機における映像増幅回路の
輝度制御回路に関する。[Detailed description of the invention] (a) Industrial application field The present invention relates to a brightness control circuit for a video amplification circuit in a television receiver.
(ロ) 従来の技術
一般にテレビ受像機において、画面の明るさを
制御する場合、映像増幅回路の所定の増幅段で直
流電圧を可変抵抗器にて任意の値に設定して調節
する方式が多く採用されている。(B) Prior art Generally, when controlling the screen brightness of a television receiver, there are many methods in which the DC voltage is set to an arbitrary value using a variable resistor in a predetermined amplification stage of a video amplification circuit. It has been adopted.
その一例として「ICカラーテレビ」（日本放送
出販協会発行」P.172の第３−１４図に示す通り、
端子に接続された可変抵抗器によつて所定の輝
度に設定する。 As an example, as shown in Figure 3-14 of "IC color television" (published by Japan Broadcasting Sales Association), p. 172,
A predetermined brightness is set by a variable resistor connected to the terminal.
ところが前記構成を直流再生部の後段に用いた
場合、前記直流再生部と直結された映像増幅段の
トランジスタの温度特性即ちベース・エミツタ立
上り電圧VBEの温度による特性変化即ち電圧VBE
の変化の割合（ΔVBE）が輝度調整用の可変抵抗
器の位置によつて変化してしまうという問題があ
る。つまり、前記可変抵抗器からの制御電圧に応
じて前記トランジスタに流れる直流電流が変わる
と、電圧VBEの値が変化してしまう。すると、温
度による電圧VBEの変化の割合（ΔVBE）が変わつ
てしまうことになる。 However, when the above configuration is used after the DC regeneration section, the temperature characteristics of the transistor in the video amplification stage directly connected to the DC regeneration section, that is, the characteristic change due to temperature of the base-emitter rise voltage V BE , that is, the voltage V BE
There is a problem in that the rate of change (ΔV BE ) changes depending on the position of the variable resistor for brightness adjustment. In other words, when the direct current flowing through the transistor changes depending on the control voltage from the variable resistor, the value of the voltage V BE changes. Then, the rate of change in voltage V BE due to temperature (ΔV BE ) will change.
一般にトランジスタ回路では、各トランジスタ
の温度による電圧VBEの変化の割合（ΔVBE）は等
しいものとして温度補償の設計を行うので、その
なかの１つのトランジスタでも前記ΔVBEが変化
すると温度補償が行われなくなつてしまう。その
結果、温度により出力輝度信号の直流レベルが変
化し、明るさが変動してしまうという問題があ
る。 Generally, in a transistor circuit, temperature compensation is designed assuming that the rate of change in voltage V BE (ΔV BE ) due to temperature of each transistor is equal, so if the ΔV BE of one of the transistors changes, temperature compensation will not be performed. I can't help but get tired. As a result, there is a problem in that the DC level of the output luminance signal changes depending on the temperature, resulting in fluctuations in brightness.
(ハ) 考案の目的
本考案は従来のテレビ受像機において、映像増
幅回路に設けた輝度制御用の可変抵抗器に位置に
関係なく輝度調整用のバツフアトランジスタの電
圧VBEの変化の割合（ΔVBE）を温度変化に対して
一定にすることを目的とする。(c) Purpose of the invention The present invention is based on the present invention, which uses a variable resistor for brightness control installed in a video amplification circuit in a conventional television receiver to calculate the rate of change ( The purpose is to keep ΔV BE constant against temperature changes.
(ニ) 考案の構成
本考案は、直流再生された映像信号がベースに
印加されるエミツタフオロアトランジスタと、一
端が前記エミツタフオロアトランジスタのエミツ
タに他端が映像出力用エミツタフオロアトランジ
スタのベースに接続された直列抵抗と、エミツタ
が共通接続された２つの差動対トランジスタから
なり一方の差動対トランジスタのベースに可変抵
抗器からの輝度制御用の電圧が、他方の差動対ト
ランジスタのベースに基準電圧源からの電圧が印
加される差動増幅器と、入力側が前記差動増幅器
の一方の出力端子に出力側が前記直列抵抗の他端
に接続された第１の電流ミラー回路と、入力側が
前記差動増幅器の他方の出力端子に出力側が前記
直列抵抗の一端に接続された第２の電流ミラー回
路とからなることを特徴とする。(d) Structure of the invention The invention consists of an emitter follower transistor to which a DC reproduced video signal is applied to the base, one end of which is the emitter of the emitter follower transistor, and the other end of which is the emitter follower for video output. It consists of a series resistor connected to the base of the transistor, and two differential pair transistors whose emitters are commonly connected.The brightness control voltage from the variable resistor is applied to the base of one differential pair transistor, and a differential amplifier in which a voltage from a reference voltage source is applied to the base of a pair of transistors; and a first current mirror circuit in which an input side is connected to one output terminal of the differential amplifier and an output side is connected to the other end of the series resistor. and a second current mirror circuit whose input side is connected to the other output terminal of the differential amplifier and whose output side is connected to one end of the series resistor.
(ホ) 実施例
図面に従つて本考案を説明すると、１は映像信
号が加えられる入力端子、２はバーストゲートパ
ルスBGPが加えられるBGP端子、３はペデスタ
ルホールド用コンデンサ４が接続されるペデスタ
ルホールド端子、５は直流再生回路、６はエミツ
タフオロアトランジスタ、７，８は差動対トラン
ジスタ、９，１０は各々第１及び第２の制御トラ
ンジスタ、１１は映像出力用エミツタフオロアト
ランジスタ、１２は映像出力トランジスタ、１
３，１４及び１５，１６は各々直列ダイオード及
び負荷抵抗、１７は基準電圧源、１８，１９は定
電流源、２０は輝度制御用の可変抵抗器、２１は
出力端子、２２は直流電源端子、一点鎖線はIC
回路を示す。(E) Embodiment To explain the present invention according to the drawings, 1 is an input terminal to which a video signal is applied, 2 is a BGP terminal to which a burst gate pulse BGP is applied, and 3 is a pedestal hold to which a pedestal hold capacitor 4 is connected. terminals, 5 is a DC regeneration circuit, 6 is an emitter follower transistor, 7 and 8 are differential pair transistors, 9 and 10 are first and second control transistors, respectively, 11 is an emitter follower transistor for video output, 12 is a video output transistor, 1
3, 14 and 15, 16 are series diodes and load resistors, 17 is a reference voltage source, 18, 19 are constant current sources, 20 is a variable resistor for brightness control, 21 is an output terminal, 22 is a DC power supply terminal, The dashed line is the IC
Shows the circuit.
次に本考案の輝度制御回路の動作について説明
すると、直流再生回路５に映像信号が入力端子１
を介して加えられ、端子２に加えられたバースト
ゲートパルスによつてペデスタルレベルが最黒レ
ベルに直流再生される。そしてコンデンサ４にて
映像信号期間もそのレベルが保持され、ペデスタ
ルレベルが揃つた映像信号が出力される。 Next, to explain the operation of the brightness control circuit of the present invention, a video signal is input to the input terminal 1 of the DC regeneration circuit 5 .
The pedestal level is DC-regenerated to the blackest level by the burst gate pulse applied to terminal 2. The capacitor 4 holds the level during the video signal period, and a video signal with the same pedestal level is output.
前記直流再生回路５の出力信号はエミツタフオ
ロアトランジスタ６のベースに加わり、映像出力
用エミツタフオロアトランジスタ１１に伝送さ
れ、出力端子２１からの映像信号が映像出力トラ
ンジスタ１２にて伝送され、端子２３からＹ信号
として得られる。 The output signal of the DC reproduction circuit 5 is applied to the base of the emitter follower transistor 6 and transmitted to the emitter follower transistor 11 for video output, and the video signal from the output terminal 21 is transmitted by the video output transistor 12. It is obtained from the terminal 23 as a Y signal.
このとき差動対トランジスタ７，８の負荷抵抗
１５，１６の値を4R、制御トランジスタ９，１
０のエミツタ抵抗２４，２５及び直列抵抗２６の
値をＲとすると、エミツタフオロアトランジスタ
６のエミツタから抵抗２６に流れる電流をI1、負
荷抵抗１５，１６に流れる電流を各々I′1，I′2制
御トランジスタ９のエミツタ電流をI2とすると、
I1Ｒ＝4I1′Ｒ
I2Ｒ＝4I2′Ｒ
より
I1＝4I1′
I2＝4I2′
となる。 At this time, the value of the load resistances 15 and 16 of the differential pair transistors 7 and 8 is set to 4R, and the value of the control transistors 9 and 1 is set to 4R.
When the values of the emitter resistors 24, 25 and the series resistor 26 of zero are R, the current flowing from the emitter of the emitter follower transistor 6 to the resistor 26 is I 1 , the current flowing to the load resistors 15, 16 is I' 1 , respectively. If the emitter current of the I' 2 control transistor 9 is I 2 , I 1 R=4I 1 'R I 2 R=4I 2 'R, so I 1 =4I 1 'I 2 =4I 2 '.
ここで定電流源１８の電流をＩとすると
Ｉ＝I′1＋I′2
であり、エミツタフオロアトランジスタ６に流
れる電流はI1＋I2であるから、エミツタフオロア
トランジスタ６に流れる電流は4Iとなり、該エミ
ツタフオロアトランジスタ６に流れる電流は、可
変抵抗器２０の設定位置に関係なく一定となる。 Here, if the current of the constant current source 18 is I, then I = I' 1 + I' 2 , and the current flowing to the emitter follower transistor 6 is I 1 + I 2 , so the current flowing to the emitter follower transistor 6 is is 4I, and the current flowing through the emitter follower transistor 6 is constant regardless of the setting position of the variable resistor 20.
ここで輝度調整について説明すると、可変抵抗
器２０の可動部を図面の左方に設定した場合、差
動対トランジスタの一方のトランジスタ７のベー
ス電位が上昇するので、そのコレクタ電位は下が
りこれに伴つて制御トランジスタ９のコレクタ電
流I2は減少する。一方、トランジスタ７のコレク
タ電流の減少に伴い、同じ分だけトランジスタ８
のコレクタ電流が増加する。該コレクタ電流は、
直列ダイオード１４に流れ、該直列ダイオード１
４と電流ミラー関係に接続された制御トランジス
タ１０のコレクタ電流も同じ分だけ増加する。そ
のため、直列抵抗２６を流れる電流I1が増加する
から、直列抵抗２６における電圧降下が大きくな
り、映像出力トランジスタ１２からの映像出力の
直流電圧が下がり、ブラウン管（図示せず）上の
画面は明るくなる。 To explain the brightness adjustment here, if the movable part of the variable resistor 20 is set to the left side of the drawing, the base potential of transistor 7, one of the differential pair transistors, increases, and its collector potential decreases accordingly. Therefore, the collector current I 2 of the control transistor 9 decreases. On the other hand, as the collector current of transistor 7 decreases, transistor 8
collector current increases. The collector current is
The current flows through the series diode 14, and the series diode 1
The collector current of the control transistor 10 connected in a current mirror relationship with 4 also increases by the same amount. Therefore, since the current I1 flowing through the series resistor 26 increases, the voltage drop across the series resistor 26 increases, the DC voltage of the video output from the video output transistor 12 decreases, and the screen on the cathode ray tube (not shown) becomes brighter. Become.
一方可変抵抗器２０を図面右方に設定すれば、
差動対トランジスタの一方のトランジスタ７のベ
ース電位が下がるので、そのコレクタ電位は上昇
し、制御トランジスタ９のコレクタ電流I2が増大
し、直列抵抗２６を流れる電流I1が前述のの増加
した分だけ逆に減少するから画面は暗くなる。 On the other hand, if the variable resistor 20 is set to the right side of the drawing,
Since the base potential of transistor 7, one of the differential pair transistors, falls, its collector potential rises, collector current I 2 of control transistor 9 increases, and current I 1 flowing through series resistor 26 increases by the above-mentioned increase. On the contrary, the screen becomes darker because it decreases.
このように、直列抵抗２６を流れる電流を変化
させると、それと逆で同じ量の電流変化が制御ト
ランジスタ９に生じ、エミツタフオロアトランジ
スタ６のエミツタに流れる電流は常に一定であ
る。そのため、エミツタフオロアトランジスタ６
の電圧VBEは、可変抵抗器２０の設定位置に関係
なく一定にできる、その結果、エミツタフオロア
トランジスタ６の温度による電圧VBEの変化の割
合（ΔVBE）を一定にでき、他のトランジスタと
共に図の回路全体の温度補償を行うことができる
ので、温度により輝度信号の直流電圧が変動する
ことなく安定な明るさが得られる。 In this way, when the current flowing through the series resistor 26 is changed, an opposite and equal amount of current change occurs in the control transistor 9, and the current flowing through the emitter of the emitter follower transistor 6 is always constant. Therefore, emitter follower transistor 6
The voltage V BE can be kept constant regardless of the setting position of the variable resistor 20. As a result, the rate of change in the voltage V BE due to the temperature of the emitter follower transistor 6 (ΔV BE ) can be kept constant, and other Since temperature compensation can be performed for the entire circuit shown in the figure together with the transistor, stable brightness can be obtained without fluctuations in the DC voltage of the brightness signal due to temperature.
(ヘ) 考案の効果
本考案の輝度制御回路によれば、輝度を変化さ
せる場合、可変抵抗器の設定位置には無関係に、
直流再生回路の出力側に直結されたエミツタフオ
ロアトランジスタに流れる直流電流を一定にする
ことができ、あらゆる輝度レベルにおいて温度変
化に対して安定化でき従つて本考案の同回路は、
テレビ受像機の映像増幅回路に極めて有用であ
る。(F) Effect of the invention According to the brightness control circuit of the invention, when changing the brightness, regardless of the setting position of the variable resistor,
The DC current flowing through the emitter follower transistor directly connected to the output side of the DC regeneration circuit can be made constant, and the circuit of the present invention can be stabilized against temperature changes at any brightness level.
It is extremely useful for video amplification circuits in television receivers.
図面は本考案の輝度制御回路を示す回路図であ
る。
主な図番の説明、１……入力端子、２……
BGP端子、５……直流再生回路、６……エミツ
タフオロアトランジスタ、７，８……差動対トラ
ンジスタ、９，１０……制御トランジスタ、１１
……映像出力用エミツタフオロアトランジスタ、
１８，１９……定電流源、２２……直流電源端
子。
The drawing is a circuit diagram showing a brightness control circuit of the present invention. Explanation of main drawing numbers, 1...Input terminal, 2...
BGP terminal, 5 ... DC regeneration circuit, 6... Emitter follower transistor, 7, 8... Differential pair transistor, 9, 10... Control transistor, 11
...Emituta follower transistor for video output,
18, 19...constant current source, 22...DC power supply terminal.
Claims (1)
エミツタフオロアトランジスタと、一端が前記エ
ミツタフオロアトランジスタのエミツタに他端が
映像出力用エミツタフオロアトランジスタのベー
スに接続された直列抵抗と、エミツタが共通接続
された２つの差動対トランジスタからなり一方の
差動対トランジスタのベースに可変抵抗器からの
輝度制御用の電圧が、他方の差動対トランジスタ
のベースに基準電圧源からの電圧が印加される差
動増幅器と、入力側が前記差動増幅器の一方の出
力端子に出力側が前記直列抵抗の他端に接続され
た第１の電流ミラー回路と、入力側が前記差動増
幅器の他方の出力端子に出力側が前記直列抵抗の
一端に接続された第２の電流ミラー回路とからな
り、前記可変抵抗器からの輝度制御用の電圧を変
化させても前記エミツタフオロアトランジスタの
エミツタには常に一定の直流電流が流れるように
し、該エミツタフオロアトランジスタのベース・
エミツタ間電圧の温度による変化の割合が一定に
なるようにしたことを特徴とする輝度制御回路。 an emitter follower transistor to which a DC reproduced video signal is applied to its base; and a series resistor having one end connected to the emitter of the emitter follower transistor and the other end connected to the base of the video output emitter follower transistor. , consists of two differential pair transistors whose emitters are commonly connected, the brightness control voltage from a variable resistor is applied to the base of one differential pair transistor, and the voltage from a reference voltage source is applied to the base of the other differential pair transistor. a differential amplifier to which a voltage is applied; a first current mirror circuit having an input side connected to one output terminal of the differential amplifier; an output side connected to the other end of the series resistor; and an input side connected to the other end of the differential amplifier. and a second current mirror circuit whose output side is connected to one end of the series resistor, so that even if the brightness control voltage from the variable resistor is changed, the emitter of the emitter follower transistor remains unchanged. so that a constant DC current always flows, and the emitter follower transistor's base and
A brightness control circuit characterized in that the rate of change in emitter voltage due to temperature is constant.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3835384U JPS60150860U (en) | 1984-03-16 | 1984-03-16 | brightness control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3835384U JPS60150860U (en) | 1984-03-16 | 1984-03-16 | brightness control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60150860U JPS60150860U (en) | 1985-10-07 |
| JPH0413891Y2 true JPH0413891Y2 (en) | 1992-03-30 |
Family
ID=30545280
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3835384U Granted JPS60150860U (en) | 1984-03-16 | 1984-03-16 | brightness control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60150860U (en) |
-
1984
- 1984-03-16 JP JP3835384U patent/JPS60150860U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60150860U (en) | 1985-10-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4198581A (en) | Temperature compensating comparator | |
| JPH0344475B2 (en) | ||
| JPH0413891Y2 (en) | ||
| JP2740211B2 (en) | Video signal correction circuit | |
| JPS5843676A (en) | Signal gain controller | |
| JPS5967784A (en) | Gamma correcting circuit | |
| JPH0434870B2 (en) | ||
| JPS6013327B2 (en) | DC control type output level adjustment circuit | |
| JPH08710Y2 (en) | Video output circuit | |
| JPH0510457Y2 (en) | ||
| JPH083108Y2 (en) | Adjustment circuit of color television receiver | |
| JP2931713B2 (en) | Clamp circuit | |
| KR830001146B1 (en) | Signal conversion circuit | |
| JPH079482Y2 (en) | Gamma correction circuit | |
| JPH0227655Y2 (en) | ||
| JPS6113403B2 (en) | ||
| KR790001792B1 (en) | Controllable gain signal amplifier | |
| JP2523056B2 (en) | Control circuit | |
| JPS6311839B2 (en) | ||
| KR900002303Y1 (en) | In-put level control circuits of display devices | |
| KR900003545Y1 (en) | Auto control circuit of brightness | |
| KR940003513Y1 (en) | White balance compensator for tv monitor | |
| JPS62173811A (en) | Gain control circuit | |
| JP2758009B2 (en) | Peak limit circuit | |
| JPH0564035A (en) | Clamp circuit for video signal |