JPS60150774A - Video game apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a video game device, and particularly to a video game device that enables play by inserting a valuable medium such as a coin.
The present invention relates to a so-called commercial video game device.

(Description of the Prior Art) Conventionally, so-called television games or video game devices have been used in which game characters are displayed on a screen such as a color CRT display and the characters are controlled by operating operating means such as a joystick or an operation switch. It is put into practical use. Conventional video game devices can be broadly classified into those for home use and those for business use. Regardless of the type of conventional video game device, there is one that allows two people to play alternately using a single video screen, one that allows two people to share a screen and play simultaneously, or one that allows two people to play simultaneously using a single video screen. There were some types that could be played by one person using a video screen.

However, such a video game device that allows multiple people to play the same type of game using multiple screens has not yet been proposed.

More specifically, by displaying the same game on multiple displays and allowing multiple people to operate different control means, they can control not only the game character on their own display, but also the game character on other people's displays. There had never been a video game device before.

The easiest way to create this type of video game device would be to simply assemble conventional video game devices. However, such a method requires more than twice the cost as compared to a conventional video game device, and therefore the device inevitably becomes expensive.

(Object of the Invention) Therefore, the main object of the present invention is to provide a novel video game device that allows multiple people to play the same game using multiple displays.

Another object of the invention is to provide such a novel video game device that is compact and inexpensive.

(Summary of the Invention) Simply put, the present invention provides two displays and two sets of game operation buttons corresponding to each display in one housing, and two computer systems can use the corresponding operation buttons. Display data is given to the corresponding display according to the operation status of the computer system, and the data is sent to the display corresponding to one of the computer systems via a communication circuit for directly or indirectly exchanging data between the two computer systems. This is a video game device that receives data from the other computer system and changes the display on its display not only in response to the corresponding operation button, etc., but also in response to the other operation button, etc.

(Effects of the Invention) According to the present invention, since the JMM flat means for exchanging data between two control means is provided, the same game can be displayed on two displays and multiple people can use separate operation means. A new video game device is obtained in which each player can control the game characters displayed on the other party's display by operating the . Furthermore, since the communication means is shared by the two control means, the device can be made smaller and cheaper than a device formed by simply docking two video game devices.

The above objects and other objects and features of the invention will become more apparent from the following detailed description with reference to the drawings.

(Explanation of Examples) FIG. 1 is an overall perspective view showing an embodiment of the present invention.

The video game device according to this embodiment includes a housing 1,
Legs are provided below the housing 1 for installation. This casing 1 has a shape such that the casing 1 with trapezoidal sides is placed on a table with approximately T-shaped sides,
CRTs 2 and 3 are provided on the slope of the trapezoidal portion, with their respective screens facing each other. Note that as such a display, the C
Various displays other than RT can be used, such as well-known liquid crystal displays, plasma displays, or EL displays. Coin slots 4 and 5 are further provided on the sloped portion of the trapezoidal portion.

These coin slots 4 and 5 are for inserting coins as valuable media into the coin slots 4 and 5, thereby enabling the game to be played.Therefore, the video game device of this embodiment is a commercial video game machine. It is configured as. In addition to the above-mentioned coins, the valuable medium may be a card such as a magnetic card or an optical card, and any valuable medium can be used.

At both ends of the table portion of the housing 1, various operating means and switches for playing the game are provided. That is, on one end there are two joysticks 6.12 and operating buttons 8, 10.14 and 1.
6 sets are provided, and further four mode buttons 18, 2
0. '22 and 24 are provided. At the other end there are also two sets of joysticks 7.13 and operation buttons 9.
11.5 and I7, and four mode buttons 19, 21.23 and 25 are provided. Therefore, with this video game device, up to four people can play the game using each of the four sets of operating means. Here, the joysticks 6.1'2.7 and 13 are used to move the game character displayed on the screens of the CRTs 2 and 3 in the vertical and horizontal directions, respectively, as is well known. In addition, operation buttons 8, 10, 14, 16°9
．． 11.15 and 17 are for causing the game character to perform a specific type of action, such as jumping, firing or hitting. With this video game device, a game can be played by selecting any one of the four modes. Mode buttons 18.22 and 19.23 are used for selecting the first mode, and mode buttons 20.24 and 21', 25 are used for selecting the second mode. For example, if this video game device can play a tennis game, the first mode button 18 and the second mode button 20 each select the "single" mode, and the first mode button 22
``Double'' can be selected using the second mode button 24 and the second mode button 24, respectively. Similarly, the first mode button 19 and the second mode button 21 select "single", and the first mode button 2
3 and the second mode button 25 can select "doubles". The first mode buttons 18, 22, 19 and 23 select a first mode of the video game device, i.e. a mode that can be played independently on each side;
The second mode buttons 20, 24, 21 and 25 allow selection of a second mode, ie a mode in which the players on each side play the same game. In the first mode, therefore, each player plays the game against a corresponding computer system built into the housing 1. In contrast, in the second mode, players on each side play the game against people facing each other.

Note that the specific content of the game is not limited to the above-mentioned tennis game, but may be any type of game such as a game simulating another ball game, a card game, or a Martian game.

FIG. 2 is a block diagram showing one embodiment of the present invention.

The left side of FIG. 2 constitutes one computer system 26, and the right side constitutes another computer system 27. The computer system 26 is provided in connection with the CRT 2 and the like on the left side in FIG. 1, and the computer system 27 is provided in connection with the CRT 3 and the like on the right side in FIG. The computer system 26 includes a CPU (Central Processing Unit) to which the associated mode buttons 1B, 20, 22 and 24 are connected. Further, the CPU 28 is provided with a coin selector 30 for determining the type and amount of coins inserted from the coin slot 4. In addition, this coin selector 30
If the valuable medium to be inserted is a card, it would be replaced by something like a card reader. and,
The CPU 28 is further connected to the operating means 6 to 16 shown in FIG. 1, but their illustration is omitted in FIG.

The CPU 28 is, for example, a MOS Techn.

IC6502 manufactured by 1ogy (MOS Technology) may be used. The CPU 2B connects the RO via a 16-bit address bus 32 and an 8-bit data bus 34.
M (read only memory) 36° RAM (random access memory) 38 and PPU (image processing unit)
) 40, respectively. ROM36 is CPU2
For example, an IC2764 manufactured by Intel Corporation may be used. The RAM 38 is, for example, H
4Tatchi (Hitachi) IC6116 is used to sequentially store data necessary for the progress of the game. P
The PU 40 controls the CRT based on the data from the CPU 28.
For example, IC2CO3 manufactured by N1ntendo (Nintendo) is used. PPU40 also has character RO.
M42 and video RAM 44 are connected. All of these are, for example, H4tatchi (Hitachi) company history ICs.
6116 are available. The character ROM 42 is
Characters necessary for the game, such as the ball or players on the screen for a ball game, or cards for a card game, are used to display the video RAM 4.
For example, in the case of a ball game, 4 is for permanently displaying the background of the game, including the court, net, goal, etc.

A sound generator 46 is further connected to the CPU 2B, and the sound generator 46 generates sound effects as necessary.

The other computer system 27 similarly has a CPU
29, this CPU 29 and its associated memory 37
, 39.4.1.43 and 45 are configured in the same way as the computer system 26 above. Therefore, details of these configurations will be omitted here to avoid redundancy. The CPU 29 is further connected to mode buttons 19, 21, 23, and 25, as well as game operation means F to 17 shown in FIG. 1, although not shown here. The coin selector 31 and sound generator 47 connected to the CPU 29 are the same as the coin selector 30 and sound generator 46 described above.

In order to configure the communication means, in this embodiment, C-RA
M (common random access memory) 101 is provided. As this C-RAMI O1, for example, Hit
C-MOS static RA manufactured by achi (Hitachi)
M6116 is used and has a capacity of 2 KB, for example.

This C-RAM 101 has an address bus 103 from an address selector 102 and a data bus 106 from three-state buffers 104 and 107 as gate circuits.
are connected to each other. The address selector 102 is
For example, TTL manufactured by TI (Texas Instruments)
An IC74L S157 circuit can be utilized. This address selector 102 is connected to the address bus 32.
and 33 are selectively connected to address bus 103. Further, the 3-state buffer 104 is inserted between the data buses 34 and 106, and the 3-state buffer 107 is inserted between the data buses 35 and 106, respectively. These three-state buffers 104 and 107 are, for example, TI
(Text Instrument) IC74, L S
245 are available and depending on the signal provided r
It can take any of three states: lJ, rOJ, or high impedance. A signal line 108 from an output port of a CPU 28 included in one computer system 26 is connected to the selector 102 and three-state buffers 104 and 107. That is, this signal line 108 is connected to the terminal "Tπ" of the CPU 29 included in the other computer system 27, and is also connected to the address selector 1.
It is connected to the control terminal of 02, and is further connected to the control terminal of 3-state buffer 1.
07 and to a three-state buffer 104 via an inverter 105. A signal line 109 from the output port of the CPU 29 is connected to a terminal n of the CPU 28. Therefore, the C-RAMI that forms these communication means
O1 etc. are basically the signal line 1 from the output port of the CPU 28 included in one computer system 26.
It will be controlled by the 08 signal. That is, these communication means 101 to 109 give priority to one CPU 28 when a conflict occurs.

Note that the IC used in this circuit is not limited to the above example, and other similar or different ICs may be used.
It goes without saying that it may be constructed using further discrete components.

In addition, PPUs 40 and 41 are CRs with RGB terminals.
Although this is for displaying T2 and T3, it may be for example driving a CRT according to a color television system such as the NTSC system.

In the embodiment shown in FIG. 2, first, the operation when data is exchanged between one computer system 26 and the other computer system 27 using the communication means 101 will be described.

In the initial state, signal lines 108 and 109 of both output ports of CPUs 28 and 29 are both "0". 3
Since state buffers 104 and 107 are both driven at a low level, tristate buffer 107 is activated and data nodes 35 and 106 are connected. On the other hand, since the 3-state buffer 104 is given "1" which is inverted by the inverter 105, this buffer 1
04 becomes a high impedance state, and the data bus 34
and 106 are cut off. At the same time, "0" is also given to the address selector 102, so that this selector 1
02 selectively connects the address bus 33 to the address bus 103
Connect to. In this way, computer system 2
7 becomes able to access (, -RAMIol. In this state, the computer system 27 accesses C-RAMIol.
Although data can be written to and read from the computer system 27/'l<C-RAMI O1, one of the computer systems 26 can be In order to force non-use, the CPU 29 outputs "l" to the signal line 109. Then, the terminal 〒100 (this is an interrupt request terminal) of the CPU 28 becomes ``1'', and the CPU 28 recognizes this and learns that the C-RAM 10I cannot be used.

On the other hand, since the signal line 108 from the CPU 28 is "o", "o" is given to the surface 1 terminal of the CPU 29, and the
U29 is address bus 33, 103 and data bus 3
5,106 to access C-RAMI O]. And CPU29 (7) C-RAMI 01 (7
) When the use is finished, the CPU 29 sets the output port to "0".
”. Then one computer system 26
access to the C-RAM 101 becomes possible.

When the signal line 109 from the output port of the CPU 29 becomes ``0'', the CPU 28 outputs ``1'' to the terminal. , and the CPU 29 is now connected to the C-RAMI.
Recognize that O1 cannot be accessed.

The signal line 108 from the output boat of CPU2B is rlJ
, the address selector 102 selects the address bus 32.
is selectively connected to the address bus 103. At the same time, 3
The state buffer 104 is supplied with r OJ h' inverted by the inverter 105, and this three-state buffer 104 connects the data buses 34 and 106. Since "1" is applied to the other three-state buffer], 07, this buffer 107 becomes a high impedance state, and data buses 35 and 106 are cut off.

In this way, the CPU 28 uses the address bus 32.10.
3 and data buses 34, 106, (, -RA
Data can be written to or read from MI O1.

Computer systems 26 and 27 are simultaneously C-RA
When trying to access MI O1, first the CPU
28 looks at its own terminal IRQ. At this time, CPU2
Since both B and 29 are p which were not connected to C-RAM, it is natural that the terminal ``π stone of CPU 28 is connected to rO
It is J. Therefore, the CPU 28 sets "1" to that output port.
is output, and "1" is given to the terminal "w" of the CPU 29 via the signal line 10B. By doing so, the CPU
29 recognizes that C-RAMI O1 cannot be accessed. In this way, computer system 26
(CPU28) and computer system 27 (CPU2
9) If there is a conflict, the computer system 26
priority is given to.

Access to C-RAMI O1 is performed as described above. For example, data from CPU 28 is accessed from C-RAMI O1.
01 specified location, and the CPU 29 writes the C-RA.
By reading the same address of
This means that data has been transferred from 28 to CPU 29. Conversely, when data is transferred from the CPU 29 to the CPU 2B, the necessary address of C=RAM 101 may be used.

In the above-described embodiment, when transmitting and receiving data between the two computer systems 26 and 27, the C-RAM
This was done indirectly by intervening IO1. however,
Various other communication means can be considered.

For example, if the CPUs 2B and 29 are capable of relatively high-speed processing, data can be sent and received via a connection line directly connecting the CPU ports without intervening a common memory means such as C-RAMI Ol. You can also do that.

Furthermore, a DMA method (direct memory access method) can also be used. That is, CPU29 is CPU2
When requesting data from 8, the contents of RAM 38 may be read directly into RAM 39, and in the opposite case, CPU 28 may copy the contents of RAM 39 to RAM 38.

Furthermore, separate RAMs added to each of the CPUs 28 and 29 may be used as the communication means. Then, each CPU 28 and 29 writes data to the respective RAM 38 and 39, and also writes data to the other party's additional RA.
Data may also be written to M, and the other party's CPU may read data from the associated additional RAM as needed.

In this way, various configurations can be used as the communication means, so it is only necessary to select the optimal one in consideration of cost, simplicity of circuit configuration, etc.

Next, the operation of the embodiment shown in FIGS. 1 and 2 will be described with reference to the flow diagrams shown in FIGS. 3A and 3B and FIGS. 4 to 6. In the following description, the computer system 26, ie, the CPU 28, is the "self" (rule), and the computer system 27, ie, the CP tJ 29, is the "other" side.

In a first step 201, the CPO 28 determines, based on data from the coin selector 30, whether its own credits (CI) required for playing the second mode are larger than half (Q/2) of the number of cash registers (Q). to judge. If its own credit (CI) has not reached (Q/'2), in the following step 203, the CPU 28 sets the second mode flag FT in the RAM 38 shown in FIG.
, 12 are set to "0" so that it can be recognized that the second mode is not possible. If step 20
If rYEsJ in 1, step 205
In addition, the CPU 28 also receives its own credit (C
It is determined whether the sum of I) and the opponent's credits (C2) is greater than the number of cash points (Q) necessary for playing the second mode. If it is rNOJ in this step 205, the second mode flag F L is set in step 203.
12 is set as rOJ, and if r Y E , S J, the second mode flag FL12 is set to "1".

In this way, it is determined whether the inserted coins (valued media) have reached the number of coins required to play the game in the second mode, and if the number has not been reached, the setting to the second mode is prohibited. That's what I do.

After resetting or setting the second mode flag FL12 in step 203 or 207, in the next step 209, the CPU 28 determines that the own credit (C1) is required for playing the first mode and the number of cash registers (
P) Determine whether it is greater than. This step 20
If it is rNOJ in step 9, the first mode flag of R-AM38 is set in step 211.
If it is rYEsJ, write "1" to the first mode flag FLII. Next, the CPU
2B detects whether the first mode button 18 (or 20) is turned on, and if "NO", continues as is.
Also, if rYEsJ, only when the first mode flag FL11 is not "1" in the following step 217,
Each moves to Ste Nob 219. In step 219, the CPU 28 detects whether the second mode button 22 (or 24) is turned on.

In the previous step 217, the first mode flag FLI
If I is set, the CPU 28 performs processing for playing the game in the first mode. That is, in the next step 221, the number of cash registers (P) required to play the game in the first mode is calculated by the own credit (CI).
) and store the remainder as a new (CI).

Then, by the method described above, the C-RAM 101
, and writes "1" to the first mode flag FLIII as shown in FIG.

In this way, it is possible to notify the CPU 29 that the CPU 28 is operating in the first mode.

Then, the CPU 28 executes the first mode game (
Step 225). Note that the routine of this game is well known and is not particularly important to the present invention, so a detailed explanation thereof will be omitted here. However, in this first mode game, the joystick 6 shown in FIG. As described above, when the first mode game 225 ends, the CPU 28 writes "0" into the first mode flag FL111 of the C-RAM 101.

In step 219, if the CPO 28 detects that the second mode button 22 (or 24) is not turned on, the process moves to step 229, and the CPU 28
The first mode flag FL121 of C-RAMI O1 is “
1". That is, it is determined whether the other party is in the first mode. and,
If it is rYEsJ in this step 229, further in step 231, it is detected whether the first mode flag F L 11 of the own RAM 38 is "1" and it is determined whether the first mode game can be played on the own side. It is to judge. If the game in the first mode is playable, in the following step 233, the CRT2 (
1) displays the message "Please press button 18 (or 20)". If the game in the first mode cannot be played either, the process returns to the first step 201.

If “NO” in step 229, the CP
In the subsequent step 235, U28 further selects C,
- The second mode flag F L 122 of RAMIOI is “
1" and determines whether the other party has selected the second mode. If this step 235
If rYESJ is selected, in the next step 237, the "button 22 (or 24
) is displayed.

If “NO” in step 235, the CPU 28
In the next step 239, the self R'AM38
Detects whether the second mode flag FL12 is "1" and allows the player's side to play the second mode game.
determine whether the

If "NO", the process moves to the previous step 231, and if rYEsJ, in the next step 241, it is similarly detected whether the first mode flag FI711 of the self is "1" and the first mode is set. Determine if it is playable. If the first mode is playable, CRT2
(Figure 1) Click the button “1 day (or 20) or 22” on the top.
(or 24)" is displayed (step 243).

Note that after displaying steps 233, 237 and 243, the process returns to the first step 201 again.

If "YESJ" is determined in the previous step 219 (FIG. 3A), the CPU 28 in the next step 241
It is determined whether the second mode can be played by detecting whether the second mode flag FL12 of the player itself is "1". If “NO” in this step 241, in the next step 243, the CPU 28
It is detected whether the second mode flag FL122 of IO1 is "1" and it is determined whether the other party is in the second mode.

In the previous step 241, if rY E SJ, the program moves to step 245, where the CPU 28 sets the (,-RAMI O1 second mode flag 112
Write "1" to. Then, in the next step 247, it is determined whether a certain period of time, for example, 5 seconds has elapsed, and if the time has elapsed, in the next step 249, the second mode flag FL112 of the C-RAM 101 is set to "
0'', the process returns to the first step 201. Then, in step 251, before time-out, C-R
If it is determined that the second mode flag FL122 of the other party of AMI O1 is "1", that is, that the other party has also selected the second mode, the CPU 28 executes the next step 25.
3, from your own watercress 1-(C1), half (Q/2) of the number of resin nodes (Q) required for playing the second mode
, and the remainder is the new self watercress I-(
CI). Thereafter, in step 255, a second mode game is executed. Furthermore, at this time,
Not only does the display on the CRTZ on the user's side change in accordance with the operation of the operating means 6 to 16 (FIG. 1) on the user's side;
As described above, the display on the other party's CRTa changes, and by operating the operating means 7 to 17 on the other party, the display not only on the CRT 3 but also on the CRT 2 changes. As described above, data is exchanged during this time by sharing the data area of C-RAM 101 in this embodiment. Then, when the second mode ends, the CPU 2 B sets the second mode flag FL11 of the C-RAMI O1 in the final step 257.
2 is set to "0" and the process returns to the first step 201.

In the previous step 243 (FIG. 3A), "YjES
If it is J, the other party's CPU 29 is the other party's credit (
From C2), half (Q/2) of the number of registers necessary for playing in the second mode is subtracted, and the remainder is stored in the HAM 39 as a new register (C2). and,
In step 261, the CPU 29
The second mode flag 112 of O1 is set to "1" and the second mode game routine 255 is entered. Even in this manner, the second mode game can also be played.

Note that if the answer in step 243 is "NO", the program moves to step 229, as in the case where the answer in step 219 is "NO".

Furthermore, in the above embodiment, when the player's side and the opponent's side play the first mode game independently, the content of the game may be the same, and several games may be selected. You may also be able to play different games in this way. To do this, it is sufficient to equip the device with a plurality of game software (ROM) so that any one can be selected.

[Brief explanation of drawings]

FIG. 1 is an overall perspective view showing an embodiment of the present invention. FIG. 2 is a block diagram showing an example of the electric circuit of the embodiment shown in FIG. FIGS. 3A and 3B are flowcharts for explaining the operation or operation of this embodiment. 4 to 6 are diagrams schematically showing flags in the memory, respectively. In the figure, 1 is the housing, 2 and 3 are the displays, and 4.5
are coin slots, 6, 12, 7. '13 is a joystick, 8, 14, 16, 9, 11. . 15.17 is an operation button, 18, 22, 19.23 is a first mode button, 20.24, 21.25 is a second mode button, 26, 27 is a computer system, 101 is a C-RAM, 102 is an address saver. Rector, 104.1
07 indicates a three-state buffer. Patent applicant Nintendo Co., Ltd. agent Patent attorney Oka 1) Kei Zen (and 1 other person) Procedural amendment (own ship 6゜1. Indication of the case 1981 Patent side No. 006980 2, Name of invention Video game device 3 , Relationship with the person making the amendment Patent applicant address 60 Fukuinakami Takamatsu-cho, Higashiyama-ku, Kyoto City Name Nintendo Co., Ltd. Representative Hiroshi Yamauchi 4, Agent φ540 'ji! Osaka (06) 7
64-5443 Address: 5-30 Tanimachi, Higashi-ku, Osaka Contents of the amendment (1) Drawings inscribed as shown in the attached sheet (no changes in content) 1
Attach the letter. (2) Attach a separate power of attorney. Written amendment to the above procedures (Own ship 1, Indication of the case 1982 Patent side No. 006980 2, Name of the invention Video game device 3, Relationship with the person making the amendment Patent applicant address Fukuinakami Takamatsu-cho, Higashiyama-ku, Kyoto-shi Address 60 Name Nintendo Co., Ltd. Representative Hiroshi Yamauchi 4, Agent ◎540 Sen Osaka (06) 764-5
443 Address: 5-30-6 Tanimachi, Higashi-ku, Osaka, Subject of amendment (1) Detailed description of the invention in the specification (2) Drawing 7, Contents of amendment (1 page 25 of the specification) Lines 14-15 2, page 28, line 2 and page 29, line 5, “or 20J” or 22
” is corrected. (2) Specification box page 25, bottom line 1, page 27, line 9, 2
Change “22” to “20” on page 8, line 12 and page 29, line 5.
” is corrected. (3) r243J on page 29, lines 8 to 9 of the specification to r24
Corrected to 2J. (4) I would like to correct the reference number indicating rCPUJ on the right side of Figure 2 from ``27'' to ``29'', so please make the correction as written in red on the attached copy of Figure 2. (5) Figures 3A and 3B will be corrected as shown in the attached sheet. that's all

Claims (1)

[Claims] Eleven casings (1), two displays (2: 3) provided in the one casing (1), and one casing corresponding to each of the displays (2: 3). (1) and two sets of manually operable game operation means (6-16:7-17), each of which is in the state of a corresponding one of the operation means (6-16:7-17). Depending on the corresponding display (2:
3) two control means (
26:27), and communication means (101-109> for directly or indirectly exchanging data between the control means (26) on one side and the control means (27) on the other side, thereby A video game device, wherein data from the other control means (101-109) is provided to one of the displays (2:3) corresponding to one of the control means (26:27). 2. The communication means includes a common memory means (101) accessible by the two control means (26:27), and a common memory means (101) and the control means (26:27).
bus means (32, 34) connected between each of the bus means (32, 34)
, 103, 106:33, 35.103. '106)
The video game device according to claim 1, comprising: 3. The communication means communicates with the bus means (32, 34, 103, 106:33.35) connected to the control means (26:27) in response to a signal from the control means (261?).
. 4. The bus means connects the common memory means (101) and the control means (26:
21>, the address bus (32,
103:"33.103), and the common memory hand) & (101) and the control means (26
:27) are connected between each of the data buses (34, 27).
106:35, 1.06).
The video game device described in Section 1. 5. The disabling means includes an address selector (102) that selectively switches the address bus (32, 103: 33, 103) according to a signal from the control means (26:27), and Data bus (34,106:35
, 106) to open one side of the gate circuit (104:10
7). The video game device according to claim 4. 6 mode setting means (18-24: 1) connected to at least one of the control means and capable of selecting a plurality of modes;
9-25>, and the communication means (101-109) is activated in response to a predetermined mode being selected by the mode setting means us-2, i:t9-25). The video game device according to any one of items 1 to 5. 7 When another mode is set by the mode setting means (18-24:19-25), the control means (26
:27) respectively correspond to the corresponding operation means (6-16).
7. The video game device according to claim 6, characterized in that the content of the corresponding display (2:3) depends solely on the states of (7-17). 8 an inlet (4:5) for introducing valuable medium, connected to the control means (26=27) and connected to the inlet (4:5);
), and a value determining means (30:3]) for determining the value of the valuable medium input from
1) comprises means (28:29) for enabling setting to the predetermined mode in response to determining a certain value;
A video game device according to claim 6 or 7.