JPS60150208A - Producing circuit of head switch signal for magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To control automatically the switching timing with the same circuit constitution as that of a pair of heads by using a digital mono-multi circuit which produces a head switch signal for switching of reproduction signals in addition to a mode discriminating means and a reading means. CONSTITUTION:The count output of a counter 34 is supplied to a coincidence detecting circuit 36, and a detection signal with which the coincidence is obtained between the count output and and the time constant data is produced and supplied to a flip-flops 30 and 32 as well as to a reset terminal R of the counter 34. The flip-flop 32 produces and delivers a signal (d) which rises and falls when the flip-flop 32 is set and reset respectively. The signal (d) is supplied to a set terminal S of a flip-flop 27. A digital monostable-multivibrator 24 has the same constitution as a digital monostable-multivibrator 23 and produces a signal (e) from a signal (c) to supply it to the reset terminal R of the flip-flop 27. The flip- flop 27 produces a head switch signal (f) which rises and falls with the fall of the signal (e) and the fall of the signal (d) respectively and delivers the signal (f) through a terminal 28.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a head switching signal generation circuit for a magnetic recording/reproducing device, and relates to a magnetic recording/reproducing device that generates head switching signals for multiple sets of heads without increasing the number of external parts or circuits. The present invention relates to a head switching signal generation circuit for an apparatus.

BACKGROUND OF THE INVENTION FIG. 1 shows a block diagram of an example of a servo circuit of a conventional helical scan two-head type magnetic recording/reproducing apparatus.

In the figure, as the rotating drum 1 rotates, the magnet 2
When the signal a passes through the pickup head 3, the signal a shown in FIG.
The signals shown in FIG. Signal R, c is a monostable multi-by-break (hereinafter referred to as ``mono-multi''>5a).

5b, the signals d and -e shown in the same figure (D) and (E) are reset terminals of the flip 70 knob 6, respectively.

They are supplied to the set terminals to reset and set them respectively. As a result, the flip-flop 6 outputs a signal f which falls at the fall of the signal d' and rises at the fall of the signal e.
((F) in the figure) is taken out from the terminal 7 as a head switching signal, and is also supplied to the trapezoidal wave generating circuit 8.

On the other hand, the incoming vertical synchronization signal is switched to 1 by the switch 9 which is connected to the recording terminal R1 and the reproduction terminal P.
The frequency-divided signal Vs/2 (during recording) and the 30H7 reference signal RE F , which comes in during playback (during playback), are respectively supplied to the sample hold circuit 10 and generated from the trapezoidal wave generating circuit 8. The phase comparison error signal obtained is taken out from the terminal 11 and used for the servo of the rotating drum 1.

Let us now consider the regeneration switching point in a helical scan two-head type device. In many cases, the switching point is set at the bottom of the screen, for example, the switching point is set at 6.5H before the reproduced vertical synchronization signal. In this case, when correcting the installation error of magnet 2 and adjusting the switching point, the standard magnetic tape is played back and the phase of the reproduced vertical synchronization signal waveform and drum pulse waveform is compared using an oscilloscope, etc., and this becomes the predetermined value. Volume 12a of mono multi 5a, 5b.

121), the pulse widths of the signals d and e are varied, and the fall and rise timings of the signal f are adjusted.

Here, there is one set (pair) of video heads for standard recording/playback, one set of video heads for long-time recording/playback, one set of video heads for normal recording/playback, and one set of video heads for variable speed playback.
A plurality of sets of rotating heads are attached to the rotating drum 1, such as 1 set of video heads for recording/playback, 11 sets of heads for audio, or 1 set of heads for flying erase. There is a magnetic recording/reproducing device.In such a device, it is necessary to generate a head switching signal with a different phase for each set of heads.For this purpose, conventionally, a monomultiple 5a and 5b
Volumes 12a1, 12a2 and 1211+, 1 respectively
21) Each switch 13a is arranged.

By switching 13b, for example, during standard recording/playback, the time constants of the monomultis 5a, 5b are determined by the volumes 12a + and 12tl+, respectively, and during long-term recording/playback, the volumes 12a 2, . 12b 2 each determines a time constant. In addition, as shown in FIG. 3(B), monomultis 58 to 5d and flip-flops 6a
, '6b are used to output, for example, a head switching signal for a video head from a terminal 7a, and a head switching signal for an audio head from a terminal 7b.

Problems to be Solved by the Invention In the conventional device, external parts, external circuits, etc. are increased in order to generate head switching signals for multiple sets of rotating heads as shown in FIG. 3 (A>, (B)). Also, mono multi 58-5
Since each time constant of d is adjusted by each volume, there are problems such as an increase in the number of adjustment steps.

Means for solving the problem 5 - Detecting the rotation of a rotating drum to which multiple sets of heads are fixed, and delaying the detection signal by a predetermined time that is different for each of the multiple sets of heads, In a head switching signal generation circuit of a magnetic recording/reproducing device that generates a head switching signal for switching each reproduction signal, a memory storing a plurality of time constant data corresponding to each of a plurality of sets of heads, and a mode determining means for determining which silk head is being used among the heads; reading means for reading out time constant data corresponding to the set of heads in use according to the determined mode;
A configuration consisting of a digital mono multi-circuit that generates a head switching signal for switching the playback signal of the set of heads in which a time detection signal is delayed in accordance with the time constant data read out by the readout means. The above-mentioned problems have been solved, and one embodiment thereof will be described with reference to FIG. 4 and subsequent figures.

Embodiment FIG. 4 shows a block system diagram of an embodiment of the main part of the circuit of the present invention. In the figure, 2o is the system controller 1 to roller, and various modes at the time of recording/playback (for example, standard recording/playback mode, long-time recording/playback mode, normal recording/playback mode, A mode signal instructing a mode (such as playback mode, variable speed playback mode, etc.) is received.

This mode signal is supplied to the mode determining means 20a in the Citrol system 20, and the set mode of this recording/reproducing apparatus is determined. The reading means 20b in the system controller 20 generates a read address for the memory 22 according to the mode determined by the mode determining means 20a, reads two time constant data from the above address of the memory 22, and converts one of the time constant data into a digital format. One of them is supplied to the monomulti 23, and the other is supplied to the digital monomulti 24. The digital monomulti 23 is supplied with a signal C shown in FIG. 2(B) from a terminal 25, and the digital monomulti 21 is supplied with a signal C shown in FIG. 2(C) from a terminal 26.

Here, the digital monomulti 23 has the configuration shown in FIG. 5 (A>). In FIG. ``At the rising edge, the cell is set to 1~ and its output becomes H level.

The output signal of this flip-flop 30 is the AND gate 3
1 and the set terminal S of the flip 70 knob 32. On the other hand, the clock signal from the terminal 33 and the output signal of the flip 70 tube 30 are ANDed in the AND gate 31, and the output of the AND gate 31 is supplied to the counter 34.

Further, the time constant data read from the memory 22 is stored in the register 35, and the register 35 always supplies this time constant data to the coincidence detection circuit 36. Further, the -number output circuit 36 is supplied with the outputs of the counter 34 from 1 to 1, and when the output of the counter 34 matches the time constant data, the -number output circuit 36 generates a detection signal and outputs a detection signal to the flip-flop 30.32. and the reset terminal R of the counter 34
and reset them. flip flop 3
2 generates and outputs a signal d shown in FIG. 2 (D>) that rises when set and falls when reset. This signal d is connected to the set terminal S of the flip-flop 27 shown in FIG.
supplied to The digital monomulti 24 has the same configuration as the digital monomulti 23, and similarly generates a signal e from the signal C and supplies it to the reset terminal R of the flip-flop 27. The flip 70 knob 27 generates a head switching signal f as shown in FIG.

Here, the operation of the system controller 2o when the magnetic recording/reproducing apparatus has a standard recording/reproducing head and a long-time recording/reproducing head will be described in more detail. The system controller 20 repeatedly performs the process shown in FIG. 6 within a sufficiently short predetermined time range after the power is turned on. 6th
In the figure, step 40 is first executed, and here the connection state of the switch that changes the operating mode between standard recording/playback and long-term recording/playback is read, and the operating mode using the standard recording/playback head is read. Case 9- If the number A is set to rsPJ and the operating mode uses a head for long-term recording/playback, the variable A is set to r'LPJ.
is set.

After step 40, the process moves to step 41, where the variable A
The set value of is determined, and if this is rs'PJ, step 42. In the case of r'LPJ, the process moves to step 43. In step 42, standard recording is performed from, for example, address N in the memory 22.
Two time constant data corresponding to reproduction are read out, and in step 44, these time constant data are transferred to each of the digital monomultis 23 and 24 and stored in the register 35 or the like. Furthermore, in step 43, two time constant data corresponding to long-term recording and playback are read from address N+1 of the memory 22, and in step 45, these time constant data are transferred to the digital monomultis 23' and 24, respectively. be done.

Therefore, the digital monomulti 23. A time constant is set according to the constant operation mode of each of '24, and a 10-rad switching signal is output from terminal 28 for switching each set of video heads used for recording and playback according to the operation mode. Ru.

FIG. 5 CB) shows a block system diagram of a modified example of the digital monomulti 23. In this figure, the same parts as in FIG. 5(A) are given the same reference numerals, and their explanations will be omitted. Figure 5 (B
), the output signals of knob 70 and knob 30 are supplied to set terminals S of flip 70 and knobs 32 and 37, respectively.

The register 38 stores time constant data supplied from the memory 22, and this time constant data is always supplied to the minus number construction circuit 39. - The count output of the counter 34 is supplied to the number output circuit 39;
First, when the count output matches the time constant data, a detection signal is generated and supplied to the reset terminal of the flip 70 knob 37. As a result, the flip-flop 37 outputs a pulse signal having a pulse width corresponding to the time constant data of the rising register 38 at the same time as the signal d. Digital mono multi 2
3.24 is configured as shown in FIG. 5(B). In FIG. 4, a flip-flop 70 is added, and the set terminal S and reset terminal R of this flip-flop are connected to digital monomultis 23, . 24 husband's flip-flops 37
Provides an output signal corresponding to the Also memory 22
Two time constant data are stored in one address, and are supplied to each register 35 of the video head multiplier 2'3.24, for example.
Lower time constant data corresponding to the audio head is supplied to each register 38. As a result, the flip-flop 27 outputs a video head switching signal, and the additional flip-flop outputs an audio head switching signal.

, FIG. 7 shows a block diagram of the main parts of a second embodiment of the circuit of the present invention. In the same figure, 25 is a reference phase count value setting circuit, and the phase difference 6.
A count value corresponding to 5H is set. Reference numeral 50 denotes a digital mono multi circuit, which is composed of a combination of digital mono multi circuits 23 and 24 and a flip 70 tube 27 in FIG. The falling timing and rising timing of the output signal [ are adjusted respectively.

The reproduced video signal that has entered the terminal 51 is separated into a vertical synchronizing signal Vs by a vertical synchronizing signal separation circuit 52, and is supplied together with signal @f to a phase difference detector 53, where the phase difference with the signal t is detected. . The phase difference detector 53 has a configuration shown in FIG. In FIG. 0, the counter 55 is reset by the signal f, starts counting the clock signal from the time when the output of the flip-flop 54 set by the signal f is generated, and this count value is supplied to the latch circuit 56.

The flip 70 knob 54 is driven by the reproduction vertical synchronization signal Vs,
The latch circuit 56 latches the count value from the counter 55, and the latch output is supplied to the comparator 57 in FIG.

On the other hand, the reference phase count value setting circuit 58 sets the 13- reference position corresponding to 6.5H before the reproduction vertical synchronization signal, for example, in the standard recording/reproduction operation mode based on the control signal supplied from the system controller 20. , generates a phase count value and also records it for a long time.
In the reproduction operation mode, a phase count value corresponding to this is generated. This phase count value is supplied to comparator 57.

In the comparator 57, a count value corresponding to the phase difference from the phase difference detector 53 and a reference phase count value setting circuit 58
The phase count values from 1 to 3 are compared, and an error signal corresponding to the difference between these count values is supplied to the up/down control circuit 59. An address corresponding to the operation mode of the memory 22 (for example, N.

The time constant data stored at address (N+1) is increased or decreased, and thereby the fall timing and rise timing of the head switching signal f of the digital mono multi circuit 50 outputted from the terminal 28 are variably adjusted.

In this way, the timing of head switching can be automatically adjusted, the adjustment process on the production line can be automated, and the time required for adjustment can be shortened.

Incidentally, the up/down control circuit 59 is operated by a control signal from the terminal 60 (14-) only during automatic adjustment, and is kept off at other times. This can prevent malfunctions when no playback video signal is received. If the digital monomulti 23, 24 has a configuration as shown in FIG. 5(B), the head switching signal from the terminal 28 is first supplied to the phase difference detector 53, and
The upper time constant data corresponding to the video head at address +1 is adjusted. Thereafter, the reference phase count value setting circuit 58 generates, for example, a phase count value of an audio head in response to a control signal from the system controller 20, and a head switching signal outputted by a flip-flop added to the circuit shown in FIG. The lower time constant data corresponding to the audio heads at addresses N and N+1 of the memory 22 is adjusted by supplying it to the detector 53.

FIG. 9 shows a block diagram of a third embodiment of the circuit of the present invention. In the figure, description of the same parts as in FIG. 7 will be omitted. 9th
In the figure, five up/down control circuits are removed, and this function is replaced by the system controller 20. The system controller 20 receives from a terminal 21 a mode signal as well as a control signal instructing whether automatic switching point adjustment is necessary or not. This system controller 20
executes the process shown in FIG. 10 instead of the process shown in FIG. 6. In FIG. 10, description of the same parts as in FIG. 6 will be omitted. In FIG. 10, step 46 is first executed, in which the connection state of the switch for changing the operating mode is read and variable A is set, and the control signal is read and t is set to variable B when automatic adjustment is necessary. Y”, rNJ is set when unnecessary.

Furthermore, after executing step 44 or 45, the process moves to step 47. Here, it is determined whether variable B is rYJ, and steps 63 and subsequent steps are performed only when variable B is "Y". In step 63, the error signal output from the comparator 57 is read, and when the count value of the phase difference detector 53 is larger than the reference phase count value, [)J is set in the variable C,
When they are the same, [E] is set in the variable C, and when they are smaller, rUJ is set in the variable C. The setting value of this variable C is determined in steps 64 and 65, and the time constant data stored in the rUJ knob 66 at the address corresponding to the operation mode of the memory 22 (for example, address N, 'N+1) is "1". When the time constant data is rDJ, the above-mentioned time constant data is decremented by "1" in step 67. As a result, the falling timing and rising timing of the head switching signal f output from the digital monomulti circuit 50 are variably adjusted.

Note that the vertical synchronization signal separation circuit 5 in FIGS. 7 and 9
22 phase difference detection circuit 53. Comparator 67° reference phase count value setting circuit 58. The up/down control circuit 59 and the like are separated from the magnetic recording/reproducing device and are only installed during manufacturing.
These may be connected to adjust the time constant data in the memory 22, and the present invention is not limited to the above embodiment.

Effects As described above, the 17-head switching signal generation circuit of the magnetic recording/reproducing apparatus according to the present invention detects the rotation of the rotating drum to which a plurality of sets of heads are fixed, and transmits the detection signal to each of the plurality of heads. In a head switching signal generation circuit of an "i-Ki recording and reproducing apparatus" which generates a head switching signal for switching the reproduction signals from multiple sets of heads with a delay of a different predetermined time, A memory storing a plurality of time constant data, a mode determining means for determining which of the plurality of heads the device is using, and mode determining means for determining which of the plurality of heads the device is in state 2 of. A readout means reads out time constant data corresponding to the set of unused rads according to the selected mode, and a time detection signal is delayed and used in accordance with the time constant data read out by the readout means. Switching the playback signal of the set of heads,
It consists of a digital mono multi-circuit that generates a head switching signal for switching, so even if multiple sets of heads are fixed to the rotating drum, the circuit configuration is the same as when there is only one set of heads, and there are no external parts, Switching of the head switching signal can be performed without increasing the number of external circuits, and by comparing the phase difference between the reproduced vertical synchronizing signal and the head switching signal 18- with a reference value and adjusting the time constant data stored in the memory. It has the advantage of being able to automatically adjust the timing, making the adjustment process unmanned, and making it possible to save on labor.

4. Brief explanation of the drawings: Figures 1 and 3 (A).

(B) is a block system diagram of each individual circuit of the conventional circuit, and Fig. 2 (A
) to (F) are time charts for explaining the operation of the conventional circuit and the circuit of the present invention, FIGS. 4, 7, and 9 are block diagrams of the main parts of each embodiment of the circuit of the present invention, and FIG. (A>, (
B) is a concrete block system diagram of each embodiment of the digital monomulti applied to the circuit of the present invention; FIGS. 6 and 10 are flowcharts for explaining the operation of the system controller in FIGS. 4 and 7, respectively; FIG. 8 is a concrete block system diagram of one embodiment of the phase difference detection circuit shown in FIGS. 7 and 9. FIG.

1... Rotating drum, 2... Magnet, 3... Pickup head, 4... Pulse shaping circuit, 27. ．．
30゜32.37.54...Noritsubu 70 Tsubu, 20
...System controller, 22...Memory, 2-
9.24...Digital mono multi 36, 39...-Several output circuit, 40~4.5.61~
66...Step, 50...Digital monomulticircuit, 52...Vertical synchronizing signal separation circuit, 53...Phase difference detector, 57...Comparator, 58...Reference phase count value Setting circuit, 59...up/down control circuit.

Continuation of page 1 ■Inventor: Hidetoshi Ozaki, Kana, Yokohama City.

Inside the company

Claims (1)

[Claims] Detecting the rotation of a rotating drum to which a plurality of sets of heads are fixed, and delaying the detection signal by a predetermined time that is different for each of the plurality of heads, thereby switching the respective reproduction signals from the plurality of heads. In a head switching signal generating circuit of a magnetic recording/reproducing device that generates a head switching signal of the plurality of heads, a memory storing a plurality of time constant data corresponding to each of the plurality of sets of heads; mode determining means for determining which set of heads is in use; reading means for reading out time constant data corresponding to the set of heads in use according to the determined mode; a digital mono multi-circuit that delays the detection signal for a time according to the time constant data read out by the means and generates a head switching signal for switching the reproduction signal of the set of heads in use; A head switching signal generation circuit for a magnetic recording/reproducing device, characterized in that: