JPS60149121A - Method for depositing thin film - Google Patents

Method for depositing thin film

Info

Publication number
JPS60149121A
JPS60149121A JP59006024A JP602484A JPS60149121A JP S60149121 A JPS60149121 A JP S60149121A JP 59006024 A JP59006024 A JP 59006024A JP 602484 A JP602484 A JP 602484A JP S60149121 A JPS60149121 A JP S60149121A
Authority
JP
Japan
Prior art keywords
anode
electrode
cathode
thin film
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59006024A
Other languages
Japanese (ja)
Inventor
Akira Hanabusa
花房 彰
Koshiro Mori
森 幸四郎
Takashi Arita
有田 孝
Zenichiro Ito
伊藤 善一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59006024A priority Critical patent/JPS60149121A/en
Publication of JPS60149121A publication Critical patent/JPS60149121A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02592Microstructure amorphous
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To obtain the amorphous Si solar cell of uniform quality and large area while accelerating the deposition speed by arranging a grid electrode between the electrodes of anode and cathode arranged in a vacuum tank and controlling the potential distribution arbitrarily when plasma discharge is generated between said electrodes so as to deposit the product generated by decomposition of a material gas. CONSTITUTION:A grid electrode 13 is arranged between an anode plate 11 in which a plurality of substrates 18 are embedded and a cathode lower electrode 12. At this time, the electrode 13 has the structure that an insulator 19 connects reticular metallic pieces 14, 15 and 16. Then the largest negative potential is applied to the piece 15 on the side of a peripheral part and the potential is reduced gradually toward the center to make it zero in the central piece 16. thus, when a gas is introduced to generate discharge, the kinetic energy of free electrons is restrained between the anode 11 and the cathode 12 and number of electrons which enter into the anode 11 and of negative ions are reduced thereby producing the good-quality thin film 17 with good productivity.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は薄膜堆積法に関するものである。[Detailed description of the invention] Industrial applications The present invention relates to thin film deposition methods.

薄膜技術は、今やあらゆる産業分itにおいても、今後
の展開を図る上で、中心となり得る重要な技術であるこ
とは周知の事実である。その中でも、電子部品関係、と
りわけ半導体分野におけるPSG。
It is a well-known fact that thin film technology is now an important technology that can play a central role in the future development of IT in all industries. Among them, PSG is related to electronic components, especially in the semiconductor field.

NSG、SiN等のパッジベージロン用材料として、ま
たアモルファスシリコン太陽電池等の薄膜機能素子とし
て脚光を浴びている。さらKは新素材への展開にも大き
な期待が持たれている。
It has been in the spotlight as a material for padgelons such as NSG and SiN, and as a thin film functional element such as amorphous silicon solar cells. There are great expectations for the development of SaraK into new materials.

従来例の構成とその問題点 従来よシ薄膜を形成する手段の中で、一つの有効な手段
として、プラズマCVD法がある。このプラズマCVD
法を実現する装置として、種々の装置が考えられ、実際
に量産に用いられているものも多い。その中でも最も一
般的な置所装置の概略を第1図に示し、上記装置を使用
してアモルファスシリコン太陽電池を製作した場合の問
題点を以下簡単に説明する。
Structure of the conventional example and its problems Among the conventional methods for forming thin films, one effective method is the plasma CVD method. This plasma CVD
Various devices can be considered as devices for realizing the method, and many of them are actually used in mass production. The outline of the most common installation device among these is shown in FIG. 1, and the problems encountered when manufacturing an amorphous silicon solar cell using the above device will be briefly explained below.

量産に使用される装置は、第1図Aに示すようにトレー
(アノード)1と、下部電極(カソード)2として固定
電極があり、前記トレー1と下部電極2間でプラズマ放
電を行ないトレー1にのせた第1図Bの基板4に、第1
図Cのように薄膜6を堆積させるが、一般的に生産性を
上げ、しかも膜厚等の前記基板4内の分布を良くする為
に、前記プラズマ放電を行なったまま、前記トレー1を
移動させる方式が採用されている。
The equipment used for mass production has a tray (anode) 1 and a fixed electrode as a lower electrode (cathode) 2, as shown in FIG. The first plate is placed on the substrate 4 of FIG.
As shown in FIG. A method is used to do so.

しかるに、上記方式で、アモルファシスシリコン膜を堆
積させると、前記トレー1全面にわたって平均した堆積
速度が約1八/秒程度であれば、膜厚分布、暗室導度及
び光電導度とも太陽電池にとって必要な性能を十分満足
する良質な膜が作成できた。しかしながら、量産装置と
いう意味がらすれば、もっと生産性を上げる必要があり
、前記堆積速度を上げることが望まれる。
However, when an amorphous silicon film is deposited using the above method, if the average deposition rate over the entire surface of the tray 1 is about 18/sec, the film thickness distribution, dark room conductivity, and photoconductivity are all good for solar cells. A high-quality film that fully satisfies the required performance was created. However, in terms of mass production equipment, it is necessary to further increase productivity, and it is desirable to increase the deposition rate.

そこで、上記装置の本質的な性能を見る為に、前記トレ
ー1を固定した捷ま、前記堆積速度を約3八/秒程度に
上げて、アモルファスシリコンを前記基板4に堆積させ
て、膜厚、暗室導度、光電導度及びピンホール数の分布
を調べると、第2図A、B、Cに示す通りに、第1図に
示す前記下部電極2の中央部7と周辺部6とで、全く異
質の膜が作成された。つまり、前記下部電極2の周辺部
6の膜の方が、前記中央部7よりも膜厚が厚く、暗室導
度が大きく、さらに、光電導度が小さく、ピンホールの
多い膜になってしまう。こういつ膜で太陽電池を作成す
ると、第3図に示すように、前記堆積速度約1八/秒で
太陽電池を製作した場合の性能イに比べて、前記堆積速
度約3八/秒で太陽電池を製作した場合の性能口の方が
数段劣ってしまう。
Therefore, in order to examine the essential performance of the above-mentioned apparatus, amorphous silicon was deposited on the substrate 4 while the tray 1 was fixed and the deposition rate was increased to about 38/sec. , dark room conductivity, photoconductivity, and the number of pinholes, as shown in FIGS. 2A, B, and C, the central part 7 and peripheral part 6 of the lower electrode 2 shown in FIG. , a completely heterogeneous membrane was created. In other words, the film in the peripheral part 6 of the lower electrode 2 is thicker than the central part 7, has a higher dark room conductivity, and has a lower photoconductivity, resulting in a film with many pinholes. . When a solar cell is made with this film, as shown in Fig. 3, the performance of the solar cell at the deposition rate of about 38/sec is higher than that when the solar cell is fabricated at the deposition rate of about 18/sec. The performance of the battery produced would be several orders of magnitude worse.

以上の結果より、従来の方法では、生産性良く、高性能
なアモルファスシリコン太陽電池を製作することができ
なかった。
From the above results, it was not possible to manufacture high-performance amorphous silicon solar cells with good productivity using conventional methods.

発明の目的 そこで、本発明の目的とするところは、以上の従来例に
おける欠点を改善して、生産性良く、品質の良い膜が作
成できる薄膜堆積法を提供することにある。
OBJECTS OF THE INVENTION Therefore, it is an object of the present invention to provide a thin film deposition method that improves the drawbacks of the conventional methods described above and can produce films of high productivity and quality.

発明の構成 上記目的を達成する為2本発明は、大きい堆積速度を持
ち、かつ良い膜質の膜が得られなかった前記電極周辺部
での堆積速度を抑えて膜質を向上させるとともに、前記
電極中央部での膜質を保ったまま堆積速度を向上させる
べく改良を加えたことを特徴としたものである。
Structure of the Invention In order to achieve the above object, the present invention improves the film quality by suppressing the deposition rate in the peripheral area of the electrode where a film with a high deposition rate and poor film quality could not be obtained, and at the same time improves the film quality at the center of the electrode. This method is characterized by improvements that have been made to increase the deposition rate while maintaining the film quality in some areas.

実施例の説明 以下、本発明について実施例について詳細に説明する。Description of examples Examples of the present invention will be described in detail below.

第4図に示すように、アノードトレー11とカソード下
部電極12との間に、グリッド電極13を設置する。な
お上記グリッド電極13はメソシュ状の金属部片14,
15.16間を絶縁物19等でつないだ構造を持ち、上
記メツシュ状の金属部片へそれぞれ負電位を適当に配分
し周辺部側の上記メツシュ状金属部片15に一番大きな
負電位を印加し、中央部側の上記メツシュ状金属部片1
6へ行くに従って順次負電位を小さくしていき、前記中
央部の金属部片16を零電位にする。
As shown in FIG. 4, a grid electrode 13 is installed between the anode tray 11 and the cathode lower electrode 12. Note that the grid electrode 13 has a mesoche-like metal piece 14,
15 and 16 are connected with an insulator 19, etc., and a negative potential is appropriately distributed to each of the mesh-shaped metal pieces, and the largest negative potential is applied to the mesh-shaped metal piece 15 on the peripheral side. The mesh-like metal piece 1 on the center side
6, the negative potential is gradually decreased, and the metal piece 16 at the center is brought to zero potential.

このような構造の装置で、所定のガスを導入して放電を
行なうと、前記周辺部のメツシュ状金属部片15に印加
された大きな負電位によって、前記アノード11とカソ
ード12との間の自由電子の運動エネルギーを抑え、か
つアノード11へ飛び込む電子や負イオンの数を減少さ
せる。ここでプラズマ中での反応は、電子の運動エネル
ギーに大きく依存するので、上記周辺部分16での膜の
堆積速度を減少させ、さらに、負イオン等による膜の損
少を少なくさせる。また前記メツシュ状金属14の周辺
部16と中央部16間の電位勾配によって、電子は上記
周辺部15から上記中央部16へ加速され、上記中央部
16における膜の堆積速度は促進される。
When a predetermined gas is introduced into a device having such a structure and a discharge is performed, the large negative potential applied to the mesh-like metal piece 15 at the periphery creates a gap between the anode 11 and the cathode 12. The kinetic energy of electrons is suppressed, and the number of electrons and negative ions jumping into the anode 11 is reduced. Here, since the reaction in the plasma largely depends on the kinetic energy of electrons, the deposition rate of the film in the peripheral portion 16 is reduced, and furthermore, the loss of the film due to negative ions and the like is reduced. Further, due to the potential gradient between the peripheral part 16 and the central part 16 of the mesh-like metal 14, electrons are accelerated from the peripheral part 15 to the central part 16, and the deposition rate of the film in the central part 16 is accelerated.

以上の方法の本質的な評価を行なう為に、前記アノード
(トレー)11全固定したまま、アモルファスシリコン
膜17を基板18へ堆積速度3人/秒で堆積させて、膜
厚、暗室導度、光電導度、及びピンホール数の分布を調
べたところ第5図A。
In order to essentially evaluate the above method, an amorphous silicon film 17 was deposited on the substrate 18 at a deposition rate of 3 persons/second with the anode (tray) 11 completely fixed, and the film thickness, dark room conductivity, The distribution of photoconductivity and number of pinholes was investigated and is shown in Figure 5A.

B、Cに示すように、上記基板18全面にわたって均一
な良質の膜が得られた。
As shown in B and C, a uniform, high-quality film was obtained over the entire surface of the substrate 18.

この方法で太陽電池を製作すると第6図に示すように、
堆積速度1人/秒で製作したものイと、堆積速度3人/
秒で製作したもの口とも同程度の性能を有する太陽電池
が製作できた。
When a solar cell is manufactured using this method, as shown in Figure 6,
The one made with a deposition rate of 1 person/second and the one made with a deposition rate of 3 people/second.
We were able to produce a solar cell with performance comparable to that produced in seconds.

発明の効果 本発明の方法で、アモルファスシリコン太陽電池を作成
すると、大きな堆積速度で、大面積にわたって均一な良
質の太陽電池の製作が可能となる0なお、本発明は他の
半導体分野においてもプラズマCVD法を用いた薄膜の
堆積にも応用でき、ピンホール及びクラックが無く、物
性の均一な膜の作成ができる。
Effects of the Invention When an amorphous silicon solar cell is produced by the method of the present invention, it becomes possible to produce a high-quality solar cell that is uniform over a large area at a high deposition rate. It can also be applied to the deposition of thin films using the CVD method, and it is possible to create films with uniform physical properties without pinholes or cracks.

、4、図面の簡単な説明 第1図は従来より一役的に用いら牡ているプラズマCV
D装置の概略断面図であり、Aは装置の概略図、Bは基
板の設置状態を示す図、Cは基板へのアモルファスシリ
コンの堆積状態を示す図、第2図Aは下部電極と薄膜の
膜厚との関係を示す図、第2図Bは下部電極と薄膜の暗
室導度との関係を示す図、第2図Cは下部電極と薄膜の
ピンホール密度との関係を示す図、第3図は従来のアモ
ルファスシリコン太陽電池の特性を示す図、第4図は不
発明の製法に用いたプラズマCVD装置の概略断面図、
第5図Aは同装置の下部電極と膜厚との関係ケ示す図、
第6図Bは下部電極と薄膜の暗′亀導度との関係を示す
図、第6図Cは下部電極と薄膜のピンホール密度との関
係を示す図、第6図は本発明の製法によって得たアモル
ファスシリコン太陽電池の特性を示す図である。
, 4. Brief explanation of the drawings Figure 1 shows a plasma CV that has been used in the past.
D is a schematic cross-sectional view of the device, A is a schematic diagram of the device, B is a diagram showing the installation state of the substrate, C is a diagram showing the deposition state of amorphous silicon on the substrate, and FIG. 2A is a diagram showing the lower electrode and thin film. Figure 2B is a diagram showing the relationship between the lower electrode and the dark room conductivity of the thin film. Figure 2C is a diagram showing the relationship between the lower electrode and the pinhole density of the thin film. Figure 3 is a diagram showing the characteristics of a conventional amorphous silicon solar cell, Figure 4 is a schematic cross-sectional view of a plasma CVD apparatus used in the uninvented manufacturing method,
Figure 5A is a diagram showing the relationship between the lower electrode and film thickness of the device;
Figure 6B is a diagram showing the relationship between the lower electrode and the dark conductivity of the thin film, Figure 6C is a diagram showing the relationship between the lower electrode and the pinhole density of the thin film, and Figure 6 is the manufacturing method of the present invention. FIG. 3 is a diagram showing the characteristics of an amorphous silicon solar cell obtained by the method.

11・・・・・アノード(トレー)、12・・・・・・
カソード(下部電極)、13・・・・・・グリッド電極
、14・・・・・グリッド電極の金属部分、16・・・
・・・グリッド電極の周辺部、16・・・・グリッド電
極の中央部、17・・・・・・堆積さ牡た薄膜、18・
・・・・・基板、19・・・・・・絶縁物。
11... Anode (tray), 12...
Cathode (lower electrode), 13...Grid electrode, 14...Metal part of grid electrode, 16...
... Peripheral part of grid electrode, 16... Central part of grid electrode, 17... Deposited thin film, 18.
...Substrate, 19...Insulator.

代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 A f3 c w、3 (2) 梵圧(イ1箪位)
Name of agent: Patent attorney Toshio Nakao and 1 other person 1st
Diagram A f3 c w, 3 (2) Bonsai pressure (A1 kō position)

Claims (1)

【特許請求の範囲】[Claims] 真空槽内に設置されたアノード・カソード両電極間でプ
ラズマ放電を行なって原料ガスを分解し、生成物を基板
に堆積するにあたって、前記両電極間にグリッド電極を
設け、このグリッド電極内の電位分布を任意に制御して
前記アノード電極又はカソード電極に設置した基板上に
薄膜を堆積することを特徴とする薄膜堆積法。
When plasma discharge is performed between the anode and cathode electrodes installed in the vacuum chamber to decompose the source gas and deposit the product on the substrate, a grid electrode is provided between the two electrodes, and the potential within the grid electrode is A thin film deposition method characterized by depositing a thin film on a substrate placed on the anode electrode or the cathode electrode while controlling the distribution arbitrarily.
JP59006024A 1984-01-17 1984-01-17 Method for depositing thin film Pending JPS60149121A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59006024A JPS60149121A (en) 1984-01-17 1984-01-17 Method for depositing thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59006024A JPS60149121A (en) 1984-01-17 1984-01-17 Method for depositing thin film

Publications (1)

Publication Number Publication Date
JPS60149121A true JPS60149121A (en) 1985-08-06

Family

ID=11627111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59006024A Pending JPS60149121A (en) 1984-01-17 1984-01-17 Method for depositing thin film

Country Status (1)

Country Link
JP (1) JPS60149121A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019044810A1 (en) * 2017-08-30 2019-03-07 京セラ株式会社 Solar cell module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019044810A1 (en) * 2017-08-30 2019-03-07 京セラ株式会社 Solar cell module

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