JPS6260875A - Plasma cvd apparatus - Google Patents

Plasma cvd apparatus

Info

Publication number
JPS6260875A
JPS6260875A JP19845785A JP19845785A JPS6260875A JP S6260875 A JPS6260875 A JP S6260875A JP 19845785 A JP19845785 A JP 19845785A JP 19845785 A JP19845785 A JP 19845785A JP S6260875 A JPS6260875 A JP S6260875A
Authority
JP
Japan
Prior art keywords
upper electrode
plasma cvd
cvd apparatus
center
gas introduction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19845785A
Other languages
Japanese (ja)
Inventor
Toshiharu Tanpo
反保 敏治
Katsunori Nishii
勝則 西井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP19845785A priority Critical patent/JPS6260875A/en
Publication of JPS6260875A publication Critical patent/JPS6260875A/en
Pending legal-status Critical Current

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  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE:To equalize the amount of ions of gas converted into plasma and to form a high quality insulating film of a uniform thickness by concentrically arranging plural gas introducing holes pierced in the face of a lower electrode confronting a upper electrode so that the intervals are made gradually smaller from the central part toward the peripheral part. CONSTITUTION:An upper electrode 1 and a lower electrode 2 are used as parallel flat electrodes in a plasma CVD apparatus. Gas is introduced into the apparatus from the central part of the upper electrode 1 through plural gas introducing holes 3 pierced in the faces of the upper electrode 1 confronting the lower electrode 2. The gas introducing holes 3 are concentrically arranged so that the intervals (d) are made gradually smaller from the central part toward the peripheral part.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はプラズマCVD装置に係り、特に平行平板型プ
ラズマCVD装はの電極構造に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a plasma CVD apparatus, and particularly to an electrode structure of a parallel plate type plasma CVD apparatus.

(従来の技術) 第4図は従来の平行平板型プラズマCVD装置における
電極の説明図で、(a)は上部電極の断面図、(b)は
その下部電極と対向する而(以下、上部電極対向面とい
う)に形成されたガス導入孔の分布を示す平面図である
。(a)図において、1は上部電極でその上部電極対向
面2にはガス導入孔3が、(b)図でみるように、等間
隔の仮想メツシュ線4の各交点5に設けられており、そ
の数は上部電極1の中心部と周辺部とでは単位面積あた
り同数である。
(Prior Art) FIG. 4 is an explanatory diagram of electrodes in a conventional parallel plate plasma CVD apparatus, in which (a) is a cross-sectional view of the upper electrode, and (b) is the electrode opposite to the lower electrode (hereinafter referred to as the upper electrode). FIG. 3 is a plan view showing the distribution of gas introduction holes formed on the opposing surface. In the figure (a), 1 is an upper electrode, and gas introduction holes 3 are provided on the surface 2 facing the upper electrode, and as shown in the figure (b), there are provided at each intersection 5 of equally spaced virtual mesh lines 4. , the number is the same per unit area in the center and periphery of the upper electrode 1.

第5図は第4図の上部電極1により生ずる特性を示すも
ので、(a)は上部電極1および下部電極6が対向間隔
7を以て対向する概略態様断面図、(b)は対向間隔7
における電界強度分布(縦@)を(a)図に対応させて
電極対向面の中心Oから直径方向r(横軸)に示した図
、(c)は下部電極6の対向面上に形成されるシリコン
窒化膜(SiN)の膜厚比(縦軸)を電極の直径方向r
(横軸)について示した図であり、膜厚比はSiNの最
大膜厚を1として規格化されている。
FIG. 5 shows the characteristics caused by the upper electrode 1 of FIG. 4, in which (a) is a schematic cross-sectional view in which the upper electrode 1 and the lower electrode 6 face each other with a facing interval of 7, and (b) is a schematic cross-sectional view of the upper electrode 1 and the lower electrode 6 with a facing interval of 7.
A diagram showing the electric field strength distribution (vertical @) in the diametric direction r (horizontal axis) from the center O of the electrode facing surface corresponding to the diagram (a), and (c) is a diagram showing the electric field intensity distribution (vertical @) formed on the facing surface of the lower electrode 6. The film thickness ratio (vertical axis) of the silicon nitride film (SiN)
(horizontal axis), and the film thickness ratio is standardized with the maximum film thickness of SiN as 1.

この図(b)から分かるとおり対向間隔7における電界
強度分布は、電極対向面R縁部になるにしたがって著し
く低下しており、そのためにSiNの膜厚も電極対向面
周縁部で薄くなっている。
As can be seen from this figure (b), the electric field strength distribution at the facing interval 7 decreases significantly as it approaches the R edge of the electrode facing surface, and therefore the SiN film thickness also becomes thinner at the periphery of the electrode facing surface. .

(発明が解決しようとする問題点) 上述のように、従来のプラズマCVD装置により形成さ
れるSiN等の堆積膜の厚さは、前述第4図で見たよう
に均一性が悪く、したがって5堆積膜を必要とする半導
体装置の製造歩留を悪化させる欠点があった。
(Problems to be Solved by the Invention) As mentioned above, the thickness of the deposited film of SiN etc. formed by the conventional plasma CVD apparatus has poor uniformity as seen in FIG. This has the drawback of deteriorating the manufacturing yield of semiconductor devices that require deposited films.

本発明はこのような従来の平行平板型プラズマCVD装
置における欠点を排除することを目的とする。
It is an object of the present invention to eliminate such drawbacks in the conventional parallel plate type plasma CVD apparatus.

(問題点を解決するための手段) 上記の目的を達成するために本発明は、上部電極対向面
2におけるガス導入孔3の開孔位置を、たとえば、上部
電極対向面2の中心Oからの距離r=Ae  ”+Cに
したがって連続的に変化させて、上部電極1の周辺でガ
ス導入孔3の単位面積当りの数を多くする手段を採るこ
とにより、下部電極対向面8上で形成されるSiNなど
の半導体堆積膜の膜厚の均一性を確保するものである。
(Means for Solving the Problems) In order to achieve the above object, the present invention changes the opening position of the gas introduction hole 3 in the upper electrode facing surface 2 from the center O of the upper electrode facing surface 2, for example. The gas introduction holes 3 are formed on the lower electrode facing surface 8 by continuously changing the distance r=Ae''+C and increasing the number of gas introduction holes 3 per unit area around the upper electrode 1. This ensures the uniformity of the film thickness of a semiconductor deposited film such as SiN.

(作 用) 本発明によれば半導体堆積膜の膜厚の均一性が向上し、
したがって半導体装置の製造における歩留を向上させる
ことができる。
(Function) According to the present invention, the uniformity of the film thickness of the semiconductor deposited film is improved;
Therefore, the yield in manufacturing semiconductor devices can be improved.

(実施例) 以下、本発明を実施例により図面を用いて詳細に説明す
る。
(Example) Hereinafter, the present invention will be explained in detail by way of an example using the drawings.

第1図は本発明の一実施例を示す上部電極1の断面図(
a)、およびその上部電極対向面を示す平面図(b)で
あり、以下、半径20(!11の上部電極1と下部電極
6を有する平行平板型プラズマCVD装置を例として説
明する。
FIG. 1 is a cross-sectional view of an upper electrode 1 showing an embodiment of the present invention (
a) and a plan view (b) showing the surface facing the upper electrode.Hereinafter, a parallel plate plasma CVD apparatus having an upper electrode 1 and a lower electrode 6 with a radius of 20 (!11) will be described as an example.

ます(b)図において、上部電極対向面2におけるガス
導入孔3は、上部電極対向面2の中心0からの距離をr
とした場合、 r=Ae  ”’  +C で与えられており、図は上式においてA = 20a+
+ 。
In figure (b), the gas introduction hole 3 on the upper electrode facing surface 2 is located at a distance r from the center 0 of the upper electrode facing surface 2.
In the case of
+.

B=1cm、C=−3■とした場合の上部電極対向面2
の平面図である。なお、nは上部電極対向面2の中心O
から半径方向に計算したガス導入孔3の番数で、一つの
同心円上におけるガス導入孔3間の間隔dを4a++と
じており、ガス導入孔3の直径は1mmである。
Upper electrode facing surface 2 when B=1cm and C=-3■
FIG. Note that n is the center O of the upper electrode facing surface 2
The number of the gas introduction holes 3 calculated in the radial direction from , the distance d between the gas introduction holes 3 on one concentric circle is 4a++, and the diameter of the gas introduction holes 3 is 1 mm.

第2図は上式で得られる、ガス導入孔3の番数(横軸)
と中心0からの距離(縦軸)の関係の計算図を示してい
る。
Figure 2 shows the number of gas introduction holes 3 (horizontal axis) obtained from the above formula.
A calculation diagram of the relationship between and the distance from the center 0 (vertical axis) is shown.

第3図は本発明の一実施例によるプラズマCvD′jA
[の下部電極対向面8と(a)1本発明の装置により得
たSiN膜の膜厚と従来装置により形成したシリコンウ
ェハ9上のSiNの膜厚を、最大膜厚を1で規格化して
示したもので(b)、下部電極対向面8上における直径
方向の膜厚比が示されている。この(b)図で分かると
おり、従来のプラズマCVD装置により得られる堆積膜
は下部電極対向面8の周辺で極端に膜厚が薄くなってき
ており。
FIG. 3 shows a plasma CvD′jA according to an embodiment of the present invention.
Lower electrode facing surface 8 and (a) 1 The film thickness of the SiN film obtained by the apparatus of the present invention and the film thickness of SiN on the silicon wafer 9 formed by the conventional apparatus, normalized by the maximum film thickness of 1. In the figure (b), the film thickness ratio in the diametrical direction on the lower electrode facing surface 8 is shown. As can be seen from this figure (b), the deposited film obtained by the conventional plasma CVD apparatus becomes extremely thin around the lower electrode facing surface 8.

約60%のバラつきをみせている。It shows a variation of about 60%.

これに対し本発明によるSiN堆積膜は、下部電極対向
面8の周縁部においても、従来に比べ10倍以上小さい
6%程度のバラつきしがなく1本発明によれば堆積膜の
膜厚の均一化が達成できることを示している。
On the other hand, the SiN deposited film according to the present invention has no variation of about 6%, which is more than 10 times smaller than the conventional one, even at the peripheral edge of the lower electrode facing surface 8. According to the present invention, the thickness of the deposited film is uniform. This shows that it is possible to achieve

なお、ガス導入孔3の位置は上記の実施例のように連続
的にすることなく、上部′fj:tflIi対向面2の
中心から半径方向に段階的に小さくしても同じ結果が得
られる。
The same result can be obtained even if the position of the gas introduction hole 3 is not made continuous as in the above embodiment, but is made smaller stepwise in the radial direction from the center of the upper 'fj:tflIi facing surface 2.

(発明の効果) 以上、詳細に説明して明らかなように本発明は、堆積膜
の膜厚に均一性をもたせることができるプラズマCVD
装置であり、したがって半導体製造に実施して歩留の向
上を図ることができるから。
(Effects of the Invention) As is clear from the above detailed description, the present invention provides a plasma CVD method that can provide uniformity in the thickness of a deposited film.
This is because it is a device and can therefore be implemented in semiconductor manufacturing to improve yield.

用いて益するところが大である。There are many benefits to using it.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す上部電極の断面図およ
びガス導入孔を示す平面図、第2図はガス導入孔の位置
を示す計算図、第3図は本発明の一実施例によるシリコ
ン窒化膜の膜厚を説明する規格図、第4図は従来のプラ
ズマCVD装置における上部電極の断面図とガス導入孔
を示す平面図、第5図は従来のプラズマCVD装置の電
極の概略図と、その電界強度およびシリコン窒化膜の膜
厚を示す図である。 1 ・・・上部電極、 2 ・・・上部電極対向面、3
 ・・・ガス導入孔、 6・・・下部電極、 7・・・
電極対向間隔、 8 ・・・下部電極対向面。 特許出願人 松下電器産業株式会社 第1図 (a) 3〃ス導入JL (b) 第2図 η″ス4人几番代n 第3図 (a) (b) (b) 第5図 (a) (b) 電極j7自π狛の盪イ歪方向 (C)
Fig. 1 is a cross-sectional view of the upper electrode and a plan view showing the gas introduction hole showing an embodiment of the present invention, Fig. 2 is a calculation diagram showing the position of the gas introduction hole, and Fig. 3 is an embodiment of the invention. 4 is a cross-sectional view of the upper electrode and a plan view showing the gas introduction hole in a conventional plasma CVD device, and FIG. 5 is a schematic diagram of the electrode in a conventional plasma CVD device. FIG. 2 is a diagram showing the electric field strength and the film thickness of the silicon nitride film. 1... Upper electrode, 2... Upper electrode opposing surface, 3
...Gas introduction hole, 6...Lower electrode, 7...
Electrode facing interval, 8...Lower electrode facing surface. Patent applicant Matsushita Electric Industrial Co., Ltd. Figure 1 (a) 3〃S introduction JL (b) Figure 2 a) (b) Strain direction of electrode j7 (C)

Claims (3)

【特許請求の範囲】[Claims] (1)平行平板型電極を有するプラズマCVD装置にお
いて、中心部からガスを導入させる上部電極の下部電極
との対向面に、複数のガス導入孔を同心円状に配列し、
その配列間隔を上記中心部から周縁部になるにしたがっ
て小さくしたことを特徴とするプラズマCVD装置。
(1) In a plasma CVD apparatus having parallel plate electrodes, a plurality of gas introduction holes are arranged concentrically on the surface of the upper electrode facing the lower electrode through which gas is introduced from the center,
A plasma CVD apparatus characterized in that the arrangement interval becomes smaller from the center to the periphery.
(2)上部電極の中心から周縁部方向にn番目(nは正
の整数)のガス導入孔を、上部電極の中心からr=Ae
^−^(^1^/^B^n^)+Cの距離に設けたこと
を特徴とする特許請求の範囲第(1)項記載のプラズマ
CVD装置。但し、A、B、Cはそれぞれ選択される常
数、nは上部電極対向面の中心から半径方向に計算した
ガス導入孔の番数である。
(2) Connect the nth (n is a positive integer) gas introduction hole from the center of the upper electrode toward the periphery at r=Ae from the center of the upper electrode.
The plasma CVD apparatus according to claim 1, wherein the plasma CVD apparatus is provided at a distance of ^-^(^1^/^B^n^)+C. However, A, B, and C are constants to be selected, respectively, and n is the number of gas introduction holes calculated in the radial direction from the center of the surface facing the upper electrode.
(3)上部電極の中心を中心として同心円状にガス導入
孔を複数配列し、その同一同心円上における間隔を、ほ
ぼ一定としたことを特徴とする特許請求の範囲第(1)
項記載のプラズマCVD装置。
(3) Claim (1) characterized in that a plurality of gas introduction holes are arranged concentrically around the center of the upper electrode, and the intervals on the same concentric circle are approximately constant.
Plasma CVD apparatus described in Section 2.
JP19845785A 1985-09-10 1985-09-10 Plasma cvd apparatus Pending JPS6260875A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19845785A JPS6260875A (en) 1985-09-10 1985-09-10 Plasma cvd apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19845785A JPS6260875A (en) 1985-09-10 1985-09-10 Plasma cvd apparatus

Publications (1)

Publication Number Publication Date
JPS6260875A true JPS6260875A (en) 1987-03-17

Family

ID=16391420

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19845785A Pending JPS6260875A (en) 1985-09-10 1985-09-10 Plasma cvd apparatus

Country Status (1)

Country Link
JP (1) JPS6260875A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5031571A (en) * 1988-02-01 1991-07-16 Mitsui Toatsu Chemicals, Inc. Apparatus for forming a thin film on a substrate
JPH0835067A (en) * 1994-07-20 1996-02-06 G T C:Kk Film forming device and film formation
US5589002A (en) * 1994-03-24 1996-12-31 Applied Materials, Inc. Gas distribution plate for semiconductor wafer processing apparatus with means for inhibiting arcing
US6059885A (en) * 1996-12-19 2000-05-09 Toshiba Ceramics Co., Ltd. Vapor deposition apparatus and method for forming thin film
JP2004190132A (en) * 2002-11-29 2004-07-08 Kyocera Corp Hot wire cvd system
JP2005033167A (en) * 2003-06-19 2005-02-03 Tadahiro Omi Shower plate, plasma processing device and method of producing products
US7879182B2 (en) 2003-12-26 2011-02-01 Foundation For Advancement Of International Science Shower plate, plasma processing apparatus, and product manufacturing method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5031571A (en) * 1988-02-01 1991-07-16 Mitsui Toatsu Chemicals, Inc. Apparatus for forming a thin film on a substrate
US5589002A (en) * 1994-03-24 1996-12-31 Applied Materials, Inc. Gas distribution plate for semiconductor wafer processing apparatus with means for inhibiting arcing
JPH0835067A (en) * 1994-07-20 1996-02-06 G T C:Kk Film forming device and film formation
US6059885A (en) * 1996-12-19 2000-05-09 Toshiba Ceramics Co., Ltd. Vapor deposition apparatus and method for forming thin film
JP2004190132A (en) * 2002-11-29 2004-07-08 Kyocera Corp Hot wire cvd system
JP2005033167A (en) * 2003-06-19 2005-02-03 Tadahiro Omi Shower plate, plasma processing device and method of producing products
US7879182B2 (en) 2003-12-26 2011-02-01 Foundation For Advancement Of International Science Shower plate, plasma processing apparatus, and product manufacturing method

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