JPS60147131A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce any inner strain generated within dielectric isolated regions between elements by means of forming cavities in the isolated regions between semiconductor elements. CONSTITUTION:Dielectric isolating grooves are formed downward from the surface of an Si substrate 11 and when SiO2 films 12 are formed in the grooves by means of CVD etc, cavities 13 are formed making dielectric isolating regions contain the cavities of CVD is made land to creep. When the cavities are formed in the dielectric isolating regions, the inner strain may be reduced less than the case wherein the regions are formed by burying SiO2 in the dielectric isolating regions.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a structure of an inter-element dielectric isolation region in a semiconductor device.

[Prior art]

Conventionally, the interlayer electrode material isolation region in semiconductor devices is made of Si.
It was customary to have a dielectric material such as O2 embedded therein.

However, according to the above-mentioned prior art, there is a drawback that the dielectric material between semiconductor elements has a difference in coefficient of thermal expansion, etc. from that of the semiconductor substrate, etc., which causes internal distortion in the semiconductor device.

〔the purpose〕

SUMMARY OF THE INVENTION It is an object of the present invention to provide a dielectric isolation structure that eliminates the drawbacks of the prior art and alleviates the occurrence of internal strain in dielectric isolation between elements of a semiconductor device.

〔overview〕

The basic structure of the present invention for achieving the above object is characterized in that a cavity is formed in a region separating semiconductor confections in a semiconductor device.

〔Example〕

The present invention will be described in detail in the following examples.

FIG. 1 shows a semiconductor device it (') u f according to the prior art.
FIG. 2 is a cross-sectional view showing a tt body separation structure. That is, a dielectric isolation region 2 consisting of 5ho2 is formed on the S7 substrate 1, and a semi-isomorphic element is usually formed in the region surrounded by the dielectric isolation region 2.

FIG. 2 is a cross-sectional view showing an embodiment of the structure of a galvanic body portion of a semiconductor device according to the present invention. That is, when an AT body separation groove is formed from the surface of the Si substrate 11 and SiO2 removal 12 is formed in the separation groove by CVD or the like, if the distribution of C''/D is deteriorated, the mud 2 As shown in the figure, a cavity 13 is formed, and a dielectric isolation region including the cavity is formed.In the case of the present invention, it is not necessarily necessary to form a film on the entire surface inside the isolation trench.

〔effect〕

Forming a cavity in the dielectric isolation region as in the present invention has the effect of reducing internal strain to a lesser extent than when forming the dielectric isolation region by filling it with SiO2.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a dielectric isolation region according to the prior art, and FIG. 2 is a sectional view of a dielectric isolation region showing an embodiment of the present invention. 1.11...Semiconductor substrate 2.12...Dielectric material 13...Cavity or above Applicant Suwa Seikosha Co., Ltd. Agent Patent Attorney Rank 1 Figure 1? Figure 2

Claims (1)

[Claims] A semiconductor device characterized in that a cavity is formed in a region between semiconductor elements.