JPH0474477A - Non-volatile memory and its manufacture - Google Patents

Abstract

PURPOSE:To reduce the projecting area of capacitive coupling by forming a floating gate with an amorphous silicon thick film, and then forming the more deeply depressed shape than the depressed shape to reflect a backing shape, and finally by forming the second gate insulating film on the inside wall of the depressed shape of the floating gate. CONSTITUTION:A silicon oxide film with prescribed thickness is formed on the surface of a floating gate 5b, source 10, and a drain 11 by thermal oxidation. In the more deeply depressed shape than the depressed shape to reflect a shape of a backing field insulating film 3, the second gate insulating film 6b is formed on the surface of the inside wall of this deeply depressed shape and on the surface of the bottom. Reduction of projecting area of the floating gate 5b to a silicon substrate 1 makes it possible to provide the floating gate 5b with the more deeply depressed shape than the depressed shape to reflect the shape of the backing field insulating film 3. As a result, the opposed area of the floating gate 5b and a control gate 2b can be secured to be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a floating cat type semiconductor nonvolatile memory device and a manufacturing method thereof.

[Conventional technology]

FIG. 3 is a sectional view of a conventional floating gate type semiconductor nonvolatile memory device. A conventional floating gate type semiconductor nonvolatile memory device and its manufacturing method will be described with reference to FIG.

Due to the field insulation M3 on the surface of the P-type silicon substrate 1, an N-type drain and source are formed spaced apart from each other in a memory cell region that is electrically insulated from adjacent regions.
A channel region 9 of the memory cell is formed in the region sandwiched between the train and the source. A floating gate 5a is formed on the channel region 9 with a first gate insulating film 4 interposed therebetween, and a control gate 2a is further formed on the floating gate 5a with a second gate insulating film 6a interposed therebetween. A glabellar insulating film 8 is provided on the control gate 2a.
A bit line 7 is formed via.

A field insulating film 3 is formed on a silicon substrate 1. First gate insulation M4. After forming the channel region 9, etc., a polycrystalline silicon film is deposited on the surface and processed into the shape of a floating gate, and then N-type impurities are introduced to form the floating gate 5a, a drain, and a source. A silicon oxide film is formed on the surface by thermal oxidation, and a second gate insulating film 6a consisting of only this silicon oxide film or a laminated film with a silicon nitride film is formed. Furthermore,
Control gate 2a1 interlayer insulating film 8. Bit lines 7 and the like are formed to form a floating gate type semiconductor nonvolatile memory device.

[Problem to be solved by the invention]

In conventional nonvolatile memory devices, the floating gate is formed of a polycrystalline silicon film, so silicon obtained by thermally oxidizing the polycrystalline silicon film is used as a component of the second gate insulating film formed on the surface of the floating gate. Contains an oxide film.

For this reason, the film quality of the silicon oxide film particularly on the side wall surface of the floating cage deteriorates. This is based on the difference between the planar direction and the vertical direction of the duplex when depositing the polycrystalline silicon film. Therefore, in order to ensure the retention characteristics of a nonvolatile memory device, the thickness of the silicon oxide film constituting the second gate insulating film should be sufficiently thicker than that of the first gate insulating film (for example, 70 nm). degree) was necessary. In addition, the thickness of the polycrystalline silicon film for the floating gate needs to be 0.3 μm or less in terms of practical use.

The write characteristics of a nonvolatile memory device are determined by capacitive coupling between the channel region and the floating gate caused by the first gate insulating film, and capacitive coupling between the floating gate and the control gate caused by the second gate insulating film. , it is necessary to increase the capacitive coupling between the floating gate and the control gate due to the second gate insulating film.

However, as long as the floating gate is formed of a polycrystalline silicon film, it is not desirable to increase the side surface area of the floating gate or to reduce the thickness of the second gate insulating film as described above, and it is not desirable to increase the area of the channel region. In contrast, a method had to be taken to increase the surface area of the floating gate. As a solution to this problem, a floating gate has been extended in a plane over the field insulating film. For this reason, it has been difficult to increase the capacity of floating gate type semiconductor nonvolatile memory devices.

[Means to solve the problem]

A nonvolatile memory device of the present invention includes a floating gate formed on a semiconductor substrate through a first gate insulating film, and a control gate that is capacitively connected to the floating gate through a second gate insulating film. The gate type semiconductor nonvolatile memory device has a floating gate having a concave shape deeper than a concave shape formed to reflect the shape of an underlying layer, and a second gate insulating film is provided on at least the concave inner side wall surface of the floating gate. It is formed.

Further, a method of manufacturing a nonvolatile memory device of the present invention includes the steps of forming the floating gate made of an amorphous silicon film, and the step of forming the floating gate by thermal oxidation. forming a silicon oxide film on the surface of the floating gate.

〔Example〕 Next, the present invention will be explained with reference to the drawings.

FIG. 1(a) is a schematic plan view for explaining a first embodiment of the present invention, and FIG. 1(b) is a schematic plan view for explaining a first embodiment of the present invention.

(C) is a sectional view taken along lines AA' and BB' in FIG. 1(a).

First, a field insulating film 3. First gate insulating film 4. and channel region 9 (
A channel width of 1.6 μm) is formed. The first gate insulating film 4 is composed of a single silicon oxide film formed by thermally oxidizing the surface of the silicon substrate 1, or a laminated film of this and a silicon nitride film grown by vapor phase growth. Next, an amorphous silicon film having a thickness of about 0.8 μm is deposited over the entire surface, and the amorphous silicon film other than the floating gate formation region is removed.

Subsequently, the amorphous silicon film remaining in the floating gate formation region is etched to form a groove in a direction perpendicular to the channel length direction. Next, introduce N-type impurities by thermal diffusion.

Alternatively, the remaining amorphous silicon film is converted into the floating gate 5b by ion implantation, and the source 10. A drain 11 is formed.

As a result, in the direction perpendicular to the channel length direction, the first
As shown in the cross section in Figure (c), the floating gate 5b has a concave shape that is deeper than the concave shape reflecting the shape of the underlying field insulation M3 (see Figures 1(b) and 3). It is formed.

Next, floating gate 5b source 1 is thermally oxidized.
0. A silicon oxide film of a predetermined thickness is formed on the surface of the train 11. The second gate insulation M6b is formed of this silicon oxide film alone or a laminated film of this silicon oxide film and a silicon nitride film grown by vapor phase growth.

Next, a polycrystalline silicon film with a film thickness of 0.8 μm or more is deposited on the entire surface, a photoresist film, etc. Perform sex back using sexual etching. After removing the remaining photoresist film, etc., the polycrystalline silicon film other than the control gate forming region is removed by a photolithography process. After removing the photoresist film used in this step, N-type impurities are introduced again, and the remaining polycrystalline silicon film is converted into a control gate 2b. By this step, the second gate insulating film 6b on the exposed surfaces of the floating gate 5b, source 10, and drain 11 becomes a glass film.

At this stage, the second gate insulating film 6b exists only in the portion where the floating gate 5b and the control gate 2b overlap.

In other words, in this case, in a concave shape that is deeper than the concave shape reflecting the shape of the underlying field insulating film 3, the second gate insulating film 6b is formed on the inner side wall surface and the bottom surface of this deep concave shape. will be formed.

Subsequently, a glabellar insulating film 8 is deposited on the entire surface, and after being flattened, a bit contact 12 reaching the drain 11 is opened.
By forming the bit line 7, as shown in FIG.
), a floating gate type semiconductor nonvolatile memory device having the structure shown in (c) is obtained.

Here, the second gate insulating film 6b includes a thermally oxidized film of the amorphous silicon film, and the amorphous silicon film becomes a polycrystalline silicon film at the stage of thermal oxidation. However, since it is not in a polycrystalline state during the growth stage, the vertical homogeneity of this polycrystalline silicon film (
grain condition) is the same as the homogeneity in the plane direction. Therefore, it is no longer necessary to increase the thickness of the silicon oxide film formed on the surface of the floating gate 5b by thermal oxidation as in the conventional case. Along with this, conventionally, the opposing area between the floating gate and the control gate has been secured by extending the floating gate on the field insulating film, but as shown in FIG. By reducing the area and forming the floating gate 5b with a concave shape that is deeper than the concave shape that reflects the shape of the underlying field insulation M3, it is possible to secure the opposing area between the floating gate 5b and the control gate 2b. Become.

As an effect of this embodiment, the control gate 2b is placed in the groove of the floating gate 5b (
Therefore, the coupling capacitance between the control gate 2b and the source 10 or drain 11 can be ignored.

FIG. 2 is a cross-sectional view of a second embodiment of the invention. In this embodiment, the groove for the floating gate 5c is formed parallel to the channel length direction. Although the structure is topologically the same as the conventional structure, by providing a groove, the thickness of the second gate insulating film 6c is reduced, and the thickness of the silicon substrate 1 of the floating gate 5C is reduced. It is possible to reduce the area projected onto the floating gate 5c, secure the opposing area of the floating gate 5c and the control gate 2c, and fill the capacitive junction formed by the floating gate 5c, the second gate insulator M6c, and the control gate 2c. .

〔Effect of the invention〕

As explained above, the present invention provides a floating gate type semiconductor nonvolatile memory device in which the floating gate is formed of a thick amorphous silicon film, and the concave shape is deeper than that formed by reflecting the underlying shape. A concave shape is formed, and a second gate insulating film is formed on at least the surface of the concave inner side wall of the floating gate.

First of all, this makes it possible to use the high-quality silicon oxide film produced by thermal oxidation on the surface of the floating gate as a component of the second gate insulating film, thereby reducing the thickness of the second gate insulating film. It becomes possible to do so.

Second, since the second gate insulating film is also formed on the inner side wall surface of the concave shape that is deeper than the concave shape formed by reflecting the underlying shape, the floating gate, the second gate insulating film, and the control gate are formed. The projected area of the capacitive junction on the semiconductor substrate can be reduced without reducing the capacitance value of the capacitive junction formed by the above.

Thirdly, as a synergistic effect of the first and second effects, the cell size of the floating gate type semiconductor nonvolatile memory device can be reduced.

8... interlayer insulating film, 9...Channel area, 10... sauce, 11...Drain, 12...Bit contact.

[Brief explanation of drawings]

FIG. 1<a) is a schematic plan view for explaining the first embodiment of the present invention, and FIGS. 1(b) and (c) are A of FIG. 1(a).
2 is a sectional view taken along lines A' and BB', FIG. 2 is a sectional view for explaining a second embodiment of the present invention, and FIG. 3 is a sectional view of a conventional floating gate type semiconductor nonvolatile memory device. . 1... Silicon substrate, 2a, 2b, 2c... Control gate, 3...
Field insulating film, 4... First gate insulating film, 5a, 5b, 5c... Floating gate, 6a,
6b, 6cm--second gate insulating film, 7... bit line,

Claims (1)

[Claims] 1. A floating gate consisting of a floating gate formed on a semiconductor substrate via a first gate insulating film, and a control gate capacitively connected to the floating gate via a second gate insulating film. type semiconductor non-volatile memory device, the floating gate having a concave shape deeper than the concave shape formed to reflect the shape of the base, and having a second gate insulating film on at least the concave inner side wall surface of the floating gate. A nonvolatile storage device characterized by: 2. The non-volatile memory device according to claim 1, wherein the concave shape of the floating gate is formed parallel to a control gate, and the control gate is buried within the concave shape. 3. The non-volatile method according to claim 1, comprising the steps of: forming the floating gate made of an amorphous silicon film; and forming a silicon oxide film on the surface of the floating gate by thermal oxidation. A method for producing a sexual memory device.